dri-devel January 2012

dri-devel@lists.freedesktop.org

91 participants
570 discussions

[Bug 38022] New: ATI Radeon 6950 (Cayman): r600g texture / pixmap corruption
by bugzilla-daemon＠freedesktop.org 21 Jan '12

21 Jan '12

https://bugs.freedesktop.org/show_bug.cgi?id=38022 Summary: ATI Radeon 6950 (Cayman): r600g texture / pixmap corruption Product: DRI Version: XOrg CVS Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: major Priority: medium Component: DRM/Radeon AssignedTo: dri-devel(a)lists.freedesktop.org ReportedBy: h.judt(a)gmx.at Created an attachment (id=… [View More]47642) --> (https://bugs.freedesktop.org/attachment.cgi?id=47642) Xorg.0.log I don't know where this should go (drm, mesa?), but after a while, I notice corruption of textures / pixmaps. It can be reproduced quite easily by opening a few applications, or starting another X session. In particular, I could determine the following: - Corrupted areas resemble parts of the previous visible login screen - Icons, fonts and widgets like vertical gtk progressbars get corrupted, but only their lower half - Window (emerald) decoration seem to get corrupted completely. - It's not related to color tiling. - Pageflipping is enabled. - Restarting a corrupted application fixes it temporarily, while minimizing etc. doesn't. Restarting compiz doesn't fix it either. I believe this is specific to cayman, as the issue does not occur on a thinkpad t400 with ATI Mobility Radeon HD 3400 and similar configuration. Software configuration: - linux-3.0.0-rc1 with latest fixes from drm-2.6 git applied, up to 2a9e5862a38f7195931bd51788dc9ce68b28120c. - r600g from git mesa compiled on 12:44:56 03.06.2011 - xorg-server 1.10.2 - libdrm git 21:06:43 02.06.2011 - xf86-video-ati git 21:56:58 02.06.2011 lspci: 01:00.0 VGA compatible controller: ATI Technologies Inc Device 6719 (prog-if 00 [VGA controller]) Subsystem: ATI Technologies Inc Device 0b00 Flags: bus master, fast devsel, latency 0, IRQ 54 Memory at c0000000 (64-bit, prefetchable) [size=256M] Memory at fe620000 (64-bit, non-prefetchable) [size=128K] I/O ports at e000 [size=256] Expansion ROM at fe600000 [disabled] [size=128K] Capabilities: [50] Power Management version 3 Capabilities: [58] Express Legacy Endpoint, MSI 00 Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [150] Advanced Error Reporting Kernel driver in use: radeon -- Apart from this, it works great, no crashes so far! -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug. [View Less]

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[PATCH] drm: remove master fd restriction on mode setting getters
by Mandeep Singh Baines 20 Jan '12

20 Jan '12

Its useful to be able to call the mode setting getter ioctls. Not requiring master fd, enables writing a simple program which can query the state of the video system. Since these ioctls are only "getters" there is no security or synchronization issues which would require master fd. Opening an new fd is already protected by the file permissions on the device file. Signed-off-by: Mandeep Singh Baines <msb(a)chromium.org> Cc: Dave Airlie <airlied(a)redhat.com> Cc: Daniel Vetter <… [View More]daniel.vetter(a)ffwll.ch> Cc: Ilija Hadzic <ihadzic(a)research.bell-labs.com> Cc: Jesse Barnes <jbarnes(a)virtuousgeek.org> Cc: Stephane Marchesin <marcheu(a)chromium.org> Cc: dri-devel(a)lists.freedesktop.org --- drivers/gpu/drm/drm_drv.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index ebf7d3f..d166bd0 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c @@ -135,23 +135,23 @@ static struct drm_ioctl_desc drm_ioctls[] = { DRM_IOCTL_DEF(DRM_IOCTL_GEM_FLINK, drm_gem_flink_ioctl, DRM_AUTH|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_GEM_OPEN, drm_gem_open_ioctl, DRM_AUTH|DRM_UNLOCKED), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETRESOURCES, drm_mode_getresources, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETRESOURCES, drm_mode_getresources, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETPLANERESOURCES, drm_mode_getplane_res, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETCRTC, drm_mode_getcrtc, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETCRTC, drm_mode_getcrtc, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_SETCRTC, drm_mode_setcrtc, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETPLANE, drm_mode_getplane, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_SETPLANE, drm_mode_setplane, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_CURSOR, drm_mode_cursor_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETGAMMA, drm_mode_gamma_get_ioctl, DRM_MASTER|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETGAMMA, drm_mode_gamma_get_ioctl, DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_SETGAMMA, drm_mode_gamma_set_ioctl, DRM_MASTER|DRM_UNLOCKED), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETENCODER, drm_mode_getencoder, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETCONNECTOR, drm_mode_getconnector, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETENCODER, drm_mode_getencoder, DRM_CONTROL_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETCONNECTOR, drm_mode_getconnector, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_ATTACHMODE, drm_mode_attachmode_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_DETACHMODE, drm_mode_detachmode_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETPROPERTY, drm_mode_getproperty_ioctl, DRM_MASTER | DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_SETPROPERTY, drm_mode_connector_property_set_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETPROPBLOB, drm_mode_getblob_ioctl, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), - DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETFB, drm_mode_getfb, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), + DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETFB, drm_mode_getfb, DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_ADDFB, drm_mode_addfb, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_ADDFB2, drm_mode_addfb2, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), DRM_IOCTL_DEF(DRM_IOCTL_MODE_RMFB, drm_mode_rmfb, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), -- 1.7.3.4 [View Less]

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Fwd: [Intel-gfx] [PATCH 1/2] drm: give up on edid retries when i2c bus is not responding
by Eugeni Dodonov 20 Jan '12

20 Jan '12

Looks like a CC to dri-devel got forgotten originally, so forwarding it properly. ---------- Forwarded message ---------- From: Eugeni Dodonov <eugeni.dodonov(a)intel.com> Date: Thu, Jan 5, 2012 at 09:34 Subject: [Intel-gfx] [PATCH 1/2] drm: give up on edid retries when i2c bus is not responding To: intel-gfx(a)lists.freedesktop.org Cc: Eugeni Dodonov <eugeni.dodonov(a)intel.com> This allows to avoid talking to a non-responding bus repeatedly until we finally timeout after 15 … [View More]attempts. We can do this by catching the -ENXIO error, provided by i2c_algo_bit:bit_doAddress call. Within the bit_doAddress we already try 3 times to get the edid data, so if the routine tells us that bus is not responding, it is mostly pointless to keep re-trying those attempts over and over again until we reach final number of retries. This change should fix https://bugs.freedesktop.org/show_bug.cgi?id=41059 and improve overall edid detection timing by 10-30% in most cases, and by a much larger margin in case of phantom outputs (up to 30x in one worst case). Timing results for i915-powered machines for 'time xrandr' command: Machine 1: from 0.840s to 0.290s Machine 2: from 0.315s to 0.280s Machine 3: from +/- 4s to 0.184s Timing results for HD5770 with 'time xrandr' command: Machine 4: from 3.210s to 1.060s Reviewed-by: Chris Wilson <chris(a)hchris-wilson.co.uk> Reviewed-by: Keith Packard <keithp(a)keithp.com> Tested-by: Sean Finney <seanius(a)seanius.net> Tested-by: Soren Hansen <soren(a)linux2go.dk> Tested-by: Hernando Torque <sirius(a)sonnenkinder.org> Tested-by: Mike Lothian <mike(a)fireburn.co.uk> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41059 Signed-off-by: Eugeni Dodonov <eugeni.dodonov(a)intel.com> --- drivers/gpu/drm/drm_edid.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 3e927ce..fb6c26c 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -266,6 +266,11 @@ drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, } }; ret = i2c_transfer(adapter, msgs, 2); + if (ret == -ENXIO) { + DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", + adapter->name); + break; + } } while (ret != 2 && --retries); return ret == 2 ? 0 : -1; -- 1.7.8 _______________________________________________ Intel-gfx mailing list Intel-gfx(a)lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Eugeni Dodonov <http://eugeni.dodonov.net/> [View Less]

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[PATCH 1/2] drm/radeon/kms: move panel mode setup into encoder mode set
by alexdeucher＠gmail.com 20 Jan '12

20 Jan '12

From: Alex Deucher <alexander.deucher(a)amd.com> Needs to happen earlier in the mode set. Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Cc: stable(a)vger.kernel.org --- drivers/gpu/drm/radeon/atombios_dp.c | 22 ++++++++++------------ drivers/gpu/drm/radeon/atombios_encoders.c | 11 +++++++++++ drivers/gpu/drm/radeon/radeon_mode.h | 3 +++ 3 files changed, 24 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/… [View More]gpu/drm/radeon/atombios_dp.c index 6fb335a..a71557c 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c @@ -549,8 +549,8 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector) return false; } -static void radeon_dp_set_panel_mode(struct drm_encoder *encoder, - struct drm_connector *connector) +int radeon_dp_get_panel_mode(struct drm_encoder *encoder, + struct drm_connector *connector) { struct drm_device *dev = encoder->dev; struct radeon_device *rdev = dev->dev_private; @@ -558,7 +558,7 @@ static void radeon_dp_set_panel_mode(struct drm_encoder *encoder, int panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; if (!ASIC_IS_DCE4(rdev)) - return; + return panel_mode; if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) == ENCODER_OBJECT_ID_NUTMEG) @@ -572,14 +572,7 @@ static void radeon_dp_set_panel_mode(struct drm_encoder *encoder, panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; } - atombios_dig_encoder_setup(encoder, - ATOM_ENCODER_CMD_SETUP_PANEL_MODE, - panel_mode); - - if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) && - (panel_mode == DP_PANEL_MODE_INTERNAL_DP2_MODE)) { - radeon_write_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_SET, 1); - } + return panel_mode; } void radeon_dp_set_link_config(struct drm_connector *connector, @@ -717,6 +710,8 @@ static void radeon_dp_set_tp(struct radeon_dp_link_train_info *dp_info, int tp) static int radeon_dp_link_train_init(struct radeon_dp_link_train_info *dp_info) { + struct radeon_encoder *radeon_encoder = to_radeon_encoder(dp_info->encoder); + struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; u8 tmp; /* power up the sink */ @@ -732,7 +727,10 @@ static int radeon_dp_link_train_init(struct radeon_dp_link_train_info *dp_info) radeon_write_dpcd_reg(dp_info->radeon_connector, DP_DOWNSPREAD_CTRL, 0); - radeon_dp_set_panel_mode(dp_info->encoder, dp_info->connector); + if ((dp_info->connector->connector_type == DRM_MODE_CONNECTOR_eDP) && + (dig->panel_mode == DP_PANEL_MODE_INTERNAL_DP2_MODE)) { + radeon_write_dpcd_reg(dp_info->radeon_connector, DP_EDP_CONFIGURATION_SET, 1); + } /* set the lane count on the sink */ tmp = dp_info->dp_lane_count; diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index f1f06ca..a3a9166 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c @@ -1811,10 +1811,21 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: if (ASIC_IS_DCE4(rdev)) { + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); + struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; + + if (!connector) + dig->panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; + else + dig->panel_mode = radeon_dp_get_panel_mode(encoder, connector); + /* disable the transmitter */ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); /* setup and enable the encoder */ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); + atombios_dig_encoder_setup(encoder, + ATOM_ENCODER_CMD_SETUP_PANEL_MODE, + dig->panel_mode); /* enable the transmitter */ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 8cb19f3..d34dcb6 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h @@ -362,6 +362,7 @@ struct radeon_encoder_atom_dig { struct backlight_device *bl_dev; int dpms_mode; uint8_t backlight_level; + int panel_mode; }; struct radeon_encoder_atom_dac { @@ -482,6 +483,8 @@ extern void radeon_dp_link_train(struct drm_encoder *encoder, extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); +extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder, + struct drm_connector *connector); extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); extern void radeon_atom_encoder_init(struct radeon_device *rdev); extern void radeon_atom_dcpll_init(struct radeon_device *rdev); -- 1.7.7.5 [View Less]

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[PATCH] drm/radeon/kms: move disp eng pll setup to init path
by alexdeucher＠gmail.com 20 Jan '12

20 Jan '12

From: Alex Deucher <alexander.deucher(a)amd.com> We really only need to set it up once on init or resume rather than on every mode set. Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/radeon/atombios_crtc.c | 56 +++++++++++++++---------------- drivers/gpu/drm/radeon/radeon_device.c | 6 ++- drivers/gpu/drm/radeon/radeon_display.c | 6 ++- drivers/gpu/drm/radeon/radeon_mode.h | 1 + 4 files changed, 36 insertions(+), 33 deletions(-) … [View More]diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 0fda830..807b89b 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -355,15 +355,12 @@ static void atombios_crtc_set_timing(struct drm_crtc *crtc, atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); } -static void atombios_disable_ss(struct drm_crtc *crtc) +static void atombios_disable_ss(struct radeon_device *rdev, int pll_id) { - struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); - struct drm_device *dev = crtc->dev; - struct radeon_device *rdev = dev->dev_private; u32 ss_cntl; if (ASIC_IS_DCE4(rdev)) { - switch (radeon_crtc->pll_id) { + switch (pll_id) { case ATOM_PPLL1: ss_cntl = RREG32(EVERGREEN_P1PLL_SS_CNTL); ss_cntl &= ~EVERGREEN_PxPLL_SS_EN; @@ -379,7 +376,7 @@ static void atombios_disable_ss(struct drm_crtc *crtc) return; } } else if (ASIC_IS_AVIVO(rdev)) { - switch (radeon_crtc->pll_id) { + switch (pll_id) { case ATOM_PPLL1: ss_cntl = RREG32(AVIVO_P1PLL_INT_SS_CNTL); ss_cntl &= ~1; @@ -406,13 +403,11 @@ union atom_enable_ss { ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; }; -static void atombios_crtc_program_ss(struct drm_crtc *crtc, +static void atombios_crtc_program_ss(struct radeon_device *rdev, int enable, int pll_id, struct radeon_atom_ss *ss) { - struct drm_device *dev = crtc->dev; - struct radeon_device *rdev = dev->dev_private; int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL); union atom_enable_ss args; @@ -479,7 +474,7 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc, } else if (ASIC_IS_AVIVO(rdev)) { if ((enable == ATOM_DISABLE) || (ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK)) { - atombios_disable_ss(crtc); + atombios_disable_ss(rdev, pll_id); return; } args.lvds_ss_2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); @@ -491,7 +486,7 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc, } else { if ((enable == ATOM_DISABLE) || (ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK)) { - atombios_disable_ss(crtc); + atombios_disable_ss(rdev, pll_id); return; } args.lvds_ss.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); @@ -702,11 +697,9 @@ union set_pixel_clock { /* on DCE5, make sure the voltage is high enough to support the * required disp clk. */ -static void atombios_crtc_set_dcpll(struct drm_crtc *crtc, +static void atombios_crtc_set_dcpll(struct radeon_device *rdev, u32 dispclk) { - struct drm_device *dev = crtc->dev; - struct radeon_device *rdev = dev->dev_private; u8 frev, crev; int index; union set_pixel_clock args; @@ -996,7 +989,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode radeon_compute_pll_legacy(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, &ref_div, &post_div); - atombios_crtc_program_ss(crtc, ATOM_DISABLE, radeon_crtc->pll_id, &ss); + atombios_crtc_program_ss(rdev, ATOM_DISABLE, radeon_crtc->pll_id, &ss); atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id, encoder_mode, radeon_encoder->encoder_id, mode->clock, @@ -1019,7 +1012,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode ss.step = step_size; } - atombios_crtc_program_ss(crtc, ATOM_ENABLE, radeon_crtc->pll_id, &ss); + atombios_crtc_program_ss(rdev, ATOM_ENABLE, radeon_crtc->pll_id, &ss); } } @@ -1494,6 +1487,24 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) } +void radeon_atom_dcpll_init(struct radeon_device *rdev) +{ + /* always set DCPLL */ + if (ASIC_IS_DCE4(rdev)) { + struct radeon_atom_ss ss; + bool ss_enabled = radeon_atombios_get_asic_ss_info(rdev, &ss, + ASIC_INTERNAL_SS_ON_DCPLL, + rdev->clock.default_dispclk); + if (ss_enabled) + atombios_crtc_program_ss(rdev, ATOM_DISABLE, ATOM_DCPLL, &ss); + /* XXX: DCE5, make sure voltage, dispclk is high enough */ + atombios_crtc_set_dcpll(rdev, rdev->clock.default_dispclk); + if (ss_enabled) + atombios_crtc_program_ss(rdev, ATOM_ENABLE, ATOM_DCPLL, &ss); + } + +} + int atombios_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, @@ -1515,19 +1526,6 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, } } - /* always set DCPLL */ - if (ASIC_IS_DCE4(rdev)) { - struct radeon_atom_ss ss; - bool ss_enabled = radeon_atombios_get_asic_ss_info(rdev, &ss, - ASIC_INTERNAL_SS_ON_DCPLL, - rdev->clock.default_dispclk); - if (ss_enabled) - atombios_crtc_program_ss(crtc, ATOM_DISABLE, ATOM_DCPLL, &ss); - /* XXX: DCE5, make sure voltage, dispclk is high enough */ - atombios_crtc_set_dcpll(crtc, rdev->clock.default_dispclk); - if (ss_enabled) - atombios_crtc_program_ss(crtc, ATOM_ENABLE, ATOM_DCPLL, &ss); - } atombios_crtc_set_pll(crtc, adjusted_mode); if (ASIC_IS_DCE4(rdev)) diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index aa9a11e..0323ca1 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -956,9 +956,11 @@ int radeon_resume_kms(struct drm_device *dev) radeon_fbdev_set_suspend(rdev, 0); console_unlock(); - /* init dig PHYs */ - if (rdev->is_atom_bios) + /* init dig PHYs, disp eng pll */ + if (rdev->is_atom_bios) { radeon_atom_encoder_init(rdev); + radeon_atom_dcpll_init(rdev); + } /* reset hpd state */ radeon_hpd_init(rdev); /* blat the mode back in */ diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index d3ffc18..8c49fef 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c @@ -1305,9 +1305,11 @@ int radeon_modeset_init(struct radeon_device *rdev) return ret; } - /* init dig PHYs */ - if (rdev->is_atom_bios) + /* init dig PHYs, disp eng pll */ + if (rdev->is_atom_bios) { radeon_atom_encoder_init(rdev); + radeon_atom_dcpll_init(rdev); + } /* initialize hpd */ radeon_hpd_init(rdev); diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 08ff857..8cb19f3 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h @@ -484,6 +484,7 @@ extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector); extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector); extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode); extern void radeon_atom_encoder_init(struct radeon_device *rdev); +extern void radeon_atom_dcpll_init(struct radeon_device *rdev); extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t lane_num, uint8_t lane_set); -- 1.7.7.5 [View Less]

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[PATCH] drm/radeon/kms/dce3+: add support for hw i2c using atom
by alexdeucher＠gmail.com 20 Jan '12

20 Jan '12

From: Alex Deucher <alexander.deucher(a)amd.com> Starting with DCE3 hardware, atom contains a general purpose ProcessI2cChannelTransaction similar to ProcessAuxChannelTransaction. Add an implementation using the atom tables for DCE3+ hardware. This should be a little less CPU intensive than bit banging and may work better in certain cases. Enable it by setting the radeon hw_i2c module parameter to 1. E.g., radeon.hw_i2c=1 on the kernel command line in grub. Signed-off-by: Alex … [View More]Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/radeon/Makefile | 2 +- drivers/gpu/drm/radeon/atombios_i2c.c | 139 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/radeon/radeon_i2c.c | 21 +++++ 3 files changed, 161 insertions(+), 1 deletions(-) create mode 100644 drivers/gpu/drm/radeon/atombios_i2c.c diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index 2139fe8..8410415 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile @@ -71,7 +71,7 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \ r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o \ evergreen.o evergreen_cs.o evergreen_blit_shaders.o evergreen_blit_kms.o \ radeon_trace_points.o ni.o cayman_blit_shaders.o atombios_encoders.o \ - radeon_semaphore.o radeon_sa.o + radeon_semaphore.o radeon_sa.o atombios_i2c.o radeon-$(CONFIG_COMPAT) += radeon_ioc32.o radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o diff --git a/drivers/gpu/drm/radeon/atombios_i2c.c b/drivers/gpu/drm/radeon/atombios_i2c.c new file mode 100644 index 0000000..44d87b6 --- /dev/null +++ b/drivers/gpu/drm/radeon/atombios_i2c.c @@ -0,0 +1,139 @@ +/* + * Copyright 2011 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Alex Deucher + * + */ +#include "drmP.h" +#include "radeon_drm.h" +#include "radeon.h" +#include "atom.h" + +#define TARGET_HW_I2C_CLOCK 50 + +/* these are a limitation of ProcessI2cChannelTransaction not the hw */ +#define ATOM_MAX_HW_I2C_WRITE 2 +#define ATOM_MAX_HW_I2C_READ 255 + +static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, + u8 slave_addr, u8 flags, + u8 *buf, u8 num) +{ + struct drm_device *dev = chan->dev; + struct radeon_device *rdev = dev->dev_private; + PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args; + int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction); + unsigned char *base; + u16 out; + + memset(&args, 0, sizeof(args)); + + base = (unsigned char *)rdev->mode_info.atom_context->scratch; + + if (flags & HW_I2C_WRITE) { + if (num > ATOM_MAX_HW_I2C_WRITE) { + DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 2)\n", num); + return -EINVAL; + } + memcpy(&out, buf, num); + args.lpI2CDataOut = cpu_to_le16(out); + } else { + if (num > ATOM_MAX_HW_I2C_READ) { + DRM_ERROR("hw i2c: tried to read too many bytes (%d vs 255)\n", num); + return -EINVAL; + } + } + + args.ucI2CSpeed = TARGET_HW_I2C_CLOCK; + args.ucRegIndex = 0; + args.ucTransBytes = num; + args.ucSlaveAddr = slave_addr << 1; + args.ucLineNumber = chan->rec.i2c_id; + + atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); + + /* error */ + if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) { + DRM_DEBUG_KMS("hw_i2c error\n"); + return -EIO; + } + + if (!(flags & HW_I2C_WRITE)) + memcpy(buf, base, num); + + return 0; +} + +int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg *msgs, int num) +{ + struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap); + struct i2c_msg *p; + int i, remaining, current_count, buffer_offset, max_bytes, ret; + u8 buf = 0, flags; + + /* check for bus probe */ + p = &msgs[0]; + if ((num == 1) && (p->len == 0)) { + ret = radeon_process_i2c_ch(i2c, + p->addr, HW_I2C_WRITE, + &buf, 1); + if (ret) + return ret; + else + return num; + } + + for (i = 0; i < num; i++) { + p = &msgs[i]; + remaining = p->len; + buffer_offset = 0; + /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */ + if (p->flags & I2C_M_RD) { + max_bytes = ATOM_MAX_HW_I2C_READ; + flags = HW_I2C_READ; + } else { + max_bytes = ATOM_MAX_HW_I2C_WRITE; + flags = HW_I2C_WRITE; + } + while (remaining) { + if (remaining > max_bytes) + current_count = max_bytes; + else + current_count = remaining; + ret = radeon_process_i2c_ch(i2c, + p->addr, flags, + &p->buf[buffer_offset], current_count); + if (ret) + return ret; + remaining -= current_count; + buffer_offset += current_count; + } + } + + return num; +} + +u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index 7bb1b07..bfa32da 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c @@ -30,6 +30,10 @@ #include "radeon.h" #include "atom.h" +extern int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg *msgs, int num); +extern u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap); + /** * radeon_ddc_probe * @@ -882,6 +886,11 @@ static const struct i2c_algorithm radeon_i2c_algo = { .functionality = radeon_hw_i2c_func, }; +static const struct i2c_algorithm radeon_atom_i2c_algo = { + .master_xfer = radeon_atom_hw_i2c_xfer, + .functionality = radeon_atom_hw_i2c_func, +}; + struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, struct radeon_i2c_bus_rec *rec, const char *name) @@ -913,6 +922,18 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, DRM_ERROR("Failed to register hw i2c %s\n", name); goto out_free; } + } else if (rec->hw_capable && + radeon_hw_i2c && + ASIC_IS_DCE3(rdev)) { + /* hw i2c using atom */ + snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), + "Radeon i2c hw bus %s", name); + i2c->adapter.algo = &radeon_atom_i2c_algo; + ret = i2c_add_adapter(&i2c->adapter); + if (ret) { + DRM_ERROR("Failed to register hw i2c %s\n", name); + goto out_free; + } } else { /* set the radeon bit adapter */ snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), -- 1.7.7.5 [View Less]

1 0

[GIT PULL]: dma-buf tree: maintainer update
by Semwal, Sumit 20 Jan '12

20 Jan '12

Hi Linus, Post the merge of dma-buf tree that was (very kindly) sent by Dave Airlie, various people involved in this project feel it is natural and practical for me to be the maintainer of this code. This is my first pull request to you, which only changes the MAINTAINERS file - could you please pull from it? [If you'd just prefer the patch, I could post that out as well.] Thanks and best regards, ~Sumit. The following changes since commit dcd6c92267155e70a94b3927bce681ce74b80d1f: Linux … [View More]

1 0

[Bug 27314] displayport link training fails on certain panels (channel equalization fails)
by bugzilla-daemon＠freedesktop.org 20 Jan '12

20 Jan '12

1 0

[PATCH] MAINTAINERS: Add dma-buf sharing framework maintainer
by Sumit Semwal 20 Jan '12

20 Jan '12

Adding maintainer info for dma-buf buffer sharing framework; some mailing lists interested in this work are also added. Signed-off-by: Sumit Semwal <sumit.semwal(a)ti.com> Signed-off-by: Sumit Semwal <sumit.semwal(a)linaro.org> Acked-by: Arnd Bergmann <arnd(a)arndb.de> --- MAINTAINERS | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index fa3f5e6..b11890b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2246,6 +2246,… [View More]

4 4

lockdep splat with current 3.3 kernel in
by Stephen Hemminger 19 Jan '12

19 Jan '12

This showed when just moving around and doing normal activity. [17580.856410] skge 0000:09:00.0: eth3: disabling interface [18640.814641] [18640.814646] ====================================================== [18640.814649] [ INFO: possible circular locking dependency detected ] [18640.814654] 3.2.0-net+ #7 Not tainted [18640.814656] ------------------------------------------------------- [18640.814659] Xorg/2113 is trying to acquire lock: [18640.814662] (&rdev->ib_pool.mutex){+.+.+.}… [View More], at: [<ffffffffa01fa99f>] radeon_ib_get+0x6c/0x1f9 [radeon] [18640.814700] [18640.814701] but task is already holding lock: [18640.814704] (&rdev->r600_blit.mutex){+.+.+.}, at: [<ffffffffa02109f8>] r600_copy_blit+0x38/0xa8 [radeon] [18640.814736] [18640.814737] which lock already depends on the new lock. [18640.814738] [18640.814741] [18640.814742] the existing dependency chain (in reverse order) is: [18640.814745] [18640.814746] -> #2 (&rdev->r600_blit.mutex){+.+.+.}: [18640.814753] [<ffffffff810ada61>] lock_acquire+0xbf/0xfe [18640.814760] [<ffffffff81439942>] __mutex_lock_common+0x4c/0x360 [18640.814767] [<ffffffff81439d29>] mutex_lock_nested+0x2f/0x36 [18640.814772] [<ffffffffa02109f8>] r600_copy_blit+0x38/0xa8 [radeon] [18640.814801] [<ffffffffa01eabcf>] radeon_move_blit+0x230/0x275 [radeon] [18640.814827] [<ffffffffa01eb259>] radeon_bo_move+0x105/0x12c [radeon] [18640.814850] [<ffffffffa017d6e2>] ttm_bo_handle_move_mem+0x1b6/0x2bd [ttm] [18640.814860] [<ffffffffa017daa7>] ttm_bo_evict+0x2be/0x307 [ttm] [18640.814869] [<ffffffffa017dc60>] ttm_mem_evict_first+0x170/0x19c [ttm] [18640.814879] [<ffffffffa017e341>] ttm_bo_mem_space+0x284/0x2d4 [ttm] [18640.814888] [<ffffffffa017e454>] ttm_bo_move_buffer+0xc3/0x119 [ttm] [18640.814898] [<ffffffffa017e56c>] ttm_bo_validate+0xc2/0x100 [ttm] [18640.814907] [<ffffffffa017e8eb>] ttm_bo_init+0x341/0x37a [ttm] [18640.814917] [<ffffffffa01ebf04>] radeon_bo_create+0x1d9/0x262 [radeon] [18640.814940] [<ffffffffa01f9deb>] radeon_gem_object_create+0x56/0xe6 [radeon] [18640.814969] [<ffffffffa01fa1dc>] radeon_gem_create_ioctl+0x4b/0x81 [radeon] [18640.814997] [<ffffffffa0144949>] drm_ioctl+0x2bf/0x38b [drm] [18640.815010] [<ffffffff81157895>] do_vfs_ioctl+0x46e/0x4af [18640.815017] [<ffffffff8115792c>] sys_ioctl+0x56/0x7a [18640.815022] [<ffffffff81442469>] system_call_fastpath+0x16/0x1b [18640.815028] [18640.815029] -> #1 (&rdev->vram_mutex){+.+.+.}: [18640.815036] [<ffffffff810ada61>] lock_acquire+0xbf/0xfe [18640.815041] [<ffffffff81439942>] __mutex_lock_common+0x4c/0x360 [18640.815047] [<ffffffff81439d29>] mutex_lock_nested+0x2f/0x36 [18640.815052] [<ffffffffa01ebebf>] radeon_bo_create+0x194/0x262 [radeon] [18640.815077] [<ffffffffa022ee22>] radeon_sa_bo_manager_init+0x42/0x64 [radeon] [18640.815106] [<ffffffffa01fb2d8>] radeon_ib_pool_init+0x55/0x115 [radeon] [18640.815134] [<ffffffffa0214c14>] rv770_init+0x186/0x227 [radeon] [18640.815162] [<ffffffffa01da0e9>] radeon_device_init+0x4df/0x571 [radeon] [18640.815180] [<ffffffffa01db4ac>] radeon_driver_load_kms+0x9c/0x101 [radeon] [18640.815200] [<ffffffffa014bc0e>] drm_get_pci_dev+0x164/0x269 [drm] [18640.815216] [<ffffffffa022fe69>] radeon_pci_probe+0x9d/0xa5 [radeon] [18640.815239] [<ffffffff81241163>] local_pci_probe+0x44/0x75 [18640.815246] [<ffffffff812423e2>] pci_device_probe+0xd0/0xff [18640.815251] [<ffffffff812cc4d6>] driver_probe_device+0xb5/0x150 [18640.815257] [<ffffffff812cc5cf>] __driver_attach+0x5e/0x81 [18640.815263] [<ffffffff812cae76>] bus_for_each_dev+0x5c/0x88 [18640.815269] [<ffffffff812cc190>] driver_attach+0x1e/0x20 [18640.815274] [<ffffffff812cbdd3>] bus_add_driver+0xb0/0x206 [18640.815280] [<ffffffff812cca96>] driver_register+0x98/0x105 [18640.815285] [<ffffffff81242600>] __pci_register_driver+0x66/0xd2 [18640.815290] [<ffffffffa014bd9d>] drm_pci_init+0x8a/0xef [drm] [18640.815307] [<ffffffffa02770ec>] loop_unregister_transfer+0x20/0x48 [loop] [18640.815314] [<ffffffff81002099>] do_one_initcall+0x7f/0x13a [18640.815321] [<ffffffff810b7f9d>] sys_init_module+0x114/0x267 [18640.815326] [<ffffffff81442469>] system_call_fastpath+0x16/0x1b [18640.815332] [18640.815332] -> #0 (&rdev->ib_pool.mutex){+.+.+.}: [18640.815339] [<ffffffff810ad329>] __lock_acquire+0xa29/0xd06 [18640.815344] [<ffffffff810ada61>] lock_acquire+0xbf/0xfe [18640.815349] [<ffffffff81439942>] __mutex_lock_common+0x4c/0x360 [18640.815355] [<ffffffff81439d29>] mutex_lock_nested+0x2f/0x36 [18640.815360] [<ffffffffa01fa99f>] radeon_ib_get+0x6c/0x1f9 [radeon] [18640.815389] [<ffffffffa021c934>] r600_blit_prepare_copy+0x61/0xd4 [radeon] [18640.815418] [<ffffffffa0210a0e>] r600_copy_blit+0x4e/0xa8 [radeon] [18640.815446] [<ffffffffa01eabcf>] radeon_move_blit+0x230/0x275 [radeon] [18640.815469] [<ffffffffa01eb259>] radeon_bo_move+0x105/0x12c [radeon] [18640.815492] [<ffffffffa017d6e2>] ttm_bo_handle_move_mem+0x1b6/0x2bd [ttm] [18640.815502] [<ffffffffa017daa7>] ttm_bo_evict+0x2be/0x307 [ttm] [18640.815511] [<ffffffffa017dc60>] ttm_mem_evict_first+0x170/0x19c [ttm] [18640.815520] [<ffffffffa017e341>] ttm_bo_mem_space+0x284/0x2d4 [ttm] [18640.815530] [<ffffffffa017e454>] ttm_bo_move_buffer+0xc3/0x119 [ttm] [18640.815539] [<ffffffffa017e56c>] ttm_bo_validate+0xc2/0x100 [ttm] [18640.815549] [<ffffffffa017e8eb>] ttm_bo_init+0x341/0x37a [ttm] [18640.815558] [<ffffffffa01ebf04>] radeon_bo_create+0x1d9/0x262 [radeon] [18640.815582] [<ffffffffa01f9deb>] radeon_gem_object_create+0x56/0xe6 [radeon] [18640.815610] [<ffffffffa01fa1dc>] radeon_gem_create_ioctl+0x4b/0x81 [radeon] [18640.815638] [<ffffffffa0144949>] drm_ioctl+0x2bf/0x38b [drm] [18640.815650] [<ffffffff81157895>] do_vfs_ioctl+0x46e/0x4af [18640.815656] [<ffffffff8115792c>] sys_ioctl+0x56/0x7a [18640.815661] [<ffffffff81442469>] system_call_fastpath+0x16/0x1b [18640.815667] [18640.815667] other info that might help us debug this: [18640.815669] [18640.815671] Chain exists of: [18640.815672] &rdev->ib_pool.mutex --> &rdev->vram_mutex --> &rdev->r600_blit.mutex [18640.815680] [18640.815682] Possible unsafe locking scenario: [18640.815684] [18640.815686] CPU0 CPU1 [18640.815688] ---- ---- [18640.815690] lock(&rdev->r600_blit.mutex); [18640.815695] lock(&rdev->vram_mutex); [18640.815700] lock(&rdev->r600_blit.mutex); [18640.815705] lock(&rdev->ib_pool.mutex); [18640.815709] [18640.815710] *** DEADLOCK *** [18640.815711] [18640.815714] 2 locks held by Xorg/2113: [18640.815717] #0: (&rdev->vram_mutex){+.+.+.}, at: [<ffffffffa01ebebf>] radeon_bo_create+0x194/0x262 [radeon] [18640.815747] #1: (&rdev->r600_blit.mutex){+.+.+.}, at: [<ffffffffa02109f8>] r600_copy_blit+0x38/0xa8 [radeon] [18640.815781] [18640.815782] stack backtrace: [18640.815786] Pid: 2113, comm: Xorg Not tainted 3.2.0-net+ #7 [18640.815789] Call Trace: [18640.815795] [<ffffffff81434926>] print_circular_bug+0x1f8/0x209 [18640.815800] [<ffffffff810ad329>] __lock_acquire+0xa29/0xd06 [18640.815807] [<ffffffff8104b2a5>] ? save_stack_trace+0x2c/0x49 [18640.815814] [<ffffffff810ab531>] ? save_trace+0x3d/0xa7 [18640.815843] [<ffffffffa01fa99f>] ? radeon_ib_get+0x6c/0x1f9 [radeon] [18640.815848] [<ffffffff810ada61>] lock_acquire+0xbf/0xfe [18640.815876] [<ffffffffa01fa99f>] ? radeon_ib_get+0x6c/0x1f9 [radeon] [18640.815882] [<ffffffff81439942>] __mutex_lock_common+0x4c/0x360 [18640.815910] [<ffffffffa01fa99f>] ? radeon_ib_get+0x6c/0x1f9 [radeon] [18640.815915] [<ffffffff810add54>] ? mark_held_locks+0x6d/0x95 [18640.815921] [<ffffffff8143b6c6>] ? _raw_write_unlock_irqrestore+0x45/0x52 [18640.815951] [<ffffffffa01fa99f>] ? radeon_ib_get+0x6c/0x1f9 [radeon] [18640.815956] [<ffffffff810adea9>] ? trace_hardirqs_on_caller+0x12d/0x164 [18640.815961] [<ffffffff81439d29>] mutex_lock_nested+0x2f/0x36 [18640.815991] [<ffffffffa01fa99f>] radeon_ib_get+0x6c/0x1f9 [radeon] [18640.816020] [<ffffffffa021c934>] r600_blit_prepare_copy+0x61/0xd4 [radeon] [18640.816049] [<ffffffffa0210a0e>] r600_copy_blit+0x4e/0xa8 [radeon] [18640.816073] [<ffffffffa01eabcf>] radeon_move_blit+0x230/0x275 [radeon] [18640.816096] [<ffffffffa01eb259>] radeon_bo_move+0x105/0x12c [radeon] [18640.816107] [<ffffffffa017d6e2>] ttm_bo_handle_move_mem+0x1b6/0x2bd [ttm] [18640.816117] [<ffffffffa017daa7>] ttm_bo_evict+0x2be/0x307 [ttm] [18640.816127] [<ffffffffa017dc60>] ttm_mem_evict_first+0x170/0x19c [ttm] [18640.816137] [<ffffffffa017e341>] ttm_bo_mem_space+0x284/0x2d4 [ttm] [18640.816142] [<ffffffff810ad97f>] ? lock_release+0x166/0x189 [18640.816152] [<ffffffffa017e454>] ttm_bo_move_buffer+0xc3/0x119 [ttm] [18640.816169] [<ffffffffa014df59>] ? kzalloc.constprop.6+0x2d/0x2f [drm] [18640.816180] [<ffffffffa017e56c>] ttm_bo_validate+0xc2/0x100 [ttm] [18640.816189] [<ffffffffa017e8eb>] ttm_bo_init+0x341/0x37a [ttm] [18640.816214] [<ffffffffa01ebf04>] radeon_bo_create+0x1d9/0x262 [radeon] [18640.816237] [<ffffffffa01ebc2b>] ? radeon_bo_clear_va+0xb3/0xb3 [radeon] [18640.816261] [<ffffffffa01ea94e>] ? radeon_ttm_fault+0x59/0x67 [radeon] [18640.816289] [<ffffffffa01f9deb>] radeon_gem_object_create+0x56/0xe6 [radeon] [18640.816318] [<ffffffffa01fa1dc>] radeon_gem_create_ioctl+0x4b/0x81 [radeon] [18640.816324] [<ffffffff8111b20f>] ? might_fault+0x8e/0x95 [18640.816337] [<ffffffffa0144949>] drm_ioctl+0x2bf/0x38b [drm] [18640.816365] [<ffffffffa01fa191>] ? radeon_gem_pwrite_ioctl+0x28/0x28 [radeon] [18640.816372] [<ffffffff8108ce80>] ? up_read+0x20/0x37 [18640.816377] [<ffffffff8143ef80>] ? do_page_fault+0x319/0x38b [18640.816383] [<ffffffff81157895>] do_vfs_ioctl+0x46e/0x4af [18640.816389] [<ffffffff810e89fb>] ? time_hardirqs_off+0x15/0x2a [18640.816394] [<ffffffff8143c336>] ? error_sti+0x5/0x6 [18640.816399] [<ffffffff810aacbc>] ? trace_hardirqs_off_caller+0x3f/0x9c [18640.816404] [<ffffffff8143be59>] ? retint_swapgs+0x13/0x1b [18640.816410] [<ffffffff8115792c>] sys_ioctl+0x56/0x7a [18640.816415] [<ffffffff81442469>] system_call_fastpath+0x16/0x1b [20583.954616] sky2 0000:04:00.0: eth1: remove debugfs # lspci -vv -s 02:00.0 02:00.0 VGA compatible controller: ATI Technologies Inc RV710 [Radeon HD 4350] (prog-if 00 [VGA controller]) Subsystem: PC Partner Limited Device 0e13 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 256 bytes Interrupt: pin A routed to IRQ 82 Region 0: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 2: Memory at fb8e0000 (64-bit, non-prefetchable) [size=64K] Region 4: I/O ports at 8000 [size=256] Expansion ROM at fb8c0000 [disabled] [size=128K] Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <64ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis- DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -6dB Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee00000 Data: 4082 Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Kernel driver in use: radeon [View Less]

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dri-devel January 2012