dri-devel October 2012

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712 discussions

[pull] radeon drm-next-3.7
by alexdeucher＠gmail.com 02 Oct '12

02 Oct '12

From: Alex Deucher <alexander.deucher(a)amd.com> Hi Dave, This is the drm-next pull request for 3.7. Most of these patches have been in my drm-next-3.7-wip branch for a while now, and I've been using it regularly now for a while. The big changes for 3.7 include: - Asynchronous VM page table updates for Cayman/SI - 2 level VM page table support. Saves memory compared to 1 level page tables. - Reworked PLL handing in the display code allows lots more combinations of monitors to work, including more than two DP displays assuming compatible clocks across shared PLLs. This also allows us to power down extra PLLs when we can share a single one across multiple displays which saves power. - Native backlight control on ATOMBIOS systems. - Improved ACPI support for interacting with the GPU. Fixes backlight control on some laptops. - Document AMD ACPI interfaces - Lots of code cleanup - Bug fixes The branch is against your drm-fixes branch due to conflicts, let me know if you have trouble pulling it in. The following changes since commit 16c58081eb95e35f284421176f355eccfc773bbe: drm/radeon: Prevent leak of scratch register on resume from suspend (2012-09-20 12:59:16 -0400) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-next-3.7 Alex Deucher (45): drm/radeon/dce4+: don't use radeon_crtc for vblank callback drm/radeon: clean up evergreen_get_vblank_counter drm/radeon/r1xx-r4xx: don't use radeon_crtc for vblank callback drm/radeon/r5xx-r7xx: don't use radeon_crtc for vblank callback (v2) drm/radeon: properly handle mc_stop/mc_resume on evergreen+ (v2) drm/radeon/dynpm: wait for fences on all rings when reclocking drm/radeon: remove gui_idle interrupt infrastructure drm/radeon: add new AMD ACPI header and update relevant code (v2) drm/radeon: add a license header to radeon_apci.c drm/radeon: track whether the GPU controls the backlight (v2) drm/radeon: rework legacy backlight control drm/radeon: add backlight control for atom devices (v2) drm/radeon: re-organize the acpi notifier callback drm/radeon: document radeon_acpi.c drm/radeon: update ATPX verify interface handling (v2) drm/radeon: reorganize ATPX support (v2) drm/radeon: document radeon_atpx_handler.c (v2) drm/radeon: add initial support for ATCS ACPI methods drm/radeon: rework the backlight control to be an asic callback drm/radeon/atom: add consolidate bpc code drm/radeon: document async VM changes in ni.c drm/radeon: implement bounds checking on thermal controller lookup drm/radeon: remove dead function def drm/radeon: clean up encoder dp checks drm/radeon: white space cleanup in transmitter setup drm/radeon/atom: fix typo in SetPixelClock handling drm/radeon: fix typo in atombios_get_encoder_mode drm/radeon: rework pll selection (v4) drm/radeon/dce3: use a single PPLL for all DP displays drm/radeon: allow PPLL sharing on non-DP displays drm/radeon: rework crtc pll setup to better support PPLL sharing drm/radeon: store the encoder in the radeon_crtc drm/radeon: make non-DP PPLL sharing more robust drm/radeon: work around KMS modeset limitations in PLL allocation (v2) drm/radeon: validate PPLL in crtc fixup drm/radeon: only adjust default clocks on NI GPUs drm/radeon: add get_backlight_level callback drm/radeon: restore backlight level on resume drm/radeon: Add MSI quirk for gateway RS690 drm/radeon: force MSIs on RS690 asics drm/radeon: fix radeon power state debug output drm/radeon/pm: fix multi-head profile handling on BTC+ (v2) drm/radeon: use WRITE_DATA packets for vm flush on SI drm/radeon: rework the vm_flush interface drm/radeon: add vm set_page() callback for SI Christian König (18): drm/radeon: cleanup VM id handling a bit drm/radeon: move VM funcs into asic structure drm/radeon: remove vm_unbind drm/radeon: add sync helper function drm/radeon: make VM flushs a ring operation drm/radeon: rework VMID handling drm/radeon: rework VM page table handling drm/radeon: Move looping over the PTEs into chip code drm/radeon: make page table updates async v2 drm/radeon: fix VM syncing with multiple rings drm/radeon: fix VA range check drm/radeon: fix VA overlap check drm/radeon: move IB pool to 1MB offset drm/radeon: move and rename radeon_bo_va function drm/radeon: let bo_reserve take no_intr instead of no_wait param drm/radeon: fix gem_close_object handling drm/radeon: rework the VM code a bit more (v2) drm/radeon: refactor set_page chipset interface v5 Dmitry Cherkasov (1): drm/radeon: add 2-level VM pagetables support v9 Jerome Glisse (1): drm/radeon: make sure ib bo is properly bound and up to date in vm space Lauri Kasanen (2): drm/radeon: Mark all possible functions / structs as static drm/radeon: Remove unused functions Luca Tettamanti (6): drm/radeon: refactor radeon_atif_call drm/radeon: implement radeon_atif_verify_interface drm/radeon: implement wrapper for GET_SYSTEM_PARAMS drm/radeon: implement handler for ACPI event ACPI video: allow events handlers to veto the keypress drm/radeon: block the keypress on ATIF events Marek Olšák (2): drm/radeon/kms: allow STRMOUT_BASE_UPDATE on RS780 and RS880 drm/radeon: allow MIP_ADDRESS=0 for MSAA textures on Evergreen Michel Dänzer (1): drm/radeon: Fix scratch register leak in IB test. Steven Fuerst (3): Rename i2f() to int2float(), and make it global so one copy can be removed. Replace int2float() with an optimized version. Annotate int2float() as being a pure function. drivers/acpi/video.c | 8 +- drivers/gpu/drm/radeon/atombios_crtc.c | 663 +++++++++++++++-------- drivers/gpu/drm/radeon/atombios_encoders.c | 367 ++++++++++--- drivers/gpu/drm/radeon/evergreen.c | 282 ++++++---- drivers/gpu/drm/radeon/evergreen_cs.c | 61 ++- drivers/gpu/drm/radeon/evergreen_reg.h | 2 + drivers/gpu/drm/radeon/evergreend.h | 7 + drivers/gpu/drm/radeon/ni.c | 134 +++-- drivers/gpu/drm/radeon/nid.h | 1 + drivers/gpu/drm/radeon/r100.c | 96 +--- drivers/gpu/drm/radeon/r300.c | 4 +- drivers/gpu/drm/radeon/r520.c | 4 +- drivers/gpu/drm/radeon/r600.c | 37 +- drivers/gpu/drm/radeon/r600_blit.c | 115 ++-- drivers/gpu/drm/radeon/r600_blit_kms.c | 52 +-- drivers/gpu/drm/radeon/r600_blit_shaders.h | 1 + drivers/gpu/drm/radeon/r600_cs.c | 5 +- drivers/gpu/drm/radeon/r600_hdmi.c | 2 +- drivers/gpu/drm/radeon/radeon.h | 192 +++++-- drivers/gpu/drm/radeon/radeon_acpi.c | 607 ++++++++++++++++++++- drivers/gpu/drm/radeon/radeon_acpi.h | 445 +++++++++++++++ drivers/gpu/drm/radeon/radeon_asic.c | 93 +++- drivers/gpu/drm/radeon/radeon_asic.h | 28 +- drivers/gpu/drm/radeon/radeon_atombios.c | 15 +- drivers/gpu/drm/radeon/radeon_atpx_handler.c | 411 ++++++++++++--- drivers/gpu/drm/radeon/radeon_combios.c | 9 - drivers/gpu/drm/radeon/radeon_connectors.c | 43 +- drivers/gpu/drm/radeon/radeon_cs.c | 83 +-- drivers/gpu/drm/radeon/radeon_device.c | 11 +- drivers/gpu/drm/radeon/radeon_drv.c | 4 +- drivers/gpu/drm/radeon/radeon_encoders.c | 19 +- drivers/gpu/drm/radeon/radeon_fb.c | 16 - drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/gpu/drm/radeon/radeon_gart.c | 602 +++++++++++++-------- drivers/gpu/drm/radeon/radeon_gem.c | 54 ++- drivers/gpu/drm/radeon/radeon_ioc32.c | 2 +- drivers/gpu/drm/radeon/radeon_irq_kms.c | 43 +-- drivers/gpu/drm/radeon/radeon_kms.c | 17 +- drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 7 +- drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 65 ++- drivers/gpu/drm/radeon/radeon_mode.h | 49 ++- drivers/gpu/drm/radeon/radeon_object.c | 22 +- drivers/gpu/drm/radeon/radeon_object.h | 4 +- drivers/gpu/drm/radeon/radeon_pm.c | 104 ++-- drivers/gpu/drm/radeon/radeon_ring.c | 30 +- drivers/gpu/drm/radeon/radeon_sa.c | 20 +- drivers/gpu/drm/radeon/radeon_test.c | 2 +- drivers/gpu/drm/radeon/radeon_ttm.c | 2 +- drivers/gpu/drm/radeon/rs400.c | 6 +- drivers/gpu/drm/radeon/rs600.c | 49 +- drivers/gpu/drm/radeon/rs690.c | 6 +- drivers/gpu/drm/radeon/rv515.c | 18 +- drivers/gpu/drm/radeon/rv770.c | 10 +- drivers/gpu/drm/radeon/si.c | 113 +++-- drivers/gpu/drm/radeon/sid.h | 15 + 55 files changed, 3549 insertions(+), 1510 deletions(-) create mode 100644 drivers/gpu/drm/radeon/radeon_acpi.h

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radeon: Regression between v3.6-rc4 and v3.6-rc6: unable to allocate a PPLL
by Andres Freund 02 Oct '12

02 Oct '12

Hi, While debugging another issue I upgraded from v3.6-rc4 to latest git (which exactly is v3.6-rc6). After X started up one of my three monitors blacked out. A look into the kernel log revealed: [drm:radeon_atom_pick_pll] *ERROR* unable to allocate a PPLL During that first start I tried to correct that using xrand, which failed. After restarting X (gdm) once more the monitor was still blank, the error was still logged, but could be enabled by using xrandr. A bit strange. A quick look into git revealed: $ git log --pretty=short v3.6-rc4.. drivers/gpu/drm/radeon/ commit f492c171a38d77fc13a8998a0721f2da50835224 Author: Christian König <deathsimple(a)vodafone.de> drm/radeon: make 64bit fences more robust v3 commit 985f61f7ee647ad570c05eab0b74915da2ac8e19 Author: Alex Deucher <alexander.deucher(a)amd.com> drm/radeon: rework pll selection (v3) The latter seems to be a probably cause. Anything I can do to diagnose the issue? $ xrandr|grep -E 'connected|Screen' Screen 0: minimum 320 x 200, current 4960 x 1920, maximum 16384 x 16384 DVI-1 connected 2560x1600+1200+0 (normal left inverted right x axis y axis) 641mm x 401mm DisplayPort-0 connected 1200x1920+0+0 left (normal left inverted right x axis y axis) 518mm x 324mm HDMI-0 disconnected (normal left inverted right x axis y axis) DVI-0 connected 1200x1920+3760+0 left (normal left inverted right x axis y axis) 518mm x 324mm # lspci -v -s 08:00.0 08:00.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI Barts XT [Radeon HD 6800 Series] (prog-if 00 [VGA controller]) Subsystem: PC Partner Limited Device 174b Flags: bus master, fast devsel, latency 0, IRQ 76 Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at fbec0000 (64-bit, non-prefetchable) [size=128K] I/O ports at e000 [size=256] Expansion ROM at fbea0000 [disabled] [size=128K] Capabilities: [50] Power Management version 3 Capabilities: [58] Express Legacy Endpoint, MSI 00 Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [150] Advanced Error Reporting Kernel driver in use: radeon Greetings, Andres

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[PATCH] drm/savage: re-add busmaster enable, regression fix
by Florian Zumbiehl 02 Oct '12

02 Oct '12

466e69b8b03b8c1987367912782bc12988ad8794 dropped busmaster enable from the global drm code and moved it to the individual drivers, but missed the savage driver. So, this re-adds busmaster enable to the savage driver, fixing the regression. Signed-off-by: Florian Zumbiehl <florz(a)florz.de> diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c index 6eb507a..7d3f0f0 100644 --- a/drivers/gpu/drm/savage/savage_bci.c +++ b/drivers/gpu/drm/savage/savage_bci.c @@ -547,6 +547,8 @@ int savage_driver_load(struct drm_device *dev, unsigned long chipset) dev_priv->chipset = (enum savage_family)chipset; + pci_set_master(dev->pdev); + return 0; }

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[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #22 from graham <grhm.perry(a)gmail.com> --- Well, that patch isn't touching my card. Cya. -- You are receiving this mail because: You are the assignee for the bug.

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[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #21 from Alex Deucher <agd5f(a)yahoo.com> --- I've gone ahead and re-pushed v2 of the patch. The lower voltages are are to support the higher mclks, so there's no need to keep them high. They only need to be adjusted up when both clocks are raised. -- You are receiving this mail because: You are the assignee for the bug.

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[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #20 from graham <grhm.perry(a)gmail.com> --- With voltage on high for every mode, temperature and power usage will be exactly the same as high profile, even with engine clocks low. Setting low profile will just mean you lose all the processing power, yet still have all the problems associated with high power profile. Seems a bizarre fix to me tbh. -- You are receiving this mail because: You are the assignee for the bug.

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[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #19 from graham <grhm.perry(a)gmail.com> --- And temperature? -- You are receiving this mail because: You are the assignee for the bug.

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[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #18 from Alex Deucher <agd5f(a)yahoo.com> --- (In reply to comment #17) > Um, you now seem to be putting mclk and voltage in the high state, while > leaving the engine clock really low. Surely you'll fry the gpu by > over-volting it. No, it's fine. You can run with higher voltage, you just have to make sure it's high enough to support the requested clocks. -- You are receiving this mail because: You are the assignee for the bug.

1 0

[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #17 from graham <grhm.perry(a)gmail.com> --- (In reply to comment #15) > Good catch. Fixed in v3 of the patch. Um, you now seem to be putting mclk and voltage in the high state, while leaving the engine clock really low. Surely you'll fry the gpu by over-volting it. -- You are receiving this mail because: You are the assignee for the bug.

1 0

[Bug 49981] On HD6850, Power Profile doesn't change if 2 screen is attached.
by bugzilla-daemon＠freedesktop.org 02 Oct '12

02 Oct '12

https://bugs.freedesktop.org/show_bug.cgi?id=49981 --- Comment #16 from graham <grhm.perry(a)gmail.com> --- > Windows has a very different implementation at the moment, but uses the tables in a similar manor. >From what I can tell, it uses a method very similar to dynpm, but it uses it to switch between the fixed modes in the bios tables. I haven't seen it ever break out of them and start setting engine clocks and memory clocks independently. Maybe you have access to documentation that shows otherwise though? -- You are receiving this mail because: You are the assignee for the bug.

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dri-devel October 2012