dri-devel March 2012

dri-devel@lists.freedesktop.org

114 participants
646 discussions

[PATCH] drivers/gpu/drm/savage/savage_state.c: add missing kfree
by Julia Lawall 17 Mar '12

17 Mar '12

From: Julia Lawall <Julia.Lawall(a)lip6.fr> Most of the error handling code in this function frees the buffers kcmd_addr, kvb_addr, and kbox_addr allocated at the beginning of this function. These two branches are changed to do the same. Signed-off-by: Julia Lawall <Julia.Lawall(a)lip6.fr> --- drivers/gpu/drm/savage/savage_state.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/savage/savage_state.c b/drivers/gpu/drm/savage/… [View More]

1 0

[PATCH] dma-buf: add get_dma_buf()
by Rob Clark 17 Mar '12

17 Mar '12

From: Rob Clark <rob(a)ti.com> Works in a similar way to get_file(), and is needed in cases such as when the exporter needs to also keep a reference to the dmabuf (that is later released with a dma_buf_put()), and possibly other similar cases. Signed-off-by: Rob Clark <rob(a)ti.com> --- Minor update on original to add a missing #include include/linux/dma-buf.h | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/include/linux/dma-buf.h b/… [View More]

2 1

[ANNOUNCE] libdrm 2.4.32
by Eric Anholt 16 Mar '12

16 Mar '12

I pushed this version out to make two new intel interfaces available to Mesa: unsynchronized maps, and AUB dumping. It also contains valgrind support, so you no longer get complaints in GL applications about invalid reads/writes when the driver talks to the GPU. Thanks, Chris! Alan Coopersmith (1): Make drm/drm_fourcc.h portable to non-linux platforms Chris Wilson (3): intel: Mark up with valgrind intrinsics to reduce false positives configure: Fix pkg-config test in … [View More]

1 0

[Bug 36762] New: broken minimap on 0ad alpha5
by bugzilla-daemon＠freedesktop.org 16 Mar '12

16 Mar '12

https://bugs.freedesktop.org/show_bug.cgi?id=36762 Summary: broken minimap on 0ad alpha5 Product: Mesa Version: git Platform: x86 (IA32) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/r300 AssignedTo: dri-devel(a)lists.freedesktop.org ReportedBy: fabio.ped(a)libero.it After this recent commit of the 0ad game (which will be available in … [View More]

1 4

Re: [PATCH] RFC: dma-buf: userspace mmap support
by Rob Clark 16 Mar '12

16 Mar '12

On Fri, Mar 16, 2012 at 12:24 PM, Tom Cooksey <tom.cooksey(a)arm.com> wrote: > >> From: Rob Clark <rob(a)ti.com> >> >> Enable optional userspace access to dma-buf buffers via mmap() on the >> dma-buf file descriptor. Userspace access to the buffer should be >> bracketed with DMA_BUF_IOCTL_{PREPARE,FINISH}_ACCESS ioctl calls to >> give the exporting driver a chance to deal with cache synchronization >> and such for cached userspace … [View More]mappings without resorting to page >> faulting tricks. The reasoning behind this is that, while drm >> drivers tend to have all the mechanisms in place for dealing with >> page faulting tricks, other driver subsystems may not. And in >> addition, while page faulting tricks make userspace simpler, there >> are some associated overheads. > > Speaking for the ARM Mali T6xx driver point of view, this API looks > good for us. Our use-case for mmap is glReadPixels and > glTex[Sub]Image2D on buffers the driver has imported via dma_buf. In > the case of glReadPixels, the finish ioctl isn't strictly necessary > as the CPU won't have written to the buffer and so doesn't need > flushing. As such, we'd get an additional cache flush which isn't > really necessary. But hey, it's glReadPixels - it's supposed to be > slow. :-) > > I think requiring the finish ioctl in the API contract is a good > idea, even if the CPU has only done a ro access as it allows future > enhancements*. To "fix" the unnecessary flush in glReadPixels, I > think we'd like to keep the finish but see an "access type" > parameter added to prepare ioctl indicating if the access is ro or > rw to allow the cache flush in finish to be skipped if the access > was ro. As Rebecca says, a debug feature could even be added to > re-map the pages as ro in prepare(ro) to catch naughty accesses. I'd > also go as far as to say the debug feature should completely unmap > the pages after finish too. Though for us, both the access-type > parameter and debug features are "nice to haves" - we can make > progress with the code as it currently stands (assuming exporters > start using the API that is). Perhaps it isn't a bad idea to include access-type bitmask in the first version. It would help optimize a bit the cache operations. > Something which also came up when discussing internally is the topic > of mmap APIs of the importing device driver. For example, I believe > DRM has an mmap API on GEM buffer objects. If a new dma_buf import > ioctl was added to GEM (maybe the PRIME patches already add this), > how would GEM's bo mmap API work? My first thought is maybe we should just dis-allow this for now until we have a chance to see if there are any possible issues with an importer mmap'ing the buffer to userspace. We could possible have a helper dma_buf_mmap() fxn which in turn calls dmabuf ops->mmap() so the mmap'ing is actually performed by the exporter on behalf of the importer. > > * Future enhancements: The prepare/finish bracketing could be used > as part of a wider synchronization scheme with other devices. > E.g. If another device was writing to the buffer, the prepare ioctl > could block until that device had finished accessing that buffer. > In the same way, another device could be blocked from accessing that > buffer until the client process called finish. We have already > started playing with such a scheme in the T6xx driver stack we're > terming "kernel dependency system". In this scheme each buffer has a > FIFO of "buffer consumers" waiting to access a buffer. The idea > being that a "buffer consumer" is fairly abstract and could be any > device or userspace process participating in the synchronization > scheme. Examples would be GPU jobs, display controller "scan-out" > jobs, etc. > > So for example, a userspace application could dispatch a GPU > fragment shading job into the GPU's kernel driver which will write > to a KMS scanout buffer. The application then immediately issues a > drm_mode_crtc_page_flip ioctl on the display controller's DRM driver > to display the soon-to-be-rendered buffer. Inside the kernel, the > GPU driver adds the fragment job to the dma_buf's FIFO. As the FIFO > was empty, dma_buf calls into the GPU kernel driver to tell it it > "owns" access to the buffer and the GPU driver schedules the job to > run on the GPU. Upon receiving the drm_mode_crtc_page_flip ioctl, > the DRM/KMS driver adds a scan-out job to the buffer's FIFO. > However, the FIFO already has the GPU's fragment shading job in it > so nothing happens until the GPU job completes. When the GPU job > completes, the GPU driver calls into dma_buf to mark its job > complete. dma_buf then takes the next job in its FIFO which the KMS > driver's scanout job, calls into the KMS driver to schedule the > pageflip. The result? A buffer gets scanned out as soon as it has > finished being rendered without needing a round-trip to userspace. > Sure, there are easier ways to achieve that goal, but the idea is > that the mechanism can be used to synchronize access across multiple > devices, which makes it useful for lots of other use-cases too. > > > As I say, we have already implemented something which works as I > describe but where the buffers are abstract resources not linked to > dma_buf. I'd like to discuss the finer points of the mechanisms > further, but if it's looking like there's interest in this approach > we'll start re-writing the code we have to sit on-top of dma_buf > and posting it as RFCs to the various lists. The intention is to get > this to mainline, if mainline wants it. :-) I think we do need some sort of 'sync object' (which might really just be a 'synchronization queue' object) in the kernel. It probably shouldn't be built-in to dma-buf, but I expect we'd want the dma_buf struct to have a 'struct sync_queue *' (or whatever it ends up being called). The sync-queue seems like a reasonable approach for pure cpu-sw based synchronization. The only thing I'm not sure is how to also deal with hw that supports any sort of auto synchronization without cpu sw involvement. BR, -R > Personally, what I particularly like about this approach to > synchronization is that it doesn't require any interfaces to be > modified. I think/hope that makes it easier to port existing drivers > and sub-systems to take advantage of it. The buffer itself is the > synchronization object and interfaces already pass buffers around so > don't need modification. There are of course some limitations with > this approach, the main one we can think of being that it can't > really be used for A/V sync. It kinda assumes "jobs" in the FIFO > should be run as soon as the preceding job completes, which isn't > the case when streaming real-time video. Though nothing precludes > more explicit sync objects being used in conjunction with this > approach. > > > Cheers, > > Tom > > > > > > _______________________________________________ > dri-devel mailing list > dri-devel(a)lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel [View Less]

1 0

[PATCH] RFC: dma-buf: userspace mmap support
by Rob Clark 16 Mar '12

16 Mar '12

From: Rob Clark <rob(a)ti.com> Enable optional userspace access to dma-buf buffers via mmap() on the dma-buf file descriptor. Userspace access to the buffer should be bracketed with DMA_BUF_IOCTL_{PREPARE,FINISH}_ACCESS ioctl calls to give the exporting driver a chance to deal with cache synchronization and such for cached userspace mappings without resorting to page faulting tricks. The reasoning behind this is that, while drm drivers tend to have all the mechanisms in place for … [View More]dealing with page faulting tricks, other driver subsystems may not. And in addition, while page faulting tricks make userspace simpler, there are some associated overheads. In all cases, the mmap() call is allowed to fail, and the associated dma_buf_ops are optional (mmap() will fail if at least the mmap() op is not implemented by the exporter, but in either case the {prepare,finish}_access() ops are optional). For now the prepare/finish access ioctls are kept simple with no argument, although there is possibility to add additional ioctls (or simply change the existing ioctls from _IO() to _IOW()) later to provide optimization to allow userspace to specify a region of interest. For a final patch, dma-buf.h would need to be split into what is exported to userspace, and what is kernel private, but I wanted to get feedback on the idea of requiring userspace to bracket access first (vs. limiting this to coherent mappings or exporters who play page faltings plus PTE shoot-down games) before I split the header which would cause conflicts with other pending dma-buf patches. So flame-on! --- drivers/base/dma-buf.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/dma-buf.h | 22 ++++++++++++++++++++++ 2 files changed, 64 insertions(+), 0 deletions(-) diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c index c9a945f..382b78a 100644 --- a/drivers/base/dma-buf.c +++ b/drivers/base/dma-buf.c @@ -30,6 +30,46 @@ static inline int is_dma_buf_file(struct file *); +static int dma_buf_mmap(struct file *file, struct vm_area_struct *vma) +{ + struct dma_buf *dmabuf; + + if (!is_dma_buf_file(file)) + return -EINVAL; + + dmabuf = file->private_data; + + if (dmabuf->ops->mmap) + return dmabuf->ops->mmap(dmabuf, file, vma); + + return -ENODEV; +} + +static long dma_buf_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +{ + struct dma_buf *dmabuf; + + if (!is_dma_buf_file(file)) + return -EINVAL; + + dmabuf = file->private_data; + + switch (_IOC_NR(cmd)) { + case _IOC_NR(DMA_BUF_IOCTL_PREPARE_ACCESS): + if (dmabuf->ops->prepare_access) + return dmabuf->ops->prepare_access(dmabuf); + return 0; + case _IOC_NR(DMA_BUF_IOCTL_FINISH_ACCESS): + if (dmabuf->ops->finish_access) + return dmabuf->ops->finish_access(dmabuf); + return 0; + default: + return -EINVAL; + } +} + + static int dma_buf_release(struct inode *inode, struct file *file) { struct dma_buf *dmabuf; @@ -45,6 +85,8 @@ static int dma_buf_release(struct inode *inode, struct file *file) } static const struct file_operations dma_buf_fops = { + .mmap = dma_buf_mmap, + .unlocked_ioctl = dma_buf_ioctl, .release = dma_buf_release, }; diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index a885b26..cbdff81 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -34,6 +34,17 @@ struct dma_buf; struct dma_buf_attachment; +/* TODO: dma-buf.h should be the userspace visible header, and dma-buf-priv.h (?) + * the kernel internal header.. for now just stuff these here to avoid conflicting + * with other patches.. + * + * For now, no arg to keep things simple, but we could consider adding an + * optional region of interest later. + */ +#define DMA_BUF_IOCTL_PREPARE_ACCESS _IO('Z', 0) +#define DMA_BUF_IOCTL_FINISH_ACCESS _IO('Z', 1) + + /** * struct dma_buf_ops - operations possible on struct dma_buf * @attach: [optional] allows different devices to 'attach' themselves to the @@ -49,6 +60,13 @@ struct dma_buf_attachment; * @unmap_dma_buf: decreases usecount of buffer, might deallocate scatter * pages. * @release: release this buffer; to be called after the last dma_buf_put. + * @mmap: [optional, allowed to fail] operation called if userspace calls + * mmap() on the dmabuf fd. Note that userspace should use the + * DMA_BUF_PREPARE_ACCESS / DMA_BUF_FINISH_ACCESS ioctls before/after + * sw access to the buffer, to give the exporter an opportunity to + * deal with cache maintenance. + * @prepare_access: [optional] handler for PREPARE_ACCESS ioctl. + * @finish_access: [optional] handler for FINISH_ACCESS ioctl. */ struct dma_buf_ops { int (*attach)(struct dma_buf *, struct device *, @@ -72,6 +90,10 @@ struct dma_buf_ops { /* after final dma_buf_put() */ void (*release)(struct dma_buf *); + int (*mmap)(struct dma_buf *, struct file *, struct vm_area_struct *); + int (*prepare_access)(struct dma_buf *); + int (*finish_access)(struct dma_buf *); + }; /** -- 1.7.5.4 [View Less]

6 7

[PATCH 1/3] drm/radeon/kms: fix analog load detection on DVI-I connectors
by alexdeucher＠gmail.com 16 Mar '12

16 Mar '12

From: Alex Deucher <alexander.deucher(a)amd.com> We digital encoders have a detect function as well (for DP to VGA bridges), so we make sure we choose the analog one here. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=47007 Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Cc: stable(a)vger.kernel.org --- drivers/gpu/drm/radeon/radeon_connectors.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c … [View More]

1 2

expected userspace prime/dma-buf usage
by Dave Airlie 16 Mar '12

16 Mar '12

Just wondering how we expect userspace to use dma-buf/prime interfaces. Currently I see one driver in sharing the buffer with handle->fd, then passing the fd to the other driver and it using fd->handle, do we then expect the importing driver to close the fd? Dave.

2 2

[Bug 25672] System unable to recover from suspend to disk
by bugzilla-daemon＠freedesktop.org 16 Mar '12

16 Mar '12

https://bugs.freedesktop.org/show_bug.cgi?id=25672 --- Comment #4 from samit vats <hysvats(a)gmail.com> 2012-03-16 05:13:22 PDT --- (In reply to comment #3) > Created attachment 32118 [details] > lspci Re-opening for GalliumR600 -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug.

1 0

[PATCH] omap2+: add drm device
by Rob Clark 16 Mar '12

16 Mar '12

From: Andy Gross <andy.gross(a)ti.com> Register OMAP DRM/KMS platform device, and reserve a CMA region for the device to use for buffer allocation. DMM is split into a separate device using hwmod. Signed-off-by: Andy Gross <andy.gross(a)ti.com> Signed-off-by: Rob Clark <rob(a)ti.com> --- arch/arm/mach-omap2/Makefile | 4 ++ arch/arm/mach-omap2/drm.c | 83 +++++++++++++++++++++++++++++++++ arch/arm/plat-omap/common.c | 3 +- arch/arm/… [View More]plat-omap/include/plat/drm.h | 64 +++++++++++++++++++++++++ 4 files changed, 153 insertions(+), 1 deletions(-) create mode 100644 arch/arm/mach-omap2/drm.c create mode 100644 arch/arm/plat-omap/include/plat/drm.h diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index bd76394..9e6065b 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -189,6 +189,10 @@ ifneq ($(CONFIG_TIDSPBRIDGE),) obj-y += dsp.o endif +ifneq ($(CONFIG_DRM_OMAP),) +obj-y += drm.o +endif + # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c new file mode 100644 index 0000000..779ae02 --- /dev/null +++ b/arch/arm/mach-omap2/drm.c @@ -0,0 +1,83 @@ +/* + * DRM/KMS device registration for TI OMAP platforms + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#ifdef CONFIG_CMA +# include <linux/dma-contiguous.h> +#endif + +#include <plat/omap_device.h> +#include <plat/omap_hwmod.h> + +#include <plat/drm.h> + +#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) + +static struct omap_drm_platform_data omapdrm_platdata; + +static struct platform_device omap_drm_device = { + .dev = { + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &omapdrm_platdata, + }, + .name = "omapdrm", + .id = 0, +}; + +static int __init omap_init_drm(void) +{ + struct omap_hwmod *oh = NULL; + struct platform_device *pdev; + + /* lookup and populate the DMM information, if present - OMAP4+ */ + oh = omap_hwmod_lookup("dmm"); + + if (oh) { + pdev = omap_device_build(oh->name, -1, oh, NULL, 0, NULL, 0, + false); + WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", + oh->name); + } + + return platform_device_register(&omap_drm_device); + +} + +arch_initcall(omap_init_drm); + +void omapdrm_reserve_vram(void) +{ +#ifdef CONFIG_CMA + /* + * Create private 32MiB contiguous memory area for omapdrm.0 device + * TODO revisit size.. if uc/wc buffers are allocated from CMA pages + * then the amount of memory we need goes up.. + */ + dma_declare_contiguous(&omap_drm_device.dev, 32 * SZ_1M, 0, 0); +#else +# warning "CMA is not enabled, there may be limitations about scanout buffer allocations on OMAP3 and earlier" +#endif +} + +#endif diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 4de7d1e..e027cc7 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -21,10 +21,10 @@ #include <plat/board.h> #include <plat/vram.h> #include <plat/dsp.h> +#include <plat/drm.h> #include <plat/omap-secure.h> - #define NO_LENGTH_CHECK 0xffffffff struct omap_board_config_kernel *omap_board_config __initdata; @@ -65,6 +65,7 @@ const void *__init omap_get_var_config(u16 tag, size_t *len) void __init omap_reserve(void) { + omapdrm_reserve_vram(); omapfb_reserve_sdram_memblock(); omap_vram_reserve_sdram_memblock(); omap_dsp_reserve_sdram_memblock(); diff --git a/arch/arm/plat-omap/include/plat/drm.h b/arch/arm/plat-omap/include/plat/drm.h new file mode 100644 index 0000000..df9bc41 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/drm.h @@ -0,0 +1,64 @@ +/* + * DRM/KMS device registration for TI OMAP platforms + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __PLAT_OMAP_DRM_H__ +#define __PLAT_OMAP_DRM_H__ + +/* + * Optional platform data to configure the default configuration of which + * pipes/overlays/CRTCs are used.. if this is not provided, then instead the + * first CONFIG_DRM_OMAP_NUM_CRTCS are used, and they are each connected to + * one manager, with priority given to managers that are connected to + * detected devices. Remaining overlays are used as video planes. This + * should be a good default behavior for most cases, but yet there still + * might be times when you wish to do something different. + */ +struct omap_kms_platform_data { + /* overlays to use as CRTCs: */ + int ovl_cnt; + const int *ovl_ids; + + /* overlays to use as video planes: */ + int pln_cnt; + const int *pln_ids; + + int mgr_cnt; + const int *mgr_ids; + + int dev_cnt; + const char **dev_names; +}; + +struct omap_drm_platform_data { + struct omap_kms_platform_data *kms_pdata; +}; + +#if defined(CONFIG_DRM_OMAP) || defined(CONFIG_DRM_OMAP_MODULE) + +void omapdrm_reserve_vram(void); + +#else + +static inline void omapdrm_reserve_vram(void) +{ +} + +#endif + +#endif /* __PLAT_OMAP_DRM_H__ */ -- 1.7.5.4 [View Less]

2 9

← Newer
1
...
50
51
52
53
54
55
56
...
65
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel March 2012