dri-devel March 2012

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646 discussions

[PATCH] omap2+: add drm device
by Rob Clark 08 Mar '12

08 Mar '12

From: Andy Gross <andy.gross(a)ti.com> Register OMAP DRM/KMS platform device, and reserve a CMA region for the device to use for buffer allocation. DMM is split into a separate device using hwmod. Signed-off-by: Andy Gross <andy.gross(a)ti.com> Signed-off-by: Rob Clark <rob(a)ti.com> --- arch/arm/plat-omap/Makefile | 2 +- arch/arm/plat-omap/common.c | 3 +- arch/arm/plat-omap/drm.c | 83 +++++++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/drm.h | 64 +++++++++++++++++++++++++ 4 files changed, 150 insertions(+), 2 deletions(-) create mode 100644 arch/arm/plat-omap/drm.c create mode 100644 arch/arm/plat-omap/include/plat/drm.h diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 9a58461..b86e6cb 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ - usb.o fb.o counter_32k.o + usb.o fb.o counter_32k.o drm.o obj-m := obj-n := obj- := diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 06383b5..0d87dab 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -21,10 +21,10 @@ #include <plat/board.h> #include <plat/vram.h> #include <plat/dsp.h> +#include <plat/drm.h> #include <plat/omap-secure.h> - #define NO_LENGTH_CHECK 0xffffffff struct omap_board_config_kernel *omap_board_config __initdata; @@ -65,6 +65,7 @@ const void *__init omap_get_var_config(u16 tag, size_t *len) void __init omap_reserve(void) { + omapdrm_reserve_vram(); omapfb_reserve_sdram_memblock(); omap_vram_reserve_sdram_memblock(); omap_dsp_reserve_sdram_memblock(); diff --git a/arch/arm/plat-omap/drm.c b/arch/arm/plat-omap/drm.c new file mode 100644 index 0000000..28279df --- /dev/null +++ b/arch/arm/plat-omap/drm.c @@ -0,0 +1,83 @@ +/* + * DRM/KMS device registration for TI OMAP platforms + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#ifdef CONFIG_CMA +# include <linux/dma-contiguous.h> +#endif + +#include <plat/omap_device.h> +#include <plat/omap_hwmod.h> + +#include <plat/drm.h> + +#if defined(CONFIG_DRM_OMAP) || (CONFIG_DRM_OMAP_MODULE) + +static struct omap_drm_platform_data omapdrm_platdata; + +static struct platform_device omap_drm_device = { + .dev = { + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &omapdrm_platdata, + }, + .name = "omapdrm", + .id = 0, +}; + +static int __init omap_init_gpu(void) +{ + struct omap_hwmod *oh = NULL; + struct platform_device *pdev; + + /* lookup and populate the DMM information, if present - OMAP4+ */ + oh = omap_hwmod_lookup("dmm"); + + if (oh) { + pdev = omap_device_build(oh->name, -1, oh, NULL, 0, NULL, 0, + false); + WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", + oh->name); + } + + return platform_device_register(&omap_drm_device); + +} + +arch_initcall(omap_init_gpu); + +void omapdrm_reserve_vram(void) +{ +#ifdef CONFIG_CMA + /* + * Create private 32MiB contiguous memory area for omapdrm.0 device + * TODO revisit size.. if uc/wc buffers are allocated from CMA pages + * then the amount of memory we need goes up.. + */ + dma_declare_contiguous(&omap_drm_device.dev, 32 * SZ_1M, 0, 0); +#else +# warning "CMA is not enabled, there may be limitations about scanout buffer allocations on OMAP3 and earlier" +#endif +} + +#endif diff --git a/arch/arm/plat-omap/include/plat/drm.h b/arch/arm/plat-omap/include/plat/drm.h new file mode 100644 index 0000000..df9bc41 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/drm.h @@ -0,0 +1,64 @@ +/* + * DRM/KMS device registration for TI OMAP platforms + * + * Copyright (C) 2012 Texas Instruments + * Author: Rob Clark <rob.clark(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __PLAT_OMAP_DRM_H__ +#define __PLAT_OMAP_DRM_H__ + +/* + * Optional platform data to configure the default configuration of which + * pipes/overlays/CRTCs are used.. if this is not provided, then instead the + * first CONFIG_DRM_OMAP_NUM_CRTCS are used, and they are each connected to + * one manager, with priority given to managers that are connected to + * detected devices. Remaining overlays are used as video planes. This + * should be a good default behavior for most cases, but yet there still + * might be times when you wish to do something different. + */ +struct omap_kms_platform_data { + /* overlays to use as CRTCs: */ + int ovl_cnt; + const int *ovl_ids; + + /* overlays to use as video planes: */ + int pln_cnt; + const int *pln_ids; + + int mgr_cnt; + const int *mgr_ids; + + int dev_cnt; + const char **dev_names; +}; + +struct omap_drm_platform_data { + struct omap_kms_platform_data *kms_pdata; +}; + +#if defined(CONFIG_DRM_OMAP) || defined(CONFIG_DRM_OMAP_MODULE) + +void omapdrm_reserve_vram(void); + +#else + +static inline void omapdrm_reserve_vram(void) +{ +} + +#endif + +#endif /* __PLAT_OMAP_DRM_H__ */ -- 1.7.5.4

4 14

[PATCH] drm/radeon/kms: skip cb/db checking if SX_MISC is 1 on r600+
by Marek Olšák 08 Mar '12

08 Mar '12

Signed-off-by: Marek Olšák <maraeo(a)gmail.com> --- drivers/gpu/drm/radeon/evergreen_cs.c | 8 ++++++++ drivers/gpu/drm/radeon/r600_cs.c | 8 ++++++++ drivers/gpu/drm/radeon/reg_srcs/cayman | 1 - drivers/gpu/drm/radeon/reg_srcs/evergreen | 1 - drivers/gpu/drm/radeon/reg_srcs/r600 | 1 - 5 files changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index bc6a2ea..78d115a 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c @@ -85,6 +85,7 @@ struct evergreen_cs_track { u32 db_s_write_offset; struct radeon_bo *db_s_read_bo; struct radeon_bo *db_s_write_bo; + bool sx_misc_kill_all_prims; }; static u32 evergreen_cs_get_aray_mode(u32 tiling_flags) @@ -162,6 +163,7 @@ static void evergreen_cs_track_init(struct evergreen_cs_track *track) track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF; track->vgt_strmout_bo_mc[i] = 0xFFFFFFFF; } + track->sx_misc_kill_all_prims = false; } struct eg_surface { @@ -821,6 +823,9 @@ static int evergreen_cs_track_check(struct radeon_cs_parser *p) } } + if (track->sx_misc_kill_all_prims) + return 0; + /* check that we have a cb for each enabled target */ tmp = track->cb_target_mask; @@ -1748,6 +1753,9 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) } ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); break; + case SX_MISC: + track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0; + break; default: dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return -EINVAL; diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 5cbe948..abddfd0 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -74,6 +74,7 @@ struct r600_cs_track { u32 db_offset; struct radeon_bo *db_bo; u64 db_bo_mc; + bool sx_misc_kill_all_prims; }; #define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc, CHIP_R600 } @@ -322,6 +323,7 @@ static void r600_cs_track_init(struct r600_cs_track *track) track->vgt_strmout_bo_offset[i] = 0xFFFFFFFF; track->vgt_strmout_bo_mc[i] = 0xFFFFFFFF; } + track->sx_misc_kill_all_prims = false; } static int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) @@ -479,6 +481,9 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) } } + if (track->sx_misc_kill_all_prims) + return 0; + /* check that we have a cb for each enabled target, we don't check * shader_mask because it seems mesa isn't always setting it :( */ @@ -1279,6 +1284,9 @@ static int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx) } ib[idx] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); break; + case SX_MISC: + track->sx_misc_kill_all_prims = (radeon_get_ib_value(p, idx) & 0x1) != 0; + break; default: dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx); return -EINVAL; diff --git a/drivers/gpu/drm/radeon/reg_srcs/cayman b/drivers/gpu/drm/radeon/reg_srcs/cayman index 7b526d3..2d30b06 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/cayman +++ b/drivers/gpu/drm/radeon/reg_srcs/cayman @@ -208,7 +208,6 @@ cayman 0x9400 0x00028344 PA_SC_VPORT_ZMAX_14 0x00028348 PA_SC_VPORT_ZMIN_15 0x0002834C PA_SC_VPORT_ZMAX_15 -0x00028350 SX_MISC 0x00028354 SX_SURFACE_SYNC 0x0002835C SX_SCATTER_EXPORT_SIZE 0x00028380 SQ_VTX_SEMANTIC_0 diff --git a/drivers/gpu/drm/radeon/reg_srcs/evergreen b/drivers/gpu/drm/radeon/reg_srcs/evergreen index 7f43394..ba48394 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/evergreen +++ b/drivers/gpu/drm/radeon/reg_srcs/evergreen @@ -224,7 +224,6 @@ evergreen 0x9400 0x00028344 PA_SC_VPORT_ZMAX_14 0x00028348 PA_SC_VPORT_ZMIN_15 0x0002834C PA_SC_VPORT_ZMAX_15 -0x00028350 SX_MISC 0x00028354 SX_SURFACE_SYNC 0x00028380 SQ_VTX_SEMANTIC_0 0x00028384 SQ_VTX_SEMANTIC_1 diff --git a/drivers/gpu/drm/radeon/reg_srcs/r600 b/drivers/gpu/drm/radeon/reg_srcs/r600 index 79d2455..626c24e 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r600 +++ b/drivers/gpu/drm/radeon/reg_srcs/r600 @@ -438,7 +438,6 @@ r600 0x9400 0x00028638 SPI_VS_OUT_ID_9 0x00028438 SX_ALPHA_REF 0x00028410 SX_ALPHA_TEST_CONTROL -0x00028350 SX_MISC 0x00028354 SX_SURFACE_SYNC 0x00009014 SX_MEMORY_EXPORT_SIZE 0x00009604 TC_INVALIDATE -- 1.7.5.4

2 1

[PATCH] drm/radeon/kms: fix hdmi duallink checks
by alexdeucher＠gmail.com 08 Mar '12

08 Mar '12

From: Alex Deucher <alexander.deucher(a)amd.com> All pre-SI chips are limited to 165 Mhz for single link. Code in question will be re-enabled when SI support is added. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=44755 https://bugzilla.kernel.org/show_bug.cgi?id=42887 Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Cc: stable(a)vger.kernel.org diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index e7cb3ab..931a41d 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c @@ -1057,7 +1057,7 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector, (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) return MODE_OK; else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) { - if (ASIC_IS_DCE3(rdev)) { + if (0) { /* HDMI 1.3+ supports max clock of 340 Mhz */ if (mode->clock > 340000) return MODE_CLOCK_HIGH; diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 9419c51..26e9270 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c @@ -307,8 +307,6 @@ void radeon_panel_mode_fixup(struct drm_encoder *encoder, bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, u32 pixel_clock) { - struct drm_device *dev = encoder->dev; - struct radeon_device *rdev = dev->dev_private; struct drm_connector *connector; struct radeon_connector *radeon_connector; struct radeon_connector_atom_dig *dig_connector; @@ -326,7 +324,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, case DRM_MODE_CONNECTOR_HDMIB: if (radeon_connector->use_digital) { /* HDMI 1.3 supports up to 340 Mhz over single link */ - if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) { + if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) { if (pixel_clock > 340000) return true; else @@ -348,7 +346,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder, return false; else { /* HDMI 1.3 supports up to 340 Mhz over single link */ - if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) { + if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) { if (pixel_clock > 340000) return true; else -- 1.7.7.5

1 0

[PATCH] drm/radeon/kms: set SX_MISC in the r6xx blit code (v2)
by Marek Olšák 07 Mar '12

07 Mar '12

Mesa may set it to 1, causing all primitives to be killed. v2: also update the r7xx code Signed-off-by: Marek Olšák <maraeo(a)gmail.com> Cc: stable(a)kernel.org --- drivers/gpu/drm/radeon/r600_blit_shaders.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c index 2d1f6c5..73e2c7c 100644 --- a/drivers/gpu/drm/radeon/r600_blit_shaders.c +++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c @@ -314,6 +314,10 @@ const u32 r6xx_default_state[] = 0x00000000, /* VGT_VTX_CNT_EN */ 0xc0016900, + 0x000000d4, + 0x00000000, /* SX_MISC */ + + 0xc0016900, 0x000002c8, 0x00000000, /* VGT_STRMOUT_BUFFER_EN */ @@ -626,6 +630,10 @@ const u32 r7xx_default_state[] = 0x00000000, /* VGT_VTX_CNT_EN */ 0xc0016900, + 0x000000d4, + 0x00000000, /* SX_MISC */ + + 0xc0016900, 0x000002c8, 0x00000000, /* VGT_STRMOUT_BUFFER_EN */ -- 1.7.5.4

2 1

Re: [PATCH 2/9] drm/i915/intel_i2c: assign HDMI port D to pin pair 6
by Chris Wilson 07 Mar '12

07 Mar '12

On Thu, 8 Mar 2012 02:02:03 +0800, Daniel Kurtz <djkurtz(a)chromium.org> wrote: > I'm not sure what exactly you mean by gen2 and gen3 specs, but, as far as I > can tell, the GPIO pin assignment is the same for both Cougar Point (Sandy > Bridge) [1] and Ibex Peak (?) [2]. Although, the documentation is a bit > confusing and it is difficult to tell. > > [1] http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part3.pdf > [2] http://intellinuxgraphics.org/IHD_OS_Vol3_Part3r2.pdf > > What do you mean exactly by gen2 & gen3? Can you point to docs? gen2 == 830gm,845g,855gm,865g gen3 == 915g,945g,PineView Those docs have not been completely scrubbed and made public yet. -Chris -- Chris Wilson, Intel Open Source Technology Centre

1 0

[PATCH] r6xx: initialize SX_MISC
by Marek Olšák 07 Mar '12

07 Mar '12

If Mesa set it to 1, the DDX would not render anything = the monitor would basically freeze. --- If it's right, please apply it to xf86-video-ati. I don't have commit access. src/r6xx_accel.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/r6xx_accel.c b/src/r6xx_accel.c index 8e6bffa..ab878c3 100644 --- a/src/r6xx_accel.c +++ b/src/r6xx_accel.c @@ -1200,6 +1200,7 @@ r600_set_default_state(ScrnInfoPtr pScrn, drmBufPtr ib) E32(ib, 0); // VGT_VTX_CNT_EN EREG(ib, VGT_STRMOUT_BUFFER_EN, 0); + EREG(ib, SX_MISC, 0); END_BATCH(); } -- 1.7.5.4

2 1

[PATCH] drm/radeon/kms: set SX_MISC in the r6xx blit code
by Marek Olšák 07 Mar '12

07 Mar '12

Mesa may set it to 1, causing all primitives to be killed. Signed-off-by: Marek Olšák <maraeo(a)gmail.com> --- I hope it's right. drivers/gpu/drm/radeon/r600_blit_shaders.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c index 2d1f6c5..ccec7d2 100644 --- a/drivers/gpu/drm/radeon/r600_blit_shaders.c +++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c @@ -314,6 +314,10 @@ const u32 r6xx_default_state[] = 0x00000000, /* VGT_VTX_CNT_EN */ 0xc0016900, + 0x000000d4, + 0x00000000, /* SX_MISC */ + + 0xc0016900, 0x000002c8, 0x00000000, /* VGT_STRMOUT_BUFFER_EN */ -- 1.7.5.4

2 1

[PATCH] drm/radeon: fix a semaphore deadlock on pre cayman asics
by Christian König 07 Mar '12

07 Mar '12

The out of order execution of semaphore commands on pre cayman asics doesn't work correctly and can cause deadlocks, so turn it off for now. Signed-off-by: Christian König <deathsimple(a)vodafone.de> --- drivers/gpu/drm/radeon/r600.c | 3 +++ drivers/gpu/drm/radeon/r600d.h | 1 + 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 8a6d68c..f0b3323 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -2362,6 +2362,9 @@ void r600_semaphore_ring_emit(struct radeon_device *rdev, uint64_t addr = semaphore->gpu_addr; unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; + if (rdev->family < CHIP_CAYMAN) + sel |= PACKET3_SEM_WAIT_ON_SIGNAL; + radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); radeon_ring_write(ring, addr & 0xffffffff); radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index 2ba460b..8ae328f 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h @@ -850,6 +850,7 @@ #define PACKET3_STRMOUT_BUFFER_UPDATE 0x34 #define PACKET3_INDIRECT_BUFFER_MP 0x38 #define PACKET3_MEM_SEMAPHORE 0x39 +# define PACKET3_SEM_WAIT_ON_SIGNAL (0x1 << 12) # define PACKET3_SEM_SEL_SIGNAL (0x6 << 29) # define PACKET3_SEM_SEL_WAIT (0x7 << 29) #define PACKET3_MPEG_INDEX 0x3A -- 1.7.5.4

2 1

[Bug 46796] [X800SE] Mouse cursor corruption when switching users
by bugzilla-daemon＠freedesktop.org 07 Mar '12

07 Mar '12

https://bugs.freedesktop.org/show_bug.cgi?id=46796 --- Comment #8 from Michel Dänzer <michel(a)daenzer.net> 2012-03-07 00:21:12 PST --- (In reply to comment #7) > I got the source for xserver-xorg-video-ati from the Ubuntu repositories and > tried to apply the patch to it. That can't work, as the patch is for the kernel, not the X driver. You should be able to get the source for your running kernel with apt-get source linux-image-$(uname -r) > I've also never tested a kernel mod so I'm not sure what I would do if > I got the patch to compile. Boot the patched kernel (or load the patched radeon kernel module) and try to reproduce the problem. Look for the message from comment #6 in dmesg. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug.

1 0

[Bug 46796] [X800SE] Mouse cursor corruption when switching users
by bugzilla-daemon＠freedesktop.org 07 Mar '12

07 Mar '12

https://bugs.freedesktop.org/show_bug.cgi?id=46796 Michel Dänzer <michel(a)daenzer.net> changed: What |Removed |Added ---------------------------------------------------------------------------- Attachment #57853|0 |1 is obsolete| | -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug.

1 0

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dri-devel March 2012