dri-devel June 2012

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drm/nouveau: NULL pointer deref in drm_handle_vblank() on rebind
by Bruno Prémont 08 Jun '12

08 Jun '12

I can easily trigger a crash in nouveau interrupt handler by unbinding and rebinding the GPU. The command used: echo $pci_device > nouveau/unbind && \ sleep 5 && \ echo $pci_device > nouveau/bind Kernel is 3.4.0 with modular drm/nouveau. GPU is NVidia nForce IGP (NV11) Unbinding seems to work fine, display switching back to VGA text mode. Rebinding the GPU slightly later causes the below trace: Bruno (analysis following below trace) [ 1432.012832] Console: … [View More]switching to colour VGA+ 80x25 [ 1432.014796] drm: unregistered panic notifier [ 1432.014905] [drm] nouveau 0000:02:00.0: Setting dpms mode 3 on vga encoder (output 0) [ 1432.026324] [drm] nouveau 0000:02:00.0: 0xAFD8: Parsing digital output script table [ 1432.026611] [drm] nouveau 0000:02:00.0: Restoring VGA fonts [ 1432.028353] [TTM] Finalizing pool allocator [ 1432.029325] [TTM] Zone kernel: Used memory at exit: 0 kiB [ 1437.066950] [drm] nouveau 0000:02:00.0: Detected an NV10 generation card (0x01a000b1) [ 1437.068909] [drm] nouveau 0000:02:00.0: Checking PRAMIN for VBIOS [ 1437.103400] [drm] nouveau 0000:02:00.0: ... BIOS checksum invalid [ 1437.103459] [drm] nouveau 0000:02:00.0: Checking PROM for VBIOS [ 1437.103638] [drm] nouveau 0000:02:00.0: ... BIOS checksum invalid [ 1437.103694] [drm] nouveau 0000:02:00.0: Checking ACPI for VBIOS [ 1437.103859] [drm] nouveau 0000:02:00.0: ... BIOS checksum invalid [ 1437.103915] [drm] nouveau 0000:02:00.0: Checking PCIROM for VBIOS [ 1437.105143] [drm] nouveau 0000:02:00.0: ... appears to be valid [ 1437.105217] [drm] nouveau 0000:02:00.0: Using VBIOS from PCIROM [ 1437.105507] [drm] nouveau 0000:02:00.0: BMP BIOS found [ 1437.105562] [drm] nouveau 0000:02:00.0: BMP version 5.20 [ 1437.105624] [drm] nouveau 0000:02:00.0: Bios version 03.1a.01.03 [ 1437.107663] [drm] nouveau 0000:02:00.0: MXM: no VBIOS data, nothing to do [ 1437.109053] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 0 at offset 0xA850 [ 1437.109120] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 1 at offset 0xADC5 [ 1437.109197] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 2 at offset 0xA851 [ 1437.109268] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 3 at offset 0xADC4 [ 1437.109337] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 4 at offset 0xA875 [ 1437.109405] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 5 at offset 0xA931 [ 1437.109494] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 6 at offset 0xA876 [ 1437.109572] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 7 at offset 0xA8CC [ 1437.109985] [TTM] Zone kernel: Available graphics memory: 240004 kiB [ 1437.110079] [TTM] Initializing pool allocator [ 1437.110177] [drm] nouveau 0000:02:00.0: Detected 32MiB VRAM (unknown type) [ 1437.110424] agpgart-nvidia 0000:00:00.0: AGP 2.0 bridge [ 1437.110566] agpgart-nvidia 0000:00:00.0: putting AGP V2 device into 4x mode [ 1437.110717] nouveau 0000:02:00.0: putting AGP V2 device into 4x mode [ 1437.110783] agpgart-nvidia 0000:00:00.0: AGP 2.0 bridge [ 1437.110865] agpgart-nvidia 0000:00:00.0: putting AGP V2 device into 4x mode [ 1437.111010] nouveau 0000:02:00.0: putting AGP V2 device into 4x mode [ 1437.111070] [drm] nouveau 0000:02:00.0: 32 MiB GART (aperture) [ 1437.111233] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111298] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111363] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111427] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111489] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111551] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111613] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111676] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111737] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111800] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111862] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111924] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.111986] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112048] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112110] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112172] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112233] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112296] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112357] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112420] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 1437.112577] [drm] nouveau 0000:02:00.0: Saving VGA fonts [ 1437.175978] BUG: unable to handle kernel NULL pointer dereference at (null) [ 1437.176134] IP: [<c1272dfc>] drm_handle_vblank+0x3c/0x1d0 [ 1437.176314] *pde = 00000000 [ 1437.176403] Oops: 0000 [#1] [ 1437.176491] Modules linked in: nouveau ttm drm_kms_helper cfbcopyarea mxm_wmi wmi cfbimgblt cfbfillrect nfs lockd nfs_acl sunrpc [ 1437.177120] [ 1437.177170] Pid: 1573, comm: bash Not tainted 3.4.0-jupiter-00007-g3b608b6-dirty #9 NVIDIA Corporation. nFORCE-MCP/MS-6373 [ 1437.177440] EIP: 0060:[<c1272dfc>] EFLAGS: 00010056 CPU: 0 [ 1437.177495] EIP is at drm_handle_vblank+0x3c/0x1d0 [ 1437.177549] EAX: 00000000 EBX: dbfe2cb0 ECX: 00000001 EDX: 00000000 [ 1437.177604] ESI: dbfe2cb0 EDI: feffffff EBP: dd40bf6c ESP: dd40bf18 [ 1437.177660] DS: 007b ES: 007b FS: 0000 GS: 00e0 SS: 0068 [ 1437.177714] CR0: 8005003b CR2: 00000000 CR3: 1cd25000 CR4: 000007d0 [ 1437.177770] DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000 [ 1437.177825] DR6: ffff0ff0 DR7: 00000400 [ 1437.177878] Process bash (pid: 1573, ti=dd40a000 task=dcdd9090 task.ti=dcd48000) [ 1437.177940] Stack: [ 1437.177987] 00000000 00000051 00000003 205b0028 dbd38cf0 00000000 c1022340 dd40bf78 [ 1437.178344] 00000000 dbd38cf0 00000000 dbfe2cb0 00000000 00000002 dd40bf78 dfa00100 [ 1437.178819] 00000002 0000007b dbfe2cb0 00000018 feffffff dd40bf78 de9da248 00000000 [ 1437.179183] Call Trace: [ 1437.179241] [<c1022340>] ? vmalloc_sync_all+0x130/0x130 [ 1437.179356] [<de9da248>] nv04_vblank_crtc0_isr+0x28/0x30 [nouveau] [ 1437.179427] [<de971204>] nouveau_irq_handler+0x64/0x100 [nouveau] [ 1437.179490] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 1437.179545] [<c106ff34>] handle_irq_event_percpu+0x54/0x1f0 [ 1437.179602] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 1437.179656] [<c10700f8>] handle_irq_event+0x28/0x40 [ 1437.179711] [<c107222b>] handle_fasteoi_irq+0x5b/0xf0 [ 1437.179763] <IRQ> [ 1437.179851] [<c1003f9a>] ? do_IRQ+0x3a/0xb0 [ 1437.179911] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 1437.179969] [<c10c0adc>] ? __slab_alloc.clone.68+0x4c/0x3e0 [ 1437.180005] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 1437.180005] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 1437.180005] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 1437.180005] [<c10c1a5d>] ? __kmalloc+0x15d/0x1f0 [ 1437.180005] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 1437.180005] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 1437.180005] [<de98e36f>] ? nouveau_display_create+0x43f/0x4e0 [nouveau] [ 1437.180005] [<de96af7c>] ? nouveau_card_init+0x16ac/0x1a70 [nouveau] [ 1437.180005] [<de969770>] ? nouveau_card_channel_fini+0x20/0x20 [nouveau] [ 1437.180005] [<de96b86e>] ? nouveau_load+0x3fe/0x830 [nouveau] [ 1437.180005] [<c1276305>] ? drm_get_pci_dev+0x135/0x260 [ 1437.180005] [<de9f6b79>] ? nouveau_pci_probe+0xd/0xf [nouveau] [ 1437.180005] [<c11f70a1>] ? local_pci_probe+0x41/0xb0 [ 1437.180005] [<c11f7560>] ? pci_device_probe+0x60/0x80 [ 1437.180005] [<c128ec25>] ? driver_probe_device+0x75/0x1d0 [ 1437.180005] [<c11f6f8a>] ? pci_match_device+0x9a/0xa0 [ 1437.180005] [<c128db87>] ? driver_bind+0x97/0xe0 [ 1437.180005] [<c128daf0>] ? driver_unbind+0x90/0x90 [ 1437.180005] [<c128d217>] ? drv_attr_store+0x27/0x30 [ 1437.180005] [<c1117a59>] ? sysfs_write_file+0x99/0x100 [ 1437.180005] [<c10c95ea>] ? vfs_write+0x9a/0x140 [ 1437.180005] [<c10d6a90>] ? sys_dup3+0xf0/0x150 [ 1437.180005] [<c10d6f8c>] ? do_fcntl+0x36c/0x4a0 [ 1437.180005] [<c11179c0>] ? sysfs_poll+0x90/0x90 [ 1437.180005] [<c10c986d>] ? sys_write+0x3d/0x70 [ 1437.180005] [<c1404e97>] ? sysenter_do_call+0x12/0x26 [ 1437.180005] Code: 00 00 89 55 cc 85 c9 0f 84 4d 01 00 00 9c 8f 45 e0 fa 89 e0 25 00 e0 ff ff ff 40 14 c1 e2 02 8b 86 58 01 00 00 89 55 dc 8b 55 cc <8b> 04 90 85 c0 0f 84 31 01 00 00 8b 45 dc 03 86 48 01 00 00 According to objdump that would match: bool drm_handle_vblank(struct drm_device *dev, int crtc) { u32 vblcount; s64 diff_ns; struct timeval tvblank; unsigned long irqflags; if (!dev->num_crtcs) return false; /* Need timestamp lock to prevent concurrent execution with * vblank enable/disable, as this would cause inconsistent * or corrupted timestamps and vblank counts. */ spin_lock_irqsave(&dev->vblank_time_lock, irqflags); /* Vblank irq handling disabled. Nothing to do. */ if (!dev->vblank_enabled[crtc]) { spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags); return false; } /* Vblank irq handling disabled. Nothing to do. */ if (!dev->vblank_enabled[crtc]) { 1e1d: c1 e2 02 shl $0x2,%edx 1e20: 8b 86 58 01 00 00 mov 0x158(%esi),%eax 1e26: 89 55 dc mov %edx,-0x24(%ebp) 1e29: 8b 55 cc mov -0x34(%ebp),%edx >>> 1e2c: 8b 04 90 mov (%eax,%edx,4),%eax 1e2f: 85 c0 test %eax,%eax 1e31: 0f 84 31 01 00 00 je 1f68 <drm_handle_vblank+0x178> That means that dev->vblank_enabled is not initialized yet while IRQs are already triggering? I check the assumption that dev->vblank_enabled is NULL by first testing it before trying to access [crtc] and firing a WARN_ON which indicates that it happens 3 times untile probing of GPU completes: [ 149.017679] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 149.017741] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 149.017803] [drm] nouveau 0000:02:00.0: PMC - unhandled INTR 0x01000000 [ 149.017956] [drm] nouveau 0000:02:00.0: Saving VGA fonts [ 149.082726] ------------[ cut here ]------------ [ 149.082817] WARNING: at /usr/src/linux-git/drivers/gpu/drm/drm_irq.c:1302 drm_handle_vblank+0x1e2/0x1f0() [ 149.082884] Hardware name: nFORCE-MCP [ 149.082937] Modules linked in: nouveau ttm cfbcopyarea mxm_wmi wmi cfbimgblt cfbfillrect drm_kms_helper nfs lockd nfs_acl sunrpc [ 149.083669] Pid: 1564, comm: bash Not tainted 3.4.0-jupiter-00007-g3b608b6-dirty #10 [ 149.083733] Call Trace: [ 149.083791] [<c102a53d>] warn_slowpath_common+0x6d/0xa0 [ 149.083849] [<c1272fa2>] ? drm_handle_vblank+0x1e2/0x1f0 [ 149.083906] [<c1272fa2>] ? drm_handle_vblank+0x1e2/0x1f0 [ 149.083963] [<c102a58d>] warn_slowpath_null+0x1d/0x20 [ 149.084018] [<c1272fa2>] drm_handle_vblank+0x1e2/0x1f0 [ 149.084078] [<c1022340>] ? vmalloc_sync_all+0x130/0x130 [ 149.084139] [<c1404c29>] ? error_code+0x65/0x6c [ 149.084198] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 149.084308] [<de9c9248>] nv04_vblank_crtc0_isr+0x28/0x30 [nouveau] [ 149.084378] [<de960204>] nouveau_irq_handler+0x64/0x100 [nouveau] [ 149.084459] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 149.084598] [<c106ff34>] handle_irq_event_percpu+0x54/0x1f0 [ 149.084654] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 149.084708] [<c10700f8>] handle_irq_event+0x28/0x40 [ 149.084763] [<c107222b>] handle_fasteoi_irq+0x5b/0xf0 [ 149.084815] <IRQ> [<c1003f9a>] ? do_IRQ+0x3a/0xb0 [ 149.084912] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 149.084968] [<c10c0adc>] ? __slab_alloc.clone.68+0x4c/0x3e0 [ 149.085024] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.085078] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.085136] [<c103055c>] ? irq_exit+0x5c/0xa0 [ 149.085189] [<c1003fa3>] ? do_IRQ+0x43/0xb0 [ 149.085242] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 149.085296] [<c10c1a5d>] ? __kmalloc+0x15d/0x1f0 [ 149.085350] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.085405] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.085475] [<de97d36f>] ? nouveau_display_create+0x43f/0x4e0 [nouveau] [ 149.085544] [<de959f7c>] ? nouveau_card_init+0x16ac/0x1a70 [nouveau] [ 149.085612] [<de958770>] ? nouveau_card_channel_fini+0x20/0x20 [nouveau] [ 149.085680] [<de95a86e>] ? nouveau_load+0x3fe/0x830 [nouveau] [ 149.085737] [<c1276325>] ? drm_get_pci_dev+0x135/0x260 [ 149.085808] [<de9e5b79>] ? nouveau_pci_probe+0xd/0xf [nouveau] [ 149.085869] [<c11f70a1>] ? local_pci_probe+0x41/0xb0 [ 149.085924] [<c11f7560>] ? pci_device_probe+0x60/0x80 [ 149.085992] [<c128ec45>] ? driver_probe_device+0x75/0x1d0 [ 149.086047] [<c11f6f8a>] ? pci_match_device+0x9a/0xa0 [ 149.086223] [<c128dba7>] ? driver_bind+0x97/0xe0 [ 149.086278] [<c128db10>] ? driver_unbind+0x90/0x90 [ 149.086333] [<c128d237>] ? drv_attr_store+0x27/0x30 [ 149.087347] [<c1117a59>] ? sysfs_write_file+0x99/0x100 [ 149.087404] [<c10c95ea>] ? vfs_write+0x9a/0x140 [ 149.087461] [<c10d6a90>] ? sys_dup3+0xf0/0x150 [ 149.087515] [<c10d6f8c>] ? do_fcntl+0x36c/0x4a0 [ 149.087567] [<c11179c0>] ? sysfs_poll+0x90/0x90 [ 149.087621] [<c10c986d>] ? sys_write+0x3d/0x70 [ 149.087675] [<c1404e97>] ? sysenter_do_call+0x12/0x26 [ 149.087729] ---[ end trace 5d73f7bccc0ebc64 ]--- [ 149.087802] ------------[ cut here ]------------ [ 149.087888] WARNING: at /usr/src/linux-git/drivers/gpu/drm/drm_irq.c:1302 drm_handle_vblank+0x1e2/0x1f0() [ 149.087953] Hardware name: nFORCE-MCP [ 149.088002] Modules linked in: nouveau ttm cfbcopyarea mxm_wmi wmi cfbimgblt cfbfillrect drm_kms_helper nfs lockd nfs_acl sunrpc [ 149.088543] Pid: 1564, comm: bash Tainted: G W 3.4.0-jupiter-00007-g3b608b6-dirty #10 [ 149.088606] Call Trace: [ 149.088656] [<c102a53d>] warn_slowpath_common+0x6d/0xa0 [ 149.088710] [<c1272fa2>] ? drm_handle_vblank+0x1e2/0x1f0 [ 149.088765] [<c1272fa2>] ? drm_handle_vblank+0x1e2/0x1f0 [ 149.088819] [<c102a58d>] warn_slowpath_null+0x1d/0x20 [ 149.088874] [<c1272fa2>] drm_handle_vblank+0x1e2/0x1f0 [ 149.088928] [<c1022340>] ? vmalloc_sync_all+0x130/0x130 [ 149.088983] [<c1404c29>] ? error_code+0x65/0x6c [ 149.089036] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 149.089110] [<de9c9248>] nv04_vblank_crtc0_isr+0x28/0x30 [nouveau] [ 149.089178] [<de960204>] nouveau_irq_handler+0x64/0x100 [nouveau] [ 149.089234] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 149.089287] [<c106ff34>] handle_irq_event_percpu+0x54/0x1f0 [ 149.089342] [<c10721d0>] ? unmask_irq+0x20/0x20 [ 149.089395] [<c10700f8>] handle_irq_event+0x28/0x40 [ 149.089449] [<c107222b>] handle_fasteoi_irq+0x5b/0xf0 [ 149.089500] <IRQ> [<c1003f9a>] ? do_IRQ+0x3a/0xb0 [ 149.089593] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 149.089651] [<c12d7687>] ? nv_napi_poll+0xe7/0x590 [ 149.089705] [<c103055c>] ? irq_exit+0x5c/0xa0 [ 149.089757] [<c1003fa3>] ? do_IRQ+0x43/0xb0 [ 149.089832] [<c137cf2c>] ? __qdisc_run+0x4c/0x110 [ 149.089889] [<c1368328>] ? net_rx_action+0xd8/0x1b0 [ 149.089943] [<c1030275>] ? __do_softirq+0x85/0x1a0 [ 149.089997] [<c10301f0>] ? local_bh_enable_ip+0x80/0x80 [ 149.090010] <IRQ> [<c1030576>] ? irq_exit+0x76/0xa0 [ 149.090010] [<c1003fa3>] ? do_IRQ+0x43/0xb0 [ 149.090010] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 149.090010] [<c10c0adc>] ? __slab_alloc.clone.68+0x4c/0x3e0 [ 149.090010] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.090010] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.090010] [<c103055c>] ? irq_exit+0x5c/0xa0 [ 149.090010] [<c1003fa3>] ? do_IRQ+0x43/0xb0 [ 149.090010] [<c14053b0>] ? common_interrupt+0x30/0x38 [ 149.090010] [<c10c1a5d>] ? __kmalloc+0x15d/0x1f0 [ 149.090010] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.090010] [<c1271e83>] ? drm_vblank_init+0x43/0x1d0 [ 149.090010] [<de97d36f>] ? nouveau_display_create+0x43f/0x4e0 [nouveau] [ 149.090010] [<de959f7c>] ? nouveau_card_init+0x16ac/0x1a70 [nouveau] [ 149.090010] [<de958770>] ? nouveau_card_channel_fini+0x20/0x20 [nouveau] [ 149.090010] [<de95a86e>] ? nouveau_load+0x3fe/0x830 [nouveau] [ 149.090010] [<c1276325>] ? drm_get_pci_dev+0x135/0x260 [ 149.090010] [<de9e5b79>] ? nouveau_pci_probe+0xd/0xf [nouveau] [ 149.090010] [<c11f70a1>] ? local_pci_probe+0x41/0xb0 [ 149.090010] [<c11f7560>] ? pci_device_probe+0x60/0x80 [ 149.090010] [<c128ec45>] ? driver_probe_device+0x75/0x1d0 [ 149.090010] [<c11f6f8a>] ? pci_match_device+0x9a/0xa0 [ 149.090010] [<c128dba7>] ? driver_bind+0x97/0xe0 [ 149.090010] [<c128db10>] ? driver_unbind+0x90/0x90 [ 149.090010] [<c128d237>] ? drv_attr_store+0x27/0x30 [ 149.090010] [<c1117a59>] ? sysfs_write_file+0x99/0x100 [ 149.090010] [<c10c95ea>] ? vfs_write+0x9a/0x140 [ 149.090010] [<c10d6a90>] ? sys_dup3+0xf0/0x150 [ 149.090010] [<c10d6f8c>] ? do_fcntl+0x36c/0x4a0 [ 149.090010] [<c11179c0>] ? sysfs_poll+0x90/0x90 [ 149.090010] [<c10c986d>] ? sys_write+0x3d/0x70 [ 149.090010] [<c1404e97>] ? sysenter_do_call+0x12/0x26 [ 149.090010] ---[ end trace 5d73f7bccc0ebc65 ]--- [ 149.097648] ------------[ cut here ]------------ [ 149.097726] WARNING: at /usr/src/linux-git/drivers/gpu/drm/drm_irq.c:1302 drm_handle_vblank+0x1e2/0x1f0() [ 149.097793] Hardware name: nFORCE-MCP [ 149.097842] Modules linked in: nouveau ttm cfbcopyarea mxm_wmi wmi cfbimgblt cfbfillrect drm_kms_helper nfs lockd nfs_acl sunrpc [ 149.098398] Pid: 1835, comm: syslog-ng Tainted: G W 3.4.0-jupiter-00007-g3b608b6-dirty #10 [ 149.098463] Call Trace: [ 149.098519] [<c102a53d>] warn_slowpath_common+0x6d/0xa0 [ 149.098575] [<c1272fa2>] ? drm_handle_vblank+0x1e2/0x1f0 [ 149.098632] [<c1272fa2>] ? drm_handle_vblank+0x1e2/0x1f0 [ 149.098686] [<c102a58d>] warn_slowpath_null+0x1d/0x20 [ 149.098741] [<c1272fa2>] drm_handle_vblank+0x1e2/0x1f0 [ 149.098800] [<c1022340>] ? vmalloc_sync_all+0x130/0x130 [ 149.098860] [<c1404c29>] ? error_code+0x65/0x6c [ 149.098973] [<de9c9248>] nv04_vblank_crtc0_isr+0x28/0x30 [nouveau] [ 149.099042] [<de960204>] nouveau_irq_handler+0x64/0x100 [nouveau] [ 149.099103] [<c106ff34>] handle_irq_event_percpu+0x54/0x1f0 [ 149.099158] [<c10700f8>] handle_irq_event+0x28/0x40 [ 149.099214] [<c107222b>] handle_fasteoi_irq+0x5b/0xf0 [ 149.099271] [<c1004176>] handle_irq+0x56/0xe0 [ 149.099323] [<c1003f9a>] do_IRQ+0x3a/0xb0 [ 149.099380] [<c10c986d>] ? sys_write+0x3d/0x70 [ 149.099435] [<c14053b0>] common_interrupt+0x30/0x38 [ 149.099488] ---[ end trace 5d73f7bccc0ebc66 ]--- [ 149.100069] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010). [ 149.100130] [drm] No driver support for vblank timestamp query. [ 149.100224] [drm] nouveau 0000:02:00.0: 0 available performance level(s) [ 149.100284] [drm] nouveau 0000:02:00.0: c: core 174MHz memory 0MHz [ 149.102004] [drm] nouveau 0000:02:00.0: 0xAFD8: Parsing digital output script table [ 149.102299] [drm] nouveau 0000:02:00.0: Setting dpms mode 3 on vga encoder (output 0) [ 149.102365] [drm] nouveau 0000:02:00.0: Setting dpms mode 3 on tmds encoder (output 1) [ 149.297232] [drm] nouveau 0000:02:00.0: Load detected on head A [ 149.305870] [drm] Got external EDID base block and 0 extensions from "edid/iiyama-ProLite_E431.bin" for connector "DVI-I-2" [ 149.307904] [drm] nouveau 0000:02:00.0: allocated 1280x1024 fb: 0x45000, bo dcea6000 [ 149.308177] fbcon: New framebuffer notification for fb0 [ 149.308233] fbcon: nouveaufb (fb0) is primary device [ 149.308294] fbcon: info_fb unset... [ 149.319739] [drm] nouveau 0000:02:00.0: Setting dpms mode 0 on vga encoder (output 0) [ 149.319746] [drm] nouveau 0000:02:00.0: Output DVI-I-2 is running on CRTC 0 using output A [ 149.325136] Console: switching to colour frame buffer device 160x64 [ 149.327824] fbcon: info_fb set, takeover = 0... [ 149.327851] fbcon: info is dcd3b4d0, info_fb is dcd3b4d0, con2fb_map[0] = dcd3b4d0, con2fb_map_boot[0] = 0 [ 149.327901] fb0: nouveaufb frame buffer device [ 149.327930] drm: registered panic notifier [ 149.327967] [drm] Initialized nouveau 1.0.0 20120316 for 0000:02:00.0 on minor 0 [View Less]

2 2

re: drm/i915: add support for SBI ops
by Dan Carpenter 08 Jun '12

08 Jun '12

Hello Eugeni Dodonov, The patch a416edefbbaf: "drm/i915: add support for SBI ops" from May 9, 2012, leads to the following warning: drivers/gpu/drm/i915/intel_display.c:1347 intel_sbi_write() warn: bitwise AND condition is false here SBI_READY is defined like this: #define SBI_READY (0x0<<0) 1346 spin_lock_irqsave(&dev_priv->dpio_lock, flags); 1347 if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_READY) == 0, if ((x & 0)… [View More]

3 2

Re: Synchronization framework
by Maarten Lankhorst 08 Jun '12

08 Jun '12

Hey Erik, Op 07-06-12 19:35, Erik Gilling schreef: > On Thu, Jun 7, 2012 at 1:55 AM, Maarten Lankhorst > <m.b.lankhorst(a)gmail.com> wrote: >> I haven't looked at intel and amd, but from a quick glance >> it seems like they already implement fencing too, so just >> some way to synch up the fences on shared buffers seems >> like it could benefit all graphics drivers and the whole >> userspace synching could be done away with entirely. > It's … [View More]

2 1

[PATCH v5] intel: wait render timeout implementation
by Ben Widawsky 08 Jun '12

08 Jun '12

int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns) This should bump the libdrm version. We're waiting for context support so we can do both features in one bump. v2: don't return remaining timeout amount use get param and fallback for older kernels v3: only doing getparam at init prototypes now have a signed input value v4: update comments fall back to correct polling behavior with new userspace and old kernel v5: since the drmIoctl patch was not well received, return … [View More]appropriate values in this function instead. As Daniel pointed out, the polling case (timeout == 0) should also return -ETIME. Cc: Eric Anholt <eric(a)anholt.net> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Signed-off-by: Ben Widawsky <ben(a)bwidawsk.net> --- intel/intel_bufmgr.h | 1 + intel/intel_bufmgr_gem.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+) diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index c197abc..fa6c4dd 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h @@ -184,6 +184,7 @@ int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id); int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total); int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr); +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns); /* drm_intel_bufmgr_fake.c */ drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd, diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index b776d2f..e90f8bd 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -119,6 +119,7 @@ typedef struct _drm_intel_bufmgr_gem { unsigned int has_blt : 1; unsigned int has_relaxed_fencing : 1; unsigned int has_llc : 1; + unsigned int has_wait_timeout : 1; unsigned int bo_reuse : 1; unsigned int no_exec : 1; bool fenced_relocs; @@ -1479,6 +1480,58 @@ drm_intel_gem_bo_wait_rendering(drm_intel_bo *bo) } /** + * Waits on a BO for the given amount of time. + * + * @bo: buffer object to wait for + * @timeout_ns: amount of time to wait in nanoseconds. + * If value is less than 0, an infinite wait will occur. + * + * Returns 0 if the wait was successful ie. the last batch referencing the + * object has completed within the allotted time. Otherwise some negative return + * value describes the error. Of particular interest is -ETIME when the wait has + * failed to yield the desired result. + * + * Similar to drm_intel_gem_bo_wait_rendering except a timeout parameter allows + * the operation to give up after a certain amount of time. Another subtle + * difference is the internal locking semantics are different (this variant does + * not hold the lock for the duration of the wait). This makes the wait subject + * to a larger userspace race window. + * + * The implementation shall wait until the object is no longer actively + * referenced within a batch buffer at the time of the call. The wait will + * not guarantee that the buffer is re-issued via another thread, or an flinked + * handle. Userspace must make sure this race does not occur if such precision + * is important. + */ +int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns) +{ + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; + struct drm_i915_gem_wait wait; + int ret; + + if (!bufmgr_gem->has_wait_timeout) { + DBG("%s:%d: Timed wait is not supported. Falling back to " + "infinite wait\n", __FILE__, __LINE__); + if (timeout_ns) { + drm_intel_gem_bo_wait_rendering(bo); + return 0; + } else { + return drm_intel_gem_bo_busy(bo) ? -ETIME : 0; + } + } + + wait.bo_handle = bo_gem->gem_handle; + wait.timeout_ns = timeout_ns; + wait.flags = 0; + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_WAIT, &wait); + if (ret == -1) + return -errno; + + return ret; +} + +/** * Sets the object to the GTT read and possibly write domain, used by the X * 2D driver in the absence of kernel support to do drm_intel_gem_bo_map_gtt(). * @@ -2898,6 +2951,10 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); bufmgr_gem->has_relaxed_fencing = ret == 0; + gp.param = I915_PARAM_HAS_WAIT_TIMEOUT; + ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); + bufmgr_gem->has_wait_timeout = ret == 0; + gp.param = I915_PARAM_HAS_LLC; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp); if (ret != 0) { -- 1.7.10.3 [View Less]

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[Bug 17902] [830M missing dvo driver] need support for DVO-LVDS via na2501
by bugzilla-daemon＠freedesktop.org 08 Jun '12

08 Jun '12

https://bugs.freedesktop.org/show_bug.cgi?id=17902 thor(a)math.tu-berlin.de changed: What |Removed |Added ---------------------------------------------------------------------------- Status|REOPENED |RESOLVED Resolution| |WORKSFORME --- Comment #85 from thor(a)math.tu-berlin.de 2012-06-08 09:06:59 PDT --- Now I also got the scaler "pseudo-working" by inspecting which values the vesa BIOS … [View More]leaves behind in the DVO and just copying these values. By now I can support 640x480, 800x600 and the native resolution, which is here 1024x768. Unfortunately, I do not have the right vesa BIOS data for the latter, and for anything else, so your milage may vary. Also, the scaler support is somehow hacky as the DVO first needs to be turned on by enabling the PLL by poking into the chipset registers (yuck!). It's really a beasty chip. I will submit the patch to the mailing list later this day, here for your records: diff -rup linux-3.4.1-orig/drivers/gpu/drm/i915/dvo.h linux-3.4.1/drivers/gpu/drm/i915/dvo.h --- linux-3.4.1-orig/drivers/gpu/drm/i915/dvo.h 2012-06-01 09:18:44.000000000 +0200 +++ linux-3.4.1/drivers/gpu/drm/i915/dvo.h 2012-06-08 13:15:19.000000000 +0200 @@ -140,5 +140,6 @@ extern struct intel_dvo_dev_ops ch7xxx_o extern struct intel_dvo_dev_ops ivch_ops; extern struct intel_dvo_dev_ops tfp410_ops; extern struct intel_dvo_dev_ops ch7017_ops; +extern struct intel_dvo_dev_ops ns2501_ops; #endif /* _INTEL_DVO_H */ diff -rup linux-3.4.1-orig/drivers/gpu/drm/i915/dvo_ns2501.c linux-3.4.1/drivers/gpu/drm/i915/dvo_ns2501.c --- linux-3.4.1-orig/drivers/gpu/drm/i915/dvo_ns2501.c 2012-06-08 17:59:20.000000000 +0200 +++ linux-3.4.1/drivers/gpu/drm/i915/dvo_ns2501.c 2012-06-08 17:52:21.000000000 +0200 @@ -0,0 +1,544 @@ +/************************************************************************** + +Copyright © 2012 Gilles Dartiguelongue, Thomas Richter + +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sub license, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +#include "dvo.h" +#include "i915_reg.h" +#include "i915_drv.h" + +#define NS2501_VID 0x1305 +#define NS2501_DID 0x6726 + +#define NS2501_VID_LO 0x00 +#define NS2501_VID_HI 0x01 +#define NS2501_DID_LO 0x02 +#define NS2501_DID_HI 0x03 +#define NS2501_REV 0x04 +#define NS2501_RSVD 0x05 +#define NS2501_FREQ_LO 0x06 +#define NS2501_FREQ_HI 0x07 + +#define NS2501_REG8 0x08 +#define NS2501_8_VEN (1<<5) +#define NS2501_8_HEN (1<<4) +#define NS2501_8_DSEL (1<<3) +#define NS2501_8_BPAS (1<<2) +#define NS2501_8_RSVD (1<<1) +#define NS2501_8_PD (1<<0) + +#define NS2501_REG9 0x09 +#define NS2501_9_VLOW (1<<7) +#define NS2501_9_MSEL_MASK (0x7<<4) +#define NS2501_9_TSEL (1<<3) +#define NS2501_9_RSEN (1<<2) +#define NS2501_9_RSVD (1<<1) +#define NS2501_9_MDI (1<<0) + +#define NS2501_REGC 0x0c + +struct ns2501_priv { + //I2CDevRec d; + bool quiet; + int reg_8_shadow; + int reg_8_set; + // Shadow registers for i915 + int dvoc; + int pll_a; + int srcdim; + int fw_blc; +}; + +#define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr)) + +/* +** Include the PLL launcher prototype +*/ +extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); + +/* +** For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens +** laptops does not react on the i2c bus unless +** both the PLL is running and the display is configured in its native +** resolution. +** This function forces the DVO on, and stores the registers it touches. +** Afterwards, registers are restored to regular values. +** +** This is pretty much a hack, though it works. +** Without that, ns2501_readb and ns2501_writeb fail +** when switching the resolution. +*/ + +static void enable_dvo(struct intel_dvo_device *dvo) +{ + struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); + struct i2c_adapter *adapter = dvo->i2c_bus; + struct intel_gmbus *bus = container_of(adapter, + struct intel_gmbus, + adapter); + struct drm_i915_private *dev_priv = bus->dev_priv; + + DRM_DEBUG_KMS("%s: Trying to re-enable the DVO\n",__FUNCTION__); + + ns->dvoc = I915_READ(DVO_C); + ns->pll_a = I915_READ(_DPLL_A); + ns->srcdim = I915_READ(DVOC_SRCDIM); + ns->fw_blc = I915_READ(FW_BLC); + + I915_WRITE(DVOC, 0x10004084); + I915_WRITE(_DPLL_A,0xd0820000); + I915_WRITE(DVOC_SRCDIM,0x400300); // 1024x768 + I915_WRITE(FW_BLC,0x1080304); + + intel_enable_pll(dev_priv,0); + + I915_WRITE(DVOC, 0x90004084); +} + +/* +** Restore the I915 registers modified by the above +** trigger function. +*/ +static void restore_dvo(struct intel_dvo_device *dvo) +{ + struct i2c_adapter *adapter = dvo->i2c_bus; + struct intel_gmbus *bus = container_of(adapter, + struct intel_gmbus, + adapter); + struct drm_i915_private *dev_priv = bus->dev_priv; + struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); + + I915_WRITE(DVOC ,ns->dvoc); + I915_WRITE(_DPLL_A ,ns->pll_a); + I915_WRITE(DVOC_SRCDIM,ns->srcdim); + I915_WRITE(FW_BLC ,ns->fw_blc); +} + +/* +** Read a register from the ns2501. +** Returns true if successful, false otherwise. +** If it returns false, it might be wise to enable the +** DVO with the above function. +*/ +static bool ns2501_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch) +{ + struct ns2501_priv *ns = dvo->dev_priv; + struct i2c_adapter *adapter = dvo->i2c_bus; + u8 out_buf[2]; + u8 in_buf[2]; + + struct i2c_msg msgs[] = { + { + .addr = dvo->slave_addr, + .flags = 0, + .len = 1, + .buf = out_buf, + }, + { + .addr = dvo->slave_addr, + .flags = I2C_M_RD, + .len = 1, + .buf = in_buf, + } + }; + + out_buf[0] = addr; + out_buf[1] = 0; + + if (i2c_transfer(adapter, msgs, 2) == 2) { + *ch = in_buf[0]; + return true; + }; + + if (!ns->quiet) { + DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:0x%02x.\n", + addr, adapter->name, dvo->slave_addr); + } + + return false; +} + +/* +** Write a register to the ns2501. +** Returns true if successful, false otherwise. +** If it returns false, it might be wise to enable the +** DVO with the above function. +*/ +static bool ns2501_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch) +{ + struct ns2501_priv *ns = dvo->dev_priv; + struct i2c_adapter *adapter = dvo->i2c_bus; + uint8_t out_buf[2]; + + struct i2c_msg msg = { + .addr = dvo->slave_addr, + .flags = 0, + .len = 2, + .buf = out_buf, + }; + + out_buf[0] = addr; + out_buf[1] = ch; + + if (i2c_transfer(adapter, &msg, 1) == 1) { + return true; + } + + if (!ns->quiet) { + DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d\n", + addr, adapter->name, dvo->slave_addr); + } + + return false; +} + +/* National Semiconductor 2501 driver for chip on i2c bus +** scan for the chip on the bus. +** Hope the VBIOS initialized the PLL correctly so we can +** talk to it. If not, it will not be seen and not detected. +** Bummer! +*/ +static bool ns2501_init(struct intel_dvo_device *dvo, + struct i2c_adapter *adapter) +{ + /* this will detect the NS2501 chip on the specified i2c bus */ + struct ns2501_priv *ns; + unsigned char ch; + + ns = kzalloc(sizeof(struct ns2501_priv), GFP_KERNEL); + if (ns == NULL) + return false; + + dvo->i2c_bus = adapter; + dvo->dev_priv = ns; + ns->quiet = true; + + if (!ns2501_readb(dvo, NS2501_VID_LO, &ch)) + goto out; + + if (ch != (NS2501_VID & 0xff)) { + DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n", + ch, adapter->name, dvo->slave_addr); + goto out; + } + + if (!ns2501_readb(dvo, NS2501_DID_LO, &ch)) + goto out; + + if (ch != (NS2501_DID & 0xff)) { + DRM_DEBUG_KMS("ns2501 not detected got %d: from %s Slave %d.\n", + ch, adapter->name, dvo->slave_addr); + goto out; + } + ns->quiet = false; + ns->reg_8_set = 0; + ns->reg_8_shadow = NS2501_8_PD | NS2501_8_BPAS | NS2501_8_VEN | NS2501_8_HEN; + + DRM_DEBUG_KMS("init ns2501 dvo controller successfully!\n"); + return true; + + out: + kfree(ns); + return false; +} + +static enum drm_connector_status ns2501_detect(struct intel_dvo_device *dvo) +{ + /* + ** This is a Laptop display, it doesn't have hotplugging. + ** Even if not, the detection bit of the 2501 is unreliable as + ** it only works for some display types. + ** It is even more unreliable as the PLL must be active for + ** allowing reading from the chiop. + */ + return connector_status_connected; +} + +static enum drm_mode_status ns2501_mode_valid(struct intel_dvo_device *dvo, + struct drm_display_mode *mode) +{ + DRM_DEBUG_KMS("%s: is mode valid (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d)\n",__FUNCTION__, + mode->hdisplay,mode->htotal,mode->vdisplay,mode->vtotal); + + + /* + ** Currently, these are all the modes I have data from. + ** More might exist. Unclear how to find the native resolution + ** of the panel in here so we could always accept it + ** by disabling the scaler. + */ + if ((mode->hdisplay == 800 && mode->vdisplay == 600) || + (mode->hdisplay == 640 && mode->vdisplay == 480) || + (mode->hdisplay == 1024 && mode->vdisplay == 768)) { + return MODE_OK; + } else { + return MODE_ONE_SIZE; /* Is this a reasonable error? */ + } +} + +static void ns2501_mode_set(struct intel_dvo_device *dvo, + struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); + + DRM_DEBUG_KMS("%s: set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d).\n",__FUNCTION__, + mode->hdisplay,mode->htotal,mode->vdisplay,mode->vtotal); + + /* + ** Where do I find the native resolution for which scaling is not required??? + ** + ** First trigger the DVO on as otherwise the chip does not appear on the i2c + ** bus. + */ + enable_dvo(dvo); + + if (mode->hdisplay == 800 && mode->vdisplay == 600) { + /* mode 277 */ + ns->reg_8_shadow &= ~NS2501_8_BPAS; + DRM_DEBUG_KMS("%s: switching to 800x600\n",__FUNCTION__); + + /* + ** No, I do not know where this data comes from. + ** It is just what the video bios left in the DVO, so + ** I'm just copying it here over. + ** This also means that I cannot support any other modes + ** except the ones supported by the bios. + */ + ns2501_writeb(dvo, 0x11, 0xc8); + ns2501_writeb(dvo, 0x1b, 0x19); + ns2501_writeb(dvo, 0x1c, 0x64); + ns2501_writeb(dvo, 0x1d, 0x02); + + ns2501_writeb(dvo, 0x34, 0x03); + ns2501_writeb(dvo, 0x35, 0xff); + + ns2501_writeb(dvo, 0x80, 0x27); + ns2501_writeb(dvo, 0x81, 0x03); + ns2501_writeb(dvo, 0x82, 0x41); + ns2501_writeb(dvo, 0x83, 0x05); + + ns2501_writeb(dvo, 0x8d, 0x02); + ns2501_writeb(dvo, 0x8e, 0x04); + ns2501_writeb(dvo, 0x8f, 0x00); + + ns2501_writeb(dvo, 0x90, 0xff); /* vertical */ + ns2501_writeb(dvo, 0x91, 0x07); + ns2501_writeb(dvo, 0x94, 0x00); + ns2501_writeb(dvo, 0x95, 0x00); + + ns2501_writeb(dvo, 0x96, 0x00); + + ns2501_writeb(dvo, 0x99, 0x00); + ns2501_writeb(dvo, 0x9a, 0x88); + + ns2501_writeb(dvo, 0x9c, 0x23); + ns2501_writeb(dvo, 0x9d, 0x00); + ns2501_writeb(dvo, 0x9e, 0x25); + ns2501_writeb(dvo, 0x9f, 0x03); + + ns2501_writeb(dvo, 0xa4, 0x80); + + ns2501_writeb(dvo, 0xb6, 0x00); + + ns2501_writeb(dvo, 0xb9, 0xc8); /* horizontal? */ + ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */ + + ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */ + ns2501_writeb(dvo, 0xc1, 0xd7); + + ns2501_writeb(dvo, 0xc2, 0x00); + ns2501_writeb(dvo, 0xc3, 0xf8); + + ns2501_writeb(dvo, 0xc4, 0x03); + ns2501_writeb(dvo, 0xc5, 0x1a); + + ns2501_writeb(dvo, 0xc6, 0x00); + ns2501_writeb(dvo, 0xc7, 0x73); + ns2501_writeb(dvo, 0xc8, 0x02); + + } else if (mode->hdisplay == 640 && mode->vdisplay == 480) { + /* mode 274 */ + DRM_DEBUG_KMS("%s: switching to 640x480\n",__FUNCTION__); + /* + ** No, I do not know where this data comes from. + ** It is just what the video bios left in the DVO, so + ** I'm just copying it here over. + ** This also means that I cannot support any other modes + ** except the ones supported by the bios. + */ + ns->reg_8_shadow &= ~NS2501_8_BPAS; + + ns2501_writeb(dvo, 0x11, 0xa0); + ns2501_writeb(dvo, 0x1b, 0x11); + ns2501_writeb(dvo, 0x1c, 0x54); + ns2501_writeb(dvo, 0x1d, 0x03); + + ns2501_writeb(dvo, 0x34, 0x03); + ns2501_writeb(dvo, 0x35, 0xff); + + ns2501_writeb(dvo, 0x80, 0xff); + ns2501_writeb(dvo, 0x81, 0x07); + ns2501_writeb(dvo, 0x82, 0x3d); + ns2501_writeb(dvo, 0x83, 0x05); + + ns2501_writeb(dvo, 0x8d, 0x02); + ns2501_writeb(dvo, 0x8e, 0x10); + ns2501_writeb(dvo, 0x8f, 0x00); + + ns2501_writeb(dvo, 0x90, 0xff); /* vertical */ + ns2501_writeb(dvo, 0x91, 0x07); + ns2501_writeb(dvo, 0x94, 0x00); + ns2501_writeb(dvo, 0x95, 0x00); + + ns2501_writeb(dvo, 0x96, 0x05); + + ns2501_writeb(dvo, 0x99, 0x00); + ns2501_writeb(dvo, 0x9a, 0x88); + + ns2501_writeb(dvo, 0x9c, 0x24); + ns2501_writeb(dvo, 0x9d, 0x00); + ns2501_writeb(dvo, 0x9e, 0x25); + ns2501_writeb(dvo, 0x9f, 0x03); + + ns2501_writeb(dvo, 0xa4, 0x84); + + ns2501_writeb(dvo, 0xb6, 0x09); + + ns2501_writeb(dvo, 0xb9, 0xa0); /* horizontal? */ + ns2501_writeb(dvo, 0xba, 0x00); /* horizontal? */ + + ns2501_writeb(dvo, 0xc0, 0x05); /* horizontal? */ + ns2501_writeb(dvo, 0xc1, 0x90); + + ns2501_writeb(dvo, 0xc2, 0x00); + ns2501_writeb(dvo, 0xc3, 0x0f); + + ns2501_writeb(dvo, 0xc4, 0x03); + ns2501_writeb(dvo, 0xc5, 0x16); + + ns2501_writeb(dvo, 0xc6, 0x00); + ns2501_writeb(dvo, 0xc7, 0x02); + ns2501_writeb(dvo, 0xc8, 0x02); + + } else if (mode->hdisplay == 1024 && mode->vdisplay == 768) { + /* mode 280 */ + DRM_DEBUG_KMS("%s: switching to 1024x768\n",__FUNCTION__); + /* + ** This might or might not work, actually. I'm silently + ** assuming here that the native panel resolution is + ** 1024x768. If not, then this leaves the scaler disabled + ** generating a picture that is likely not the expected. + ** + ** Problem is that I do not know where to take the panel + ** dimensions from. + ** + ** Enable the bypass, scaling not required. + ** + ** The scaler registers are irrelevant here.... + ** + */ + ns->reg_8_shadow |= NS2501_8_BPAS; + ns2501_writeb(dvo, 0x37, 0x44); + } else { + /* Data not known. Bummer! + ** Hopefully, the code should not go here + ** as mode_OK delivered no other modes. + */ + ns->reg_8_shadow |= NS2501_8_BPAS; + } + ns2501_writeb(dvo, NS2501_REG8, ns->reg_8_shadow); + + /* + ** Restore the old i915 registers before + ** forcing the ns2501 on. + */ + restore_dvo(dvo); +} + +/* set the NS2501 power state */ +static void ns2501_dpms(struct intel_dvo_device *dvo, int mode) +{ + struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); + unsigned char ch; + + DRM_DEBUG_KMS("%s: Trying set the dpms of the DVO to %d\n",__FUNCTION__,mode); + + ch = ns->reg_8_shadow; + + if (mode == DRM_MODE_DPMS_ON) + ch |= NS2501_8_PD; + else + ch &= ~NS2501_8_PD; + + if (ns->reg_8_set == 0 || ns->reg_8_shadow != ch) { + ns->reg_8_set = 1; + ns->reg_8_shadow = ch; + ns2501_writeb(dvo, NS2501_REG8, ch); + } + /* + ** Note that this may actually fail,namely exactly + ** when the chip vanished from the bus. + ** + ** Should I force-enable it here?? + */ +} + +static void ns2501_dump_regs(struct intel_dvo_device *dvo) +{ + uint8_t val; + + ns2501_readb(dvo, NS2501_FREQ_LO, &val); + DRM_LOG_KMS("NS2501_FREQ_LO: 0x%02x\n", val); + ns2501_readb(dvo, NS2501_FREQ_HI, &val); + DRM_LOG_KMS("NS2501_FREQ_HI: 0x%02x\n", val); + ns2501_readb(dvo, NS2501_REG8, &val); + DRM_LOG_KMS("NS2501_REG8: 0x%02x\n", val); + ns2501_readb(dvo, NS2501_REG9, &val); + DRM_LOG_KMS("NS2501_REG9: 0x%02x\n", val); + ns2501_readb(dvo, NS2501_REGC, &val); + DRM_LOG_KMS("NS2501_REGC: 0x%02x\n", val); +} + +static void ns2501_destroy(struct intel_dvo_device *dvo) +{ + struct ns2501_priv *ns = dvo->dev_priv; + + if (ns) { + kfree(ns); + dvo->dev_priv = NULL; + } +} + +struct intel_dvo_dev_ops ns2501_ops = { + .init = ns2501_init, + .detect = ns2501_detect, + .mode_valid = ns2501_mode_valid, + .mode_set = ns2501_mode_set, + .dpms = ns2501_dpms, + .dump_regs = ns2501_dump_regs, + .destroy = ns2501_destroy, +}; diff -rup linux-3.4.1-orig/drivers/gpu/drm/i915/intel_display.c linux-3.4.1/drivers/gpu/drm/i915/intel_display.c --- linux-3.4.1-orig/drivers/gpu/drm/i915/intel_display.c 2012-06-01 09:18:44.000000000 +0200 +++ linux-3.4.1/drivers/gpu/drm/i915/intel_display.c 2012-06-08 16:55:20.000000000 +0200 @@ -1142,7 +1142,7 @@ static void assert_pch_ports_disabled(st * * Note! This is for pre-ILK only. */ -static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) +void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) { int reg; u32 val; diff -rup linux-3.4.1-orig/drivers/gpu/drm/i915/intel_dvo.c linux-3.4.1/drivers/gpu/drm/i915/intel_dvo.c --- linux-3.4.1-orig/drivers/gpu/drm/i915/intel_dvo.c 2012-06-01 09:18:44.000000000 +0200 +++ linux-3.4.1/drivers/gpu/drm/i915/intel_dvo.c 2012-06-08 12:50:16.000000000 +0200 @@ -37,6 +37,7 @@ #define SIL164_ADDR 0x38 #define CH7xxx_ADDR 0x76 #define TFP410_ADDR 0x38 +#define NS2501_ADDR 0x38 static const struct intel_dvo_device intel_dvo_devices[] = { { @@ -61,6 +62,13 @@ static const struct intel_dvo_device int .dev_ops = &ivch_ops, }, { + .type = INTEL_DVO_CHIP_TMDS, + .name = "ns2501", + .dvo_reg = DVOC, + .slave_addr = NS2501_ADDR, + .dev_ops = &ns2501_ops, + }, + { .type = INTEL_DVO_CHIP_TMDS, .name = "tfp410", .dvo_reg = DVOC, diff -rup linux-3.4.1-orig/drivers/gpu/drm/i915/Makefile linux-3.4.1/drivers/gpu/drm/i915/Makefile --- linux-3.4.1-orig/drivers/gpu/drm/i915/Makefile 2012-06-01 09:18:44.000000000 +0200 +++ linux-3.4.1/drivers/gpu/drm/i915/Makefile 2012-06-08 12:50:54.000000000 +0200 @@ -34,7 +34,8 @@ i915-y := i915_drv.o i915_dma.o i915_irq dvo_ch7017.o \ dvo_ivch.o \ dvo_tfp410.o \ - dvo_sil164.o + dvo_sil164.o \ + dvo_ns2501.o i915-$(CONFIG_COMPAT) += i915_ioc32.o -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug. 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[PATCH] drm/i915 + agp/intel-gtt: prep work for direct setup
by Daniel Vetter 08 Jun '12

08 Jun '12

To be able to directly set up the intel-gtt code from drm/i915 and avoid setting up the fake-agp driver we need to prepare a few things: - pass both the bridge and gpu pci_dev to the probe function and add code to handle the gpu pdev both being present (for drm/i915) and not present (fake agp). - add refcounting to the remove function so that unloading drm/i915 doesn't kill the fake agp driver v2: Fix up the cleanup and refcount, noticed by Jani Nikula. Signed-Off-by: Daniel Vetter <… [View More]daniel.vetter(a)ffwll.ch> --- drivers/char/agp/intel-agp.c | 5 ++- drivers/char/agp/intel-agp.h | 3 -- drivers/char/agp/intel-gtt.c | 46 +++++++++++++++++++++++++++++++------- drivers/gpu/drm/i915/i915_dma.c | 13 +++++++++- include/drm/intel-gtt.h | 4 +++ 5 files changed, 55 insertions(+), 16 deletions(-) diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index 764f70c..c98c568 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -12,6 +12,7 @@ #include <asm/smp.h> #include "agp.h" #include "intel-agp.h" +#include <drm/intel-gtt.h> int intel_agp_enabled; EXPORT_SYMBOL(intel_agp_enabled); @@ -747,7 +748,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, bridge->capndx = cap_ptr; - if (intel_gmch_probe(pdev, bridge)) + if (intel_gmch_probe(pdev, NULL, bridge)) goto found_gmch; for (i = 0; intel_agp_chipsets[i].name != NULL; i++) { @@ -824,7 +825,7 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev) agp_remove_bridge(bridge); - intel_gmch_remove(pdev); + intel_gmch_remove(); agp_put_bridge(bridge); } diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index c009175..cf2e764 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h @@ -250,7 +250,4 @@ #define PCI_DEVICE_ID_INTEL_HASWELL_SDV 0x0c16 /* SDV */ #define PCI_DEVICE_ID_INTEL_HASWELL_E_HB 0x0c04 -int intel_gmch_probe(struct pci_dev *pdev, - struct agp_bridge_data *bridge); -void intel_gmch_remove(struct pci_dev *pdev); #endif diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 5e6c89e..cea9f99 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -75,6 +75,7 @@ static struct _intel_private { struct resource ifp_resource; int resource_valid; struct page *scratch_page; + int refcount; } intel_private; #define INTEL_GTT_GEN intel_private.driver->gen @@ -1522,14 +1523,32 @@ static int find_gmch(u16 device) return 1; } -int intel_gmch_probe(struct pci_dev *pdev, - struct agp_bridge_data *bridge) +int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, + struct agp_bridge_data *bridge) { int i, mask; - intel_private.driver = NULL; + + /* + * Can be called from the fake agp driver but also directly from + * drm/i915.ko. Hence we need to check whether everything is set up + * already. + */ + if (intel_private.driver) { + intel_private.refcount++; + return 1; + } for (i = 0; intel_gtt_chipsets[i].name != NULL; i++) { - if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) { + if (gpu_pdev) { + if (gpu_pdev->device == + intel_gtt_chipsets[i].gmch_chip_id) { + intel_private.pcidev = pci_dev_get(gpu_pdev); + intel_private.driver = + intel_gtt_chipsets[i].gtt_driver; + + break; + } + } else if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) { intel_private.driver = intel_gtt_chipsets[i].gtt_driver; break; @@ -1539,15 +1558,17 @@ int intel_gmch_probe(struct pci_dev *pdev, if (!intel_private.driver) return 0; + intel_private.refcount++; + if (bridge) { bridge->driver = &intel_fake_agp_driver; bridge->dev_private_data = &intel_private; - bridge->dev = pdev; + bridge->dev = bridge_pdev; } - intel_private.bridge_dev = pci_dev_get(pdev); + intel_private.bridge_dev = pci_dev_get(bridge_pdev); - dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name); + dev_info(&bridge_pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name); mask = intel_private.driver->dma_mask_size; if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask))) @@ -1557,8 +1578,11 @@ int intel_gmch_probe(struct pci_dev *pdev, pci_set_consistent_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)); - if (intel_gtt_init() != 0) + if (intel_gtt_init() != 0) { + intel_gmch_remove(); + return 0; + } return 1; } @@ -1577,12 +1601,16 @@ void intel_gtt_chipset_flush(void) } EXPORT_SYMBOL(intel_gtt_chipset_flush); -void intel_gmch_remove(struct pci_dev *pdev) +void intel_gmch_remove(void) { + if (--intel_private.refcount) + return; + if (intel_private.pcidev) pci_dev_put(intel_private.pcidev); if (intel_private.bridge_dev) pci_dev_put(intel_private.bridge_dev); + intel_private.driver = NULL; } EXPORT_SYMBOL(intel_gmch_remove); diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 0ab5d3d..29aee99 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -1486,11 +1486,18 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) goto put_bridge; } + ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL); + if (!ret) { + DRM_ERROR("failed to set up gmch\n"); + ret = -EIO; + goto out_rmmap; + } + dev_priv->mm.gtt = intel_gtt_get(); if (!dev_priv->mm.gtt) { DRM_ERROR("Failed to initialize GTT\n"); ret = -ENODEV; - goto out_rmmap; + goto put_gmch; } aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT; @@ -1501,7 +1508,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) aperture_size); if (dev_priv->mm.gtt_mapping == NULL) { ret = -EIO; - goto out_rmmap; + goto put_gmch; } i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr, @@ -1623,6 +1630,8 @@ out_mtrrfree: dev_priv->mm.gtt_mtrr = -1; } io_mapping_free(dev_priv->mm.gtt_mapping); +put_gmch: + intel_gmch_remove(); out_rmmap: pci_iounmap(dev->pdev, dev_priv->regs); put_bridge: diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h index 8048c00..84ebd71 100644 --- a/include/drm/intel-gtt.h +++ b/include/drm/intel-gtt.h @@ -23,6 +23,10 @@ const struct intel_gtt { phys_addr_t gma_bus_addr; } *intel_gtt_get(void); +int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, + struct agp_bridge_data *bridge); +void intel_gmch_remove(void); + void intel_gtt_chipset_flush(void); void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg); void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); -- 1.7.7.6 [View Less]

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[Bug 42683] New: [r300g] GPU lockup while playing WoW
by bugzilla-daemon＠freedesktop.org 08 Jun '12

08 Jun '12

https://bugs.freedesktop.org/show_bug.cgi?id=42683 Bug #: 42683 Summary: [r300g] GPU lockup while playing WoW Classification: Unclassified Product: Mesa Version: git Platform: x86 (IA32) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/r300 AssignedTo: dri-devel(a)lists.freedesktop.org ReportedBy: rankincj(a)googlemail.com … [View More]

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regression(?) 3.4 -> 3.5-rc1: drm/i915 render error
by Norbert Preining 08 Jun '12

08 Jun '12

Hi everyone, Since upgrading to 3.5-rc1 (I believe) I find the following warnings in my dmesg: [ 116.591654] [drm] capturing error event; look for more information in /debug/dri/0/i915_error_state [ 116.592888] i915: render error detected, EIR: 0x00000010 [ 116.592890] i915: IPEIR: 0x00000000 [ 116.592891] i915: IPEHR: 0x05000000 [ 116.592893] i915: INSTDONE: 0xfffffffe [ 116.592894] i915: INSTPS: 0x0001e000 [ 116.592895] i915: INSTDONE1: 0xffffffff [ 116.592897] i915: … [View More]

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[[REGRESSION]: hibernate/sleep regression w/ bisection] SOLVED?
by Andrew Watts 07 Jun '12

07 Jun '12

Tejun/Jerome (and radeon devs): I'd like to bring a suspend/resume radeon bug full circle (see: http://thread.gmane.org/gmane.linux.kernel/1209587 for complete thread and Tejun's excellent summary below). The problem was triggered by new input serio driver code (commit 8ee294cd9def000 found through bisection). Don't ask me why, but that set it off. In a nutshell, X would intermittently lock up across suspend/resume cycles. The issue remained at least through 3.1.5. I skipped 3.2.x … [View More]altogether to kernel 3.3.4 and confirm the problem seems to be gone. What might have happened in the radeon codebase since 3.1.x that would have addressed this either intentionally or as a side-effect? Maybe 721604a15b934f or 9fc04b503df9a3? Thanks. ~ Andy ----- Forwarded message from Tejun Heo <tj(a)kernel.org> ----- Date: Fri, 4 Nov 2011 09:14:31 -0700 From: Tejun Heo <tj(a)kernel.org> Subject: Re: [REGRESSION]: hibernate/sleep regression w/ bisection To: Andrew Watts <akwatts(a)ymail.com> Cc: Dmitry Torokhov <dmitry.torokhov(a)gmail.com>, linux-kernel(a)vger.kernel.org, linux-pm(a)lists.linux-foundation.org, David Airlie <airlied(a)linux.ie>, dri-devel(a)lists.freedesktop.org (cc'ing David Airlie and dri-devel) Hello, the original thread can be read from http://thread.gmane.org/gmane.linux.kernel/1209587 Full sysrq-t output at http://article.gmane.org/gmane.linux.kernel/1211256 So, the problem is that after a seemingly unreated update to input serio driver (convert to use workqueue), X seems to lock up sporadically across suspend/resume cycles. I went through the full sysrq-t output but couldn't spot anything suspicious w/ anything else. No worker is stuck and nobody is waiting for flush to finish. Stack trace for X follows. > X S f499b944 5800 1652 1651 0x00400080 > f499b9a8 00003086 00000000 f499b944 c100d4a4 00000000 00000000 f499b958 > 00000000 f499b9a8 f5173140 d7857c56 00000057 f5173140 d8b69880 00000057 > 00000001 00000000 f499b9b4 c104dd89 000f4240 00000000 00000000 f499ba68 > Call Trace: > [<c1291301>] ttm_bo_wait_unreserved+0x5f/0x106 > [<c129145f>] ttm_bo_reserve_locked+0xb7/0xe1 > [<c1292c27>] ttm_bo_reserve+0x26/0x95 > [<c12c3c97>] radeon_crtc_do_set_base+0xbd/0x6d2 > [<c12c42e7>] radeon_crtc_set_base+0x1b/0x1d > [<c12c430d>] radeon_crtc_mode_set+0x24/0xdd7 > [<c1279c57>] drm_crtc_helper_set_mode+0x32c/0x48b > [<c1279e2f>] drm_helper_resume_force_mode+0x79/0x23e > [<c12ace10>] radeon_gpu_reset+0x84/0x98 > [<c12c0838>] radeon_fence_wait+0x2d1/0x311 > [<c12c0e37>] radeon_sync_obj_wait+0xc/0xe > [<c12908be>] ttm_bo_wait+0xa1/0x108 > [<c12d6e7b>] radeon_gem_wait_idle_ioctl+0x76/0xc4 > [<c127e62e>] drm_ioctl+0x1c2/0x42c > [<c10e288e>] do_vfs_ioctl+0x79/0x54b > [<c10e2dcb>] sys_ioctl+0x6b/0x70 > [<c1593813>] sysenter_do_call+0x12/0x22 Do you guys have any ideas what's going on? It seems to be waiting for bo->reserved to go zero. Is it possible that someone there is forgetting to properly kick a work item after resume causing the wait to stall? Andrew, can you please kill the X server after the hang and see whether that brings the system back? I think sshd should still work and if not you can write a script to kill the X server after 30secs after resume (and kill that script if resume succeeds). Thank you. -- tejun ----- End forwarded message ----- [View Less]

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psb_gfx removal
by Jan Engelhardt 07 Jun '12

07 Jun '12

Hi, I have here a "Wortmann AG terra Pad 1051", which has a GMA500-like device (PCI ID 8086:4102). Using Linux 3.1.x (openSUSE 12.1's default), loading psb_gfx.ko crashed the machine. I therefore tried Linux 3.4.0, where this crash does not occur thankfully. According to your commit b7cdd9e6323af368e26121c5b791eddc78e79fea, GMA500 is now available through the DRM tree. I take it you mean kernel/drivers/gpu/drm/gma500/gma500_gfx.ko by that. However, gma500_gfx.ko does not provide support … [View More]

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dri-devel June 2012