dri-devel September 2014

dri-devel@lists.freedesktop.org

173 participants
1045 discussions

[pull] radeon drm-fixes-3.17
by Alex Deucher 01 Sep '14

01 Sep '14

Hi Dave, This pull just contains some new pci ids. The following changes since commit 20a984c2a51d379bce08ee1031b32020f273e532: Merge tag 'drm-intel-fixes-2014-08-21' of git://anongit.freedesktop.org/drm-intel (2014-08-22 07:29:52 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-fixes-3.17 for you to fetch changes up to 37dbeab788a8f23fd946c0be083e5484d6f929a1: drm/radeon: add additional SI pci ids (2014-08-22 10:47:59 -0400) ---------------------------------------------------------------- Alex Deucher (3): drm/radeon: add new KV pci id drm/radeon: add new bonaire pci ids drm/radeon: add additional SI pci ids drivers/gpu/drm/radeon/cik.c | 1 + include/drm/drm_pciids.h | 7 +++++++ 2 files changed, 8 insertions(+)

3 2

Re: [Intel-gfx] [PATCH] drm/edid: Reduce horizontal timings for pixel replicated modes
by Ville Syrjälä 01 Sep '14

01 Sep '14

On Tue, Aug 19, 2014 at 02:21:21PM -0700, clinton.a.taylor(a)intel.com wrote: > From: Clint Taylor <clinton.a.taylor(a)intel.com> > > Pixel replicated modes should be 720 horizontal pixel and pixel > replicated by the HW across the HDMI cable at 2X pixel clock. Current > horizontal resolution of 1440 does not allow pixel duplication to > occur and scaling artifacts occur on the TV. HDMI certification > 7-26 currently fails for all pixel replicated modes. This change fizes > the HDMI certification issues with 480i/576i. > > V2: Removed interlace flag from VICs 44 and 45. Will be submitted in > another patch. Various other formatting fixes. > > V3: 576i@200 htotal fixed. Check min and max pixel clocks. > > Signed-off-by: Clint Taylor <clinton.a.taylor(a)intel.com> Assuming you split it up like Daniel wanted you can slap Reviewed-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> onto both parts. > --- > drivers/gpu/drm/drm_edid.c | 96 ++++++++++++++++++------------------- > drivers/gpu/drm/i915/intel_hdmi.c | 15 ++++-- > 2 files changed, 60 insertions(+), 51 deletions(-) > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c > index f905c63..dc25999 100644 > --- a/drivers/gpu/drm/drm_edid.c > +++ b/drivers/gpu/drm/drm_edid.c > @@ -632,27 +632,27 @@ static const struct drm_display_mode edid_cea_modes[] = { > DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | > DRM_MODE_FLAG_INTERLACE), > .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 6 - 1440x480i@60Hz */ > - { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, > - 1602, 1716, 0, 480, 488, 494, 525, 0, > + /* 6 - 720(1440)x480i@60Hz */ > + { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, > + 801, 858, 0, 480, 488, 494, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 7 - 1440x480i@60Hz */ > - { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, > - 1602, 1716, 0, 480, 488, 494, 525, 0, > + /* 7 - 720(1440)x480i@60Hz */ > + { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, > + 801, 858, 0, 480, 488, 494, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 8 - 1440x240@60Hz */ > - { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, > - 1602, 1716, 0, 240, 244, 247, 262, 0, > + /* 8 - 720(1440)x240@60Hz */ > + { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, > + 801, 858, 0, 240, 244, 247, 262, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_DBLCLK), > .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 9 - 1440x240@60Hz */ > - { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, > - 1602, 1716, 0, 240, 244, 247, 262, 0, > + /* 9 - 720(1440)x240@60Hz */ > + { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, > + 801, 858, 0, 240, 244, 247, 262, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_DBLCLK), > .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > @@ -714,27 +714,27 @@ static const struct drm_display_mode edid_cea_modes[] = { > DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | > DRM_MODE_FLAG_INTERLACE), > .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 21 - 1440x576i@50Hz */ > - { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, > - 1590, 1728, 0, 576, 580, 586, 625, 0, > + /* 21 - 720(1440)x576i@50Hz */ > + { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, > + 795, 864, 0, 576, 580, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 22 - 1440x576i@50Hz */ > - { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, > - 1590, 1728, 0, 576, 580, 586, 625, 0, > + /* 22 - 720(1440)x576i@50Hz */ > + { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, > + 795, 864, 0, 576, 580, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 23 - 1440x288@50Hz */ > - { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, > - 1590, 1728, 0, 288, 290, 293, 312, 0, > + /* 23 - 720(1440)x288@50Hz */ > + { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, > + 795, 864, 0, 288, 290, 293, 312, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_DBLCLK), > .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 24 - 1440x288@50Hz */ > - { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, > - 1590, 1728, 0, 288, 290, 293, 312, 0, > + /* 24 - 720(1440)x288@50Hz */ > + { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, > + 795, 864, 0, 288, 290, 293, 312, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_DBLCLK), > .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > @@ -837,15 +837,15 @@ static const struct drm_display_mode edid_cea_modes[] = { > 796, 864, 0, 576, 581, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), > .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 44 - 1440x576i@100Hz */ > - { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, > - 1590, 1728, 0, 576, 580, 586, 625, 0, > + /* 44 - 720(1440)x576i@100Hz */ > + { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, > + 795, 864, 0, 576, 580, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_DBLCLK), > .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 45 - 1440x576i@100Hz */ > - { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, > - 1590, 1728, 0, 576, 580, 586, 625, 0, > + /* 45 - 720(1440)x576i@100Hz */ > + { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, > + 795, 864, 0, 576, 580, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_DBLCLK), > .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > @@ -870,15 +870,15 @@ static const struct drm_display_mode edid_cea_modes[] = { > 798, 858, 0, 480, 489, 495, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), > .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 50 - 1440x480i@120Hz */ > - { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, > - 1602, 1716, 0, 480, 488, 494, 525, 0, > + /* 50 - 720(1440)x480i@120Hz */ > + { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, > + 801, 858, 0, 480, 488, 494, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 51 - 1440x480i@120Hz */ > - { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, > - 1602, 1716, 0, 480, 488, 494, 525, 0, > + /* 51 - 720(1440)x480i@120Hz */ > + { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, > + 801, 858, 0, 480, 488, 494, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > @@ -892,15 +892,15 @@ static const struct drm_display_mode edid_cea_modes[] = { > 796, 864, 0, 576, 581, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), > .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 54 - 1440x576i@200Hz */ > - { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, > - 1590, 1728, 0, 576, 580, 586, 625, 0, > + /* 54 - 720(1440)x576i@200Hz */ > + { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, > + 795, 864, 0, 576, 580, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 55 - 1440x576i@200Hz */ > - { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, > - 1590, 1728, 0, 576, 580, 586, 625, 0, > + /* 55 - 720(1440)x576i@200Hz */ > + { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, > + 795, 864, 0, 576, 580, 586, 625, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > @@ -914,15 +914,15 @@ static const struct drm_display_mode edid_cea_modes[] = { > 798, 858, 0, 480, 489, 495, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), > .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > - /* 58 - 1440x480i@240 */ > - { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, > - 1602, 1716, 0, 480, 488, 494, 525, 0, > + /* 58 - 720(1440)x480i@240 */ > + { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, > + 801, 858, 0, 480, 488, 494, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, > - /* 59 - 1440x480i@240 */ > - { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, > - 1602, 1716, 0, 480, 488, 494, 525, 0, > + /* 59 - 720(1440)x480i@240 */ > + { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, > + 801, 858, 0, 480, 488, 494, 525, 0, > DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | > DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), > .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index 9169786..9695768 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -864,10 +864,15 @@ static enum drm_mode_status > intel_hdmi_mode_valid(struct drm_connector *connector, > struct drm_display_mode *mode) > { > - if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector), > - true)) > + int clock = mode->clock; > + > + if (mode->flags & DRM_MODE_FLAG_DBLCLK) > + clock *= 2; > + > + if (clock > hdmi_portclock_limit(intel_attached_hdmi(connector), > + true)) > return MODE_CLOCK_HIGH; > - if (mode->clock < 20000) > + if (clock < 20000) > return MODE_CLOCK_LOW; > > if (mode->flags & DRM_MODE_FLAG_DBLSCAN) > @@ -921,6 +926,10 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, > intel_hdmi->color_range = 0; > } > > + if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) { > + pipe_config->pixel_multiplier = 2; > + } > + > if (intel_hdmi->color_range) > pipe_config->limited_color_range = true; > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx(a)lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC

1 0

[Bug 73338] Fan speed in idle at 40% with radeonsi and at 18% with catalyst
by bugzilla-daemon＠freedesktop.org 01 Sep '14

01 Sep '14

https://bugs.freedesktop.org/show_bug.cgi?id=73338 --- Comment #22 from Chernovsky Oleg <adonai(a)xaker.ru> --- Among other querstions - is this legal? I mean, taking traces from proprietary driver and trying to reverse-engineer it. I live in Russia if that's important -- You are receiving this mail because: You are the assignee for the bug.

1 0

[Bug 73338] Fan speed in idle at 40% with radeonsi and at 18% with catalyst
by bugzilla-daemon＠freedesktop.org 01 Sep '14

01 Sep '14

https://bugs.freedesktop.org/show_bug.cgi?id=73338 --- Comment #21 from Chernovsky Oleg <adonai(a)xaker.ru> --- (In reply to comment #20) > Oleg, thanks a lot! > > Alex (or anyone else, particularly if you're from AMD): would it be possible > to point Oleg to the relevant documentation if it exists, or at least find > out whether it can be published in the near future (if it doesn't exist > publicly yet), so that it doesn't have to reverse-engineered from scratch? > Many thanks for any helpful info. Actually I already come to some conclusions. First SMC writes and reads (before SMC_MESSAGE) is just the "ci_check_smc_running" function (seems its analogue presents in proprietary driver as well). 0x5c value should be some sort of command, so it can be defined with already known ones in headers. About other values things are not so clear. I suppose to get real fan speed we need to somehow mask and shift data at smc index 0xc0300064. I'll try to make other traces with different parameters to compare percentages and values to the register reads and writes. P.S. yep, some docs would be helpful, thanks -- You are receiving this mail because: You are the assignee for the bug.

1 0

[Bug 73338] Fan speed in idle at 40% with radeonsi and at 18% with catalyst
by bugzilla-daemon＠freedesktop.org 01 Sep '14

01 Sep '14

https://bugs.freedesktop.org/show_bug.cgi?id=73338 --- Comment #20 from Kamil Páral <kamil.paral(a)gmail.com> --- Oleg, thanks a lot! Alex (or anyone else, particularly if you're from AMD): would it be possible to point Oleg to the relevant documentation if it exists, or at least find out whether it can be published in the near future (if it doesn't exist publicly yet), so that it doesn't have to reverse-engineered from scratch? Many thanks for any helpful info. -- You are receiving this mail because: You are the assignee for the bug.

1 0

[PULL] vmwgfx-fixes-3.17
by Thomas Hellstrom 01 Sep '14

01 Sep '14

Dave, Two fixes for vmwgfx. Both with CC stable. The following changes since commit a284e9d14e35b776807c3a40dd1ff1e05429d4a4: MAINTAINERS: Add entry for Renesas DRM drivers (2014-08-24 16:37:47 +1000) are available in the git repository at: git://people.freedesktop.org/~thomash/linux vmwgfx-fixes-3.17 for you to fetch changes up to f01ea0c3d9db536c64d47922716d8b3b8f21d850: drm/vmwgfx: Fix a potential infinite spin waiting for fifo idle (2014-09-01 12:31:24 +0200) ---------------------------------------------------------------- Thomas Hellstrom (2): drm/vmwgfx: Fix an incorrect OOM return value drm/vmwgfx: Fix a potential infinite spin waiting for fifo idle drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 11 +++++------ drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 3 ++- 2 files changed, 7 insertions(+), 7 deletions(-)

1 0

[PATCH 1/2] drm/vmwgfx: Fix an incorrect OOM return value
by Thomas Hellstrom 01 Sep '14

01 Sep '14

At the same time, make error paths return early for clarity. Signed-off-by: Thomas Hellstrom <thellstrom(a)vmware.com> Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Reviewed-by: jakob Bornecrantz <jakob(a)vmware.com> Cc: <stable(a)vger.kernel.org> --- drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index 7bfdaa1..36b8716 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c @@ -450,11 +450,11 @@ static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv, res, id_loc - sw_context->buf_start); if (unlikely(ret != 0)) - goto out_err; + return ret; ret = vmw_resource_val_add(sw_context, res, &node); if (unlikely(ret != 0)) - goto out_err; + return ret; if (res_type == vmw_res_context && dev_priv->has_mob && node->first_usage) { @@ -468,13 +468,13 @@ static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv, ret = vmw_resource_context_res_add(dev_priv, sw_context, res); if (unlikely(ret != 0)) - goto out_err; + return ret; node->staged_bindings = kzalloc(sizeof(*node->staged_bindings), GFP_KERNEL); if (node->staged_bindings == NULL) { DRM_ERROR("Failed to allocate context binding " "information.\n"); - goto out_err; + return -ENOMEM; } INIT_LIST_HEAD(&node->staged_bindings->list); } @@ -482,8 +482,7 @@ static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv, if (p_val) *p_val = node; -out_err: - return ret; + return 0; } -- 1.8.3.2

1 1

[PULL] drm-intel-next
by Daniel Vetter 01 Sep '14

01 Sep '14

Hi Dave, drm-intel-next-2014-08-22: - basic code for execlist, which is the fancy new cmd submission on gen8. Still disabled by default (Ben, Oscar Mateo, Thomas Daniel et al) - remove the useless usage of console_lock for I915_FBDEV=n (Chris) - clean up relations between ctx and ppgtt - clean up ppgtt lifetime handling (Michel Thierry) - various cursor code improvements from Ville - execbuffer code cleanups and secure batch fixes (Chris) - prep work for dev -> dev_priv transition (Chris) - some of the prep patches for the seqno -> request object transition (Chris) - various small improvements all over Plus a fix from Imre to make sure this pull doesn't break suspend/resume badly on a bunch of machines on top. Cheers, Daniel The following changes since commit 2c0827cffca8ac0c654b888c58a1989a5172f007: drm/i915: Update DRIVER_DATE to 20140808 (2014-08-08 20:44:59 +0200) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-09-01 for you to fetch changes up to 604effb782a8a4d9a20c8af16bcbf86d742db119: drm/i915: fix suspend/resume for GENs w/o runtime PM support (2014-08-26 13:13:03 +0200) ---------------------------------------------------------------- Ben Widawsky (2): drm/i915/bdw: Implement context switching (somewhat) drm/i915/bdw: Print context state in debugfs Chris Wilson (12): drm/i915: Only perform set-to-gtt domain for objects bound to the global gtt drm/i915: Force CPU relocations if not GTT mapped drm/i915: Remove fenced_gpu_access and pending_fenced_gpu_access drm/i915: Copy PCI device id into the device info block drm/i915: Double check ring is idle before declaring the GPU wedged drm/i915: Agnostic INTEL_INFO drm/i915: Pre-validate the NEED_GTTS flag for execbuffer drm/i915: Remove redundant list_empty(eb->vmas) tests in execbuffer drm/i915: Simplify relocate_entry_gtt() and make 64-bit safe drm/i915: Replace __I915__ with typesafe variant drm/i915: Localise the fbdev console lock frobbing drm/i915: Print captured bo for all VM in error state Damien Lespiau (5): drm/i915: Fix erroneous conversion to u8 drm/i915: Fix wrong number of HDMI translation entries drm/i915: Make intel_disable_shared_dpll() static drm/i915: Remove set but unused 'gt_perf_status' drm/i915/bdw: Disable execlists by default Daniel Vetter (18): drm/i915: Fix secure dispatch with full ppgtt drm/i915: WARN if module opt sanitization goes out of order drm/i915/bdw: Add a context and an engine pointers to the ringbuffer drm/i915: Some cleanups for the ppgtt lifetime handling drm/i915: Track file_priv, not ctx in the ppgtt structure drm/i915: Only refcount ppgtt if it actually is one drm/i915: Add proper prefix to obj_to_ggtt drm/i915: Allow i915_gem_setup_global_gtt to fail drm/i915: Fix up checks for aliasing ppgtt drm/i915: Rework ppgtt init to no require an aliasing ppgtt drm/i915: Initialize the aliasing ppgtt as part of global gtt drm/i915: Only track real ppgtt for a context drm/i915: Drop create_vm argument to i915_gem_create_context drm/i915: Extract common cleanup into i915_ppgtt_release drm/i915: Extract commmon global gtt cleanup code drm/i915: Cleanup aliasging ppgtt alongside the global gtt drm/i915: Track cursor changes as frontbuffer tracking flushes drm/i915: Update DRIVER_DATE to 20140822 Imre Deak (1): drm/i915: fix suspend/resume for GENs w/o runtime PM support Michel Thierry (2): drm/i915: vma/ppgtt lifetime rules drm/i915/bdw: Two-stage execlist submit process Oscar Mateo (33): drm/i915/bdw: New source and header file for LRs, LRCs and Execlists drm/i915/bdw: Macro for LRCs and module option for Execlists drm/i915/bdw: Initialization for Logical Ring Contexts drm/i915/bdw: Introduce one context backing object per engine drm/i915/bdw: A bit more advanced LR context alloc/free drm/i915/bdw: Allocate ringbuffers for Logical Ring Contexts drm/i915/bdw: Populate LR contexts (somewhat) drm/i915/bdw: Deferred creation of user-created LRCs drm/i915: Abstract the legacy workload submission mechanism away drm/i915/bdw: Skeleton for the new logical rings submission path drm/i915/bdw: Generic logical ring init and cleanup drm/i915/bdw: GEN-specific logical ring init drm/i915/bdw: GEN-specific logical ring set/get seqno drm/i915/bdw: New logical ring submission mechanism drm/i915/bdw: GEN-specific logical ring emit request drm/i915/bdw: GEN-specific logical ring emit flush drm/i915/bdw: Ring idle and stop with logical rings drm/i915/bdw: Interrupts with logical rings drm/i915/bdw: GEN-specific logical ring emit batchbuffer start drm/i915/bdw: Workload submission mechanism for Execlists drm/i915/bdw: Always use MMIO flips with Execlists drm/i915: Add temporary ring->ctx backpointer drm/i915/bdw: Emission of requests with logical rings drm/i915/bdw: Write the tail pointer, LRC style drm/i915/bdw: Avoid non-lite-restore preemptions drm/i915/bdw: Help out the ctx switch interrupt handler drm/i915/bdw: Don't write PDP in the legacy way when using LRCs drm/i915/bdw: Make sure gpu reset still works with Execlists drm/i915/bdw: Disable semaphores for Execlists drm/i915/bdw: Display execlists info in debugfs drm/i915/bdw: Display context backing obj & ringbuffer info in debugfs drm/i915/bdw: Document Logical Rings, LR contexts and Execlists drm/i915/bdw: Enable Logical Ring Contexts (hence, Execlists) Paulo Zanoni (1): drm/i915: fix i915_interrupt_info on BDW Sagar Kamble (2): drm/i915: Created common handler for platform specific suspend/resume drm/i915: Sharing platform specific sequence between runtime and system suspend/ resume paths Sonika Jindal (1): drm/i915: Continuation of future readiness series Thomas Daniel (1): drm/i915/bdw: Handle context switch events Thomas Wood (1): drm: fix plane rotation when restoring fbdev configuration Ville Syrjälä (7): drm/i915: Eliminate rmw from .update_primary_plane() drm/i915: Call .update_primary_plane in intel_{enable, disable}_primary_hw_plane() drm/i915: Make hpd debug messages less cryptic drm/i915: Don't try to enable cursor from setplane when crtc is disabled drm/i915: Move CURSIZE setup to i845_update_cursor() drm/i915: Unify ivb_update_cursor() and i9xx_update_cursor() drm/i915: Add support for variable cursor size on 845/865 Documentation/DocBook/drm.tmpl | 5 + drivers/gpu/drm/drm_crtc.c | 25 +- drivers/gpu/drm/drm_fb_helper.c | 6 +- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +- drivers/gpu/drm/i915/i915_debugfs.c | 189 +++- drivers/gpu/drm/i915/i915_dma.c | 18 +- drivers/gpu/drm/i915/i915_drv.c | 154 +-- drivers/gpu/drm/i915/i915_drv.h | 147 ++- drivers/gpu/drm/i915/i915_gem.c | 185 +-- drivers/gpu/drm/i915/i915_gem_context.c | 155 +-- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 227 ++-- drivers/gpu/drm/i915/i915_gem_gtt.c | 218 ++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 28 +- drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 90 +- drivers/gpu/drm/i915/i915_irq.c | 52 +- drivers/gpu/drm/i915/i915_params.c | 6 + drivers/gpu/drm/i915/i915_reg.h | 7 +- drivers/gpu/drm/i915/intel_ddi.c | 6 +- drivers/gpu/drm/i915/intel_display.c | 420 ++++--- drivers/gpu/drm/i915/intel_dp.c | 3 +- drivers/gpu/drm/i915/intel_drv.h | 5 +- drivers/gpu/drm/i915/intel_fbdev.c | 44 +- drivers/gpu/drm/i915/intel_lrc.c | 1697 ++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_lrc.h | 112 ++ drivers/gpu/drm/i915/intel_pm.c | 2 - drivers/gpu/drm/i915/intel_ringbuffer.c | 97 +- drivers/gpu/drm/i915/intel_ringbuffer.h | 44 +- include/drm/drm_crtc.h | 3 + 30 files changed, 3107 insertions(+), 845 deletions(-) create mode 100644 drivers/gpu/drm/i915/intel_lrc.c create mode 100644 drivers/gpu/drm/i915/intel_lrc.h -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch

1 0

drivers/video/hdmi.c: Source Product Description (SPD) Information frame logging
by Martin Bugge (marbugge) 01 Sep '14

01 Sep '14

Hello Damien I'm writing to you as you seems to be one of latest maintainers of: include/linux/hdmi.h drivers/video/hdmi.c I wanted to add "Source Product Description information frame" logging for the drivers in ./drivers/media/i2c/adv7604.c ./drivers/media/i2c/adv7842.c But was advised to contact you and use some of the defines in include/linux/hdmi.h As you can see in: http://www.spinics.net/lists/linux-media/msg74727.html Would you consider the addition of a hdmi_spd_infoframe_log function in hdmi.c a good idea ? And the same goes for other HDMI Information frames. Best regards Martin Bugge

3 2

[PATCH] drm: Do not use BUG_ON(!spin_is_locked())
by Guenter Roeck 01 Sep '14

01 Sep '14

spin_is_locked() always returns false in uniprocessor configurations and can therefore not be used with BUG_ON. Replace it with assert_spin_locked(), which exists for that very purpose. Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> --- drivers/gpu/drm/msm/mdp/mdp_kms.c | 2 +- drivers/gpu/drm/nouveau/core/core/event.c | 4 ++-- drivers/gpu/drm/nouveau/core/core/notify.c | 2 +- drivers/gpu/drm/omapdrm/omap_irq.c | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/mdp/mdp_kms.c b/drivers/gpu/drm/msm/mdp/mdp_kms.c index 03455b6..92a1531 100644 --- a/drivers/gpu/drm/msm/mdp/mdp_kms.c +++ b/drivers/gpu/drm/msm/mdp/mdp_kms.c @@ -34,7 +34,7 @@ static void update_irq(struct mdp_kms *mdp_kms) struct mdp_irq *irq; uint32_t irqmask = mdp_kms->vblank_mask; - BUG_ON(!spin_is_locked(&list_lock)); + assert_spin_locked(&list_lock); list_for_each_entry(irq, &mdp_kms->irq_list, node) irqmask |= irq->irqmask; diff --git a/drivers/gpu/drm/nouveau/core/core/event.c b/drivers/gpu/drm/nouveau/core/core/event.c index 0540a48..9327117 100644 --- a/drivers/gpu/drm/nouveau/core/core/event.c +++ b/drivers/gpu/drm/nouveau/core/core/event.c @@ -26,7 +26,7 @@ void nvkm_event_put(struct nvkm_event *event, u32 types, int index) { - BUG_ON(!spin_is_locked(&event->refs_lock)); + assert_spin_locked(&event->refs_lock); while (types) { int type = __ffs(types); types &= ~(1 << type); if (--event->refs[index * event->types_nr + type] == 0) { @@ -39,7 +39,7 @@ nvkm_event_put(struct nvkm_event *event, u32 types, int index) void nvkm_event_get(struct nvkm_event *event, u32 types, int index) { - BUG_ON(!spin_is_locked(&event->refs_lock)); + assert_spin_locked(&event->refs_lock); while (types) { int type = __ffs(types); types &= ~(1 << type); if (++event->refs[index * event->types_nr + type] == 1) { diff --git a/drivers/gpu/drm/nouveau/core/core/notify.c b/drivers/gpu/drm/nouveau/core/core/notify.c index 76adb81..f70dbc4 100644 --- a/drivers/gpu/drm/nouveau/core/core/notify.c +++ b/drivers/gpu/drm/nouveau/core/core/notify.c @@ -98,7 +98,7 @@ nvkm_notify_send(struct nvkm_notify *notify, void *data, u32 size) struct nvkm_event *event = notify->event; unsigned long flags; - BUG_ON(!spin_is_locked(&event->list_lock)); + assert_spin_locked(&event->list_lock); BUG_ON(size != notify->size); spin_lock_irqsave(&event->refs_lock, flags); diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c index f035d2b..3eb097e 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.c +++ b/drivers/gpu/drm/omapdrm/omap_irq.c @@ -34,7 +34,7 @@ static void omap_irq_update(struct drm_device *dev) struct omap_drm_irq *irq; uint32_t irqmask = priv->vblank_mask; - BUG_ON(!spin_is_locked(&list_lock)); + assert_spin_locked(&list_lock); list_for_each_entry(irq, &priv->irq_list, node) irqmask |= irq->irqmask; -- 1.9.1

6 12

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel September 2014