dri-devel September 2014

dri-devel@lists.freedesktop.org

173 participants
1045 discussions

[PATCH v2 0/5] video: describe data bus formats
by Boris Brezillon 03 Nov '14

03 Nov '14

Hello, This patch series is a proposal to describe the different data formats used by HW components to connect with each other. This is just a copy of the existing V4L2_MBUS_FMT defintions with a neutral name so that it can be used by V4L2 and DRM/KMS subsystem. This series also makes use of this video_bus_format enum in the DRM/KMS subsystem to define the data fomats supported on the connector <-> device link. Best Regards, Boris Changes since v1: - define an enum and use a macro for v4l2 bus formats definitions - rename nformats into num_formats - declare num_formats as an unsigned int Boris BREZILLON (3): drm: add bus_formats and nbus_formats fields to drm_display_info drm: panel: simple-panel: add support for bus_format retrieval drm: panel: simple-panel: add bus format information for foxlink panel Boris Brezillon (2): video: move mediabus format definition to a more standard place video: add RGB444_1X12 and RGB565_1X16 bus formats drivers/gpu/drm/drm_crtc.c | 31 ++++++ drivers/gpu/drm/panel/panel-simple.c | 6 ++ include/drm/drm_crtc.h | 8 ++ include/uapi/linux/Kbuild | 1 + include/uapi/linux/v4l2-mediabus.h | 185 +++++++++++++++------------------- include/uapi/linux/video-bus-format.h | 129 ++++++++++++++++++++++++ 6 files changed, 256 insertions(+), 104 deletions(-) create mode 100644 include/uapi/linux/video-bus-format.h -- 1.9.1

6 15

[PATCH] drm/exynos: remove ifdeferry from initialization code
by Andrzej Hajda 30 Oct '14

30 Oct '14

The patch replaces separate calls to driver (de)registration by loops over the array of drivers. As a result it significantly decreases number of ifdefs. Additionally it moves device registration related ifdefs to header file. Signed-off-by: Andrzej Hajda <a.hajda(a)samsung.com> --- Hi Inki, During testing your component match support patch [1] I have prepared patch removing most ifdefs from exynos_drm_drv.c. It is based on your patch, but I can rebase it if necessary. [1]: http://permalink.gmane.org/gmane.linux.kernel.samsung-soc/37031 Regards Andrzej --- drivers/gpu/drm/exynos/exynos_drm_drv.c | 170 +++++++------------------------- drivers/gpu/drm/exynos/exynos_drm_drv.h | 25 +++-- 2 files changed, 48 insertions(+), 147 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c index b2c710a..a660e46 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c @@ -553,74 +553,54 @@ static const struct component_master_ops exynos_drm_ops = { .unbind = exynos_drm_unbind, }; -static int exynos_drm_platform_probe(struct platform_device *pdev) -{ - struct component_match *match; - int ret; - - pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); - exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls); - +static struct platform_driver * const exynos_drm_drivers[] = { #ifdef CONFIG_DRM_EXYNOS_FIMD - ret = platform_driver_register(&fimd_driver); - if (ret < 0) - return ret; + &fimd_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_DP - ret = platform_driver_register(&dp_driver); - if (ret < 0) - goto err_unregister_fimd_drv; + &dp_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_DSI - ret = platform_driver_register(&dsi_driver); - if (ret < 0) - goto err_unregister_dp_drv; + &dsi_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_HDMI - ret = platform_driver_register(&mixer_driver); - if (ret < 0) - goto err_unregister_dsi_drv; - ret = platform_driver_register(&hdmi_driver); - if (ret < 0) - goto err_unregister_mixer_drv; + &mixer_driver, + &hdmi_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_G2D - ret = platform_driver_register(&g2d_driver); - if (ret < 0) - goto err_unregister_hdmi_drv; + &g2d_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_FIMC - ret = platform_driver_register(&fimc_driver); - if (ret < 0) - goto err_unregister_g2d_drv; + &fimc_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_ROTATOR - ret = platform_driver_register(&rotator_driver); - if (ret < 0) - goto err_unregister_fimc_drv; + &rotator_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_GSC - ret = platform_driver_register(&gsc_driver); - if (ret < 0) - goto err_unregister_rotator_drv; + &gsc_driver, #endif - #ifdef CONFIG_DRM_EXYNOS_IPP - ret = platform_driver_register(&ipp_driver); - if (ret < 0) - goto err_unregister_gsc_drv; + &ipp_driver, +#endif +}; + +static int exynos_drm_platform_probe(struct platform_device *pdev) +{ + struct component_match *match; + int ret, i; + + pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); + exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls); + + for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) { + ret = platform_driver_register(exynos_drm_drivers[i]); + if (ret < 0) + goto err_unregister_drivers; + } ret = exynos_platform_device_ipp_register(); if (ret < 0) - goto err_unregister_ipp_drv; -#endif + goto err_unregister_drivers; match = exynos_drm_match_add(&pdev->dev); if (IS_ERR(match)) { @@ -632,96 +612,24 @@ static int exynos_drm_platform_probe(struct platform_device *pdev) match); err_unregister_ipp_dev: - -#ifdef CONFIG_DRM_EXYNOS_IPP exynos_platform_device_ipp_unregister(); -err_unregister_ipp_drv: - platform_driver_unregister(&ipp_driver); -err_unregister_gsc_drv: -#endif -#ifdef CONFIG_DRM_EXYNOS_GSC - platform_driver_unregister(&gsc_driver); -err_unregister_rotator_drv: -#endif +err_unregister_drivers: + while (--i >= 0) + platform_driver_unregister(exynos_drm_drivers[i]); -#ifdef CONFIG_DRM_EXYNOS_ROTATOR - platform_driver_unregister(&rotator_driver); -err_unregister_fimc_drv: -#endif - -#ifdef CONFIG_DRM_EXYNOS_FIMC - platform_driver_unregister(&fimc_driver); -err_unregister_g2d_drv: -#endif - -#ifdef CONFIG_DRM_EXYNOS_G2D - platform_driver_unregister(&g2d_driver); -err_unregister_hdmi_drv: -#endif - -#ifdef CONFIG_DRM_EXYNOS_HDMI - platform_driver_unregister(&hdmi_driver); -err_unregister_mixer_drv: - platform_driver_unregister(&mixer_driver); -err_unregister_dsi_drv: -#endif - -#ifdef CONFIG_DRM_EXYNOS_DSI - platform_driver_unregister(&dsi_driver); -err_unregister_dp_drv: -#endif - -#ifdef CONFIG_DRM_EXYNOS_DP - platform_driver_unregister(&dp_driver); -err_unregister_fimd_drv: -#endif - -#ifdef CONFIG_DRM_EXYNOS_FIMD - platform_driver_unregister(&fimd_driver); -#endif return ret; } static int exynos_drm_platform_remove(struct platform_device *pdev) { -#ifdef CONFIG_DRM_EXYNOS_IPP - exynos_platform_device_ipp_unregister(); - platform_driver_unregister(&ipp_driver); -#endif - -#ifdef CONFIG_DRM_EXYNOS_GSC - platform_driver_unregister(&gsc_driver); -#endif - -#ifdef CONFIG_DRM_EXYNOS_ROTATOR - platform_driver_unregister(&rotator_driver); -#endif - -#ifdef CONFIG_DRM_EXYNOS_FIMC - platform_driver_unregister(&fimc_driver); -#endif - -#ifdef CONFIG_DRM_EXYNOS_G2D - platform_driver_unregister(&g2d_driver); -#endif - -#ifdef CONFIG_DRM_EXYNOS_HDMI - platform_driver_unregister(&mixer_driver); - platform_driver_unregister(&hdmi_driver); -#endif + int i; -#ifdef CONFIG_DRM_EXYNOS_FIMD - platform_driver_unregister(&fimd_driver); -#endif + exynos_platform_device_ipp_unregister(); -#ifdef CONFIG_DRM_EXYNOS_DSI - platform_driver_unregister(&dsi_driver); -#endif + for (i = ARRAY_SIZE(exynos_drm_drivers) - 1; i >= 0; --i) + platform_driver_unregister(exynos_drm_drivers[i]); -#ifdef CONFIG_DRM_EXYNOS_DP - platform_driver_unregister(&dp_driver); -#endif component_master_del(&pdev->dev, &exynos_drm_ops); return 0; } @@ -745,11 +653,9 @@ static int exynos_drm_init(void) if (IS_ERR(exynos_drm_pdev)) return PTR_ERR(exynos_drm_pdev); -#ifdef CONFIG_DRM_EXYNOS_VIDI ret = exynos_drm_probe_vidi(); if (ret < 0) goto err_unregister_pd; -#endif ret = platform_driver_register(&exynos_drm_platform_driver); if (ret) @@ -758,11 +664,9 @@ static int exynos_drm_init(void) return 0; err_remove_vidi: -#ifdef CONFIG_DRM_EXYNOS_VIDI exynos_drm_remove_vidi(); err_unregister_pd: -#endif platform_device_unregister(exynos_drm_pdev); return ret; @@ -771,9 +675,9 @@ err_unregister_pd: static void exynos_drm_exit(void) { platform_driver_unregister(&exynos_drm_platform_driver); -#ifdef CONFIG_DRM_EXYNOS_VIDI + exynos_drm_remove_vidi(); -#endif + platform_device_unregister(exynos_drm_pdev); } diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index 69a6fa3..76d5d02 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -324,15 +324,14 @@ int exynos_platform_device_hdmi_register(void); */ void exynos_platform_device_hdmi_unregister(void); -/* - * this function registers exynos drm ipp platform device. - */ +#ifdef CONFIG_DRM_EXYNOS_IPP int exynos_platform_device_ipp_register(void); - -/* - * this function unregisters exynos drm ipp platform device if it exists. - */ void exynos_platform_device_ipp_unregister(void); +#else +static inline int exynos_platform_device_ipp_register(void) { return 0; } +static inline void exynos_platform_device_ipp_unregister(void) {} +#endif + #ifdef CONFIG_DRM_EXYNOS_DPI struct exynos_drm_display * exynos_dpi_probe(struct device *dev); @@ -343,15 +342,13 @@ exynos_dpi_probe(struct device *dev) { return NULL; } static inline int exynos_dpi_remove(struct device *dev) { return 0; } #endif -/* - * this function registers exynos drm vidi platform device/driver. - */ +#ifdef CONFIG_DRM_EXYNOS_VIDI int exynos_drm_probe_vidi(void); - -/* - * this function unregister exynos drm vidi platform device/driver. - */ void exynos_drm_remove_vidi(void); +#else +static inline int exynos_drm_probe_vidi(void) { return 0; } +static inline void exynos_drm_remove_vidi(void) {} +#endif /* This function creates a encoder and a connector, and initializes them. */ int exynos_drm_create_enc_conn(struct drm_device *dev, -- 1.9.1

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[PATCH 0/3] drm-exynos-dp/phy-exynos-dp: Refactor to use pmu-system-controller and dp driver cleanup
by Vivek Gautam 30 Oct '14

30 Oct '14

These patches are based on 'for-next' branch of kgene's linux-samsung tree. Refactoring the exynos-dp-video phy to use pmu-system-controller handle and access the register using mfd-syscon and regmap. Simultaneously, removing the support for older dptx-phy, since it's obsolete now and noone uses it. Vivek Gautam (3): phy: exynos-dp-video: Use syscon support to control pmu register drm/exynos: dp: Remove support for unused dptx-phy arm: dts: Exynos5: Use pmu_system_controller phandle for dp phy .../devicetree/bindings/phy/samsung-phy.txt | 7 +- arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 4 +- drivers/gpu/drm/exynos/exynos_dp_core.c | 58 ++++----------- drivers/gpu/drm/exynos/exynos_dp_core.h | 2 - drivers/phy/phy-exynos-dp-video.c | 76 ++++++++++++++------ 6 files changed, 75 insertions(+), 74 deletions(-) -- 1.7.10.4

3 12

[Bug 74868] New: r600g: Diablo III Crashes After a few minutes
by bugzilla-daemon＠freedesktop.org 29 Oct '14

29 Oct '14

https://bugs.freedesktop.org/show_bug.cgi?id=74868 Priority: medium Bug ID: 74868 Assignee: dri-devel(a)lists.freedesktop.org Summary: r600g: Diablo III Crashes After a few minutes Severity: normal Classification: Unclassified OS: All Reporter: nick.tenney(a)gmail.com Hardware: Other Status: NEW Version: git Component: Drivers/Gallium/r600 Product: Mesa Created attachment 93894 --> https://bugs.freedesktop.org/attachment.cgi?id=93894&action=edit Xorg Log Disclaimer: This is my first bug report, so I apologize if I do not attach enough information. I tried booting up Diablo III a few days back to see the new geometry shaders in action on my 4890, and alas, I had a few minutes of happy gameplay followed by a startling black screen. I ran it in a terminal window, though wine was not kind enough to allow me to properly pipe the output (only grabbed the launcher window and gave up) it contained ooodles of r600_shader_select issues. There were thousands of the (type=1) -1 lines prior to the the -12 lines right before the crash: EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -1 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -1 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -1 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -1 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -1 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -1 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_shader.c:157 r600_pipe_shader_create - translation from TGSI failed ! EE r600_state_common.c:750 r600_shader_select - Failed to build shader variant (type=1) -12 EE r600_texture.c:1003 r600_texture_transfer_map - failed to create temporary texture to hold untiled copy Mesa: User error: GL_OUT_OF_MEMORY in glCompressedTexSubImage2D err:d3d:wined3d_debug_callback 0x1c8178: "GL_OUT_OF_MEMORY in glCompressedTexSubImage2D". err:d3d_surface:surface_upload_data >>>>>>>>>>>>>>>>> GL_OUT_OF_MEMORY (0x505) from glCompressedTexSubImage2DARB @ ../../../wine-1.7.12/dlls/wined3d/surface.c / 1688 EE r600_texture.c:1003 r600_texture_transfer_map - failed to create temporary texture to hold untiled copy Mesa: User error: GL_OUT_OF_MEMORY in glCompressedTexSubImage2D err:d3d:wined3d_debug_callback 0x1c8178: "GL_OUT_OF_MEMORY in glCompressedTexSubImage2D". err:d3d_surface:surface_upload_data >>>>>>>>>>>>>>>>> GL_OUT_OF_MEMORY (0x505) from glCompressedTexSubImage2DARB @ ../../../wine-1.7.12/dlls/wined3d/surface.c / 1688 EE r600_texture.c:1003 r600_texture_transfer_map - failed to create temporary texture to hold untiled copy Mesa: User error: GL_OUT_OF_MEMORY in glCompressedTexSubImage2D err:d3d:wined3d_debug_callback 0x1c8178: "GL_OUT_OF_MEMORY in glCompressedTexSubImage2D". err:d3d_surface:surface_upload_data >>>>>>>>>>>>>>>>> GL_OUT_OF_MEMORY (0x505) from glCompressedTexSubImage2DARB @ ../../../wine-1.7.12/dlls/wined3d/surface.c / 1688 EE r600_texture.c:1003 r600_texture_transfer_map - failed to create temporary texture to hold untiled copy Mesa: User error: GL_OUT_OF_MEMORY in glCompressedTexSubImage2D err:d3d:wined3d_debug_callback 0x1c8178: "GL_OUT_OF_MEMORY in glCompressedTexSubImage2D". err:d3d_surface:surface_upload_data >>>>>>>>>>>>>>>>> GL_OUT_OF_MEMORY (0x505) from glCompressedTexSubImage2DARB @ ../../../wine-1.7.12/dlls/wined3d/surface.c / 1688 EE r600_texture.c:1003 r600_texture_transfer_map - failed to create temporary texture to hold untiled copy Mesa: User error: GL_OUT_OF_MEMORY in glCompressedTexSubImage2D err:d3d:wined3d_debug_callback 0x1c8178: "GL_OUT_OF_MEMORY in glCompressedTexSubImage2D". err:d3d_surface:surface_upload_data >>>>>>>>>>>>>>>>> GL_OUT_OF_MEMORY (0x505) from glCompressedTexSubImage2DARB @ ../../../wine-1.7.12/dlls/wined3d/surface.c / 1688 EE r600_texture.c:1003 r600_texture_transfer_map - failed to create temporary texture to hold untiled copy Mesa: User error: GL_OUT_OF_MEMORY in glCompressedTexSubImage2D err:d3d:wined3d_debug_callback 0x1c8178: "GL_OUT_OF_MEMORY in glCompressedTexSubImage2D". err:d3d_surface:surface_upload_data >>>>>>>>>>>>>>>>> GL_OUT_OF_MEMORY (0x505) from glCompressedTexSubImage2DARB @ ../../../wine-1.7.12/dlls/wined3d/surface.c / 1688 -- You are receiving this mail because: You are the assignee for the bug.

1 23

[PATCH V7 11/12] Documentation: bridge: Add documentation for ps8622 DT properties
by Ajay Kumar 28 Oct '14

28 Oct '14

Add documentation for DT properties supported by ps8622/ps8625 eDP-LVDS converter. Signed-off-by: Ajay Kumar <ajaykumar.rs(a)samsung.com> --- .../devicetree/bindings/video/bridge/ps8622.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/video/bridge/ps8622.txt diff --git a/Documentation/devicetree/bindings/video/bridge/ps8622.txt b/Documentation/devicetree/bindings/video/bridge/ps8622.txt new file mode 100644 index 0000000..0ec8172 --- /dev/null +++ b/Documentation/devicetree/bindings/video/bridge/ps8622.txt @@ -0,0 +1,20 @@ +ps8622-bridge bindings + +Required properties: + - compatible: "parade,ps8622" or "parade,ps8625" + - reg: first i2c address of the bridge + - sleep-gpios: OF device-tree gpio specification for PD_ pin. + - reset-gpios: OF device-tree gpio specification for RST_ pin. + +Optional properties: + - lane-count: number of DP lanes to use + - use-external-pwm: backlight will be controlled by an external PWM + +Example: + lvds-bridge@48 { + compatible = "parade,ps8622"; + reg = <0x48>; + sleep-gpios = <&gpc3 6 1 0 0>; + reset-gpios = <&gpc3 1 1 0 0>; + lane-count = <1>; + }; -- 1.7.9.5

7 90

[Bug 81576] New: GPU lock-ups while playing XCOM Enemy Unknown
by bugzilla-daemon＠freedesktop.org 26 Oct '14

26 Oct '14

https://bugs.freedesktop.org/show_bug.cgi?id=81576 Priority: medium Bug ID: 81576 Assignee: dri-devel(a)lists.freedesktop.org Summary: GPU lock-ups while playing XCOM Enemy Unknown Severity: normal Classification: Unclassified OS: All Reporter: fhimpe(a)telenet.be Hardware: Other Status: NEW Version: XOrg CVS Component: DRM/Radeon Product: DRI While playing XCOM Enemy Unknown on my Debian Wheezy system with Radeon HD 7850 card and the free drivers, the game often hangs for several seconds, and a GPU lockup message is printed in dmesg. This happens several times, untile it happens that the system does not become responsive again, and I have to hard reset the machine. The problem happens with both Linux 3.14.12 and 3.16-rc5. Here is an extract of the kernel log: Jul 19 23:55:17 piranha kernel: [ 7753.573031] radeon 0000:01:00.0: GPU lockup CP stall for more than 10360msec Jul 19 23:55:17 piranha kernel: [ 7753.573043] radeon 0000:01:00.0: GPU lockup (waiting for 0x000000000007c746 last fence id 0x000000000007c745 on ring 3) Jul 19 23:55:17 piranha kernel: [ 7753.573051] radeon 0000:01:00.0: failed to get a new IB (-35) Jul 19 23:55:17 piranha kernel: [ 7753.717120] radeon 0000:01:00.0: GPU lockup CP stall for more than 10000msec Jul 19 23:55:17 piranha kernel: [ 7753.717130] radeon 0000:01:00.0: GPU lockup (waiting for 0x00000000001e19a6 last fence id 0x00000000001e19a1 on ring 0) Jul 19 23:55:17 piranha kernel: [ 7753.717210] radeon 0000:01:00.0: failed to get a new IB (-35) Jul 19 23:55:17 piranha kernel: [ 7753.718031] radeon 0000:01:00.0: sa_manager is not empty, clearing anyway Jul 19 23:55:18 piranha kernel: [ 7754.184904] radeon 0000:01:00.0: Saved 1024 dwords of commands on ring 0. Jul 19 23:55:18 piranha kernel: [ 7754.185033] radeon 0000:01:00.0: GPU softreset: 0x0000006D Jul 19 23:55:18 piranha kernel: [ 7754.185035] radeon 0000:01:00.0: GRBM_STATUS = 0xE7D20028 Jul 19 23:55:18 piranha kernel: [ 7754.185036] radeon 0000:01:00.0: GRBM_STATUS_SE0 = 0xEDC00000 Jul 19 23:55:18 piranha kernel: [ 7754.185038] radeon 0000:01:00.0: GRBM_STATUS_SE1 = 0xEDC00000 Jul 19 23:55:18 piranha kernel: [ 7754.185040] radeon 0000:01:00.0: SRBM_STATUS = 0x20040AC0 Jul 19 23:55:18 piranha kernel: [ 7754.185157] radeon 0000:01:00.0: SRBM_STATUS2 = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.185159] radeon 0000:01:00.0: R_008674_CP_STALLED_STAT1 = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.185160] radeon 0000:01:00.0: R_008678_CP_STALLED_STAT2 = 0x00010800 Jul 19 23:55:18 piranha kernel: [ 7754.185162] radeon 0000:01:00.0: R_00867C_CP_BUSY_STAT = 0x00008006 Jul 19 23:55:18 piranha kernel: [ 7754.185164] radeon 0000:01:00.0: R_008680_CP_STAT = 0x80038647 Jul 19 23:55:18 piranha kernel: [ 7754.185165] radeon 0000:01:00.0: R_00D034_DMA_STATUS_REG = 0x44483146 Jul 19 23:55:18 piranha kernel: [ 7754.185167] radeon 0000:01:00.0: R_00D834_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:18 piranha kernel: [ 7754.185169] radeon 0000:01:00.0: VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.185171] radeon 0000:01:00.0: VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.649830] radeon 0000:01:00.0: GRBM_SOFT_RESET=0x0000DDFF Jul 19 23:55:18 piranha kernel: [ 7754.649884] radeon 0000:01:00.0: SRBM_SOFT_RESET=0x00100140 Jul 19 23:55:18 piranha kernel: [ 7754.651031] radeon 0000:01:00.0: GRBM_STATUS = 0x00003028 Jul 19 23:55:18 piranha kernel: [ 7754.651033] radeon 0000:01:00.0: GRBM_STATUS_SE0 = 0x00000006 Jul 19 23:55:18 piranha kernel: [ 7754.651035] radeon 0000:01:00.0: GRBM_STATUS_SE1 = 0x00000006 Jul 19 23:55:18 piranha kernel: [ 7754.651036] radeon 0000:01:00.0: SRBM_STATUS = 0x200400C0 Jul 19 23:55:18 piranha kernel: [ 7754.651147] radeon 0000:01:00.0: SRBM_STATUS2 = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.651149] radeon 0000:01:00.0: R_008674_CP_STALLED_STAT1 = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.651151] radeon 0000:01:00.0: R_008678_CP_STALLED_STAT2 = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.651152] radeon 0000:01:00.0: R_00867C_CP_BUSY_STAT = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.651154] radeon 0000:01:00.0: R_008680_CP_STAT = 0x00000000 Jul 19 23:55:18 piranha kernel: [ 7754.651156] radeon 0000:01:00.0: R_00D034_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:18 piranha kernel: [ 7754.651158] radeon 0000:01:00.0: R_00D834_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:18 piranha kernel: [ 7754.651403] radeon 0000:01:00.0: GPU reset succeeded, trying to resume Jul 19 23:55:18 piranha kernel: [ 7754.677135] [drm] probing gen 2 caps for device 8086:151 = 261ad03/e Jul 19 23:55:18 piranha kernel: [ 7754.677143] [drm] PCIE gen 3 link speeds already enabled Jul 19 23:55:18 piranha kernel: [ 7754.679075] [drm] PCIE GART of 1024M enabled (table at 0x0000000000276000). Jul 19 23:55:18 piranha kernel: [ 7754.679178] radeon 0000:01:00.0: WB enabled Jul 19 23:55:18 piranha kernel: [ 7754.679181] radeon 0000:01:00.0: fence driver on ring 0 use gpu addr 0x0000000080000c00 and cpu addr 0xffff88041d0dfc00 Jul 19 23:55:18 piranha kernel: [ 7754.679183] radeon 0000:01:00.0: fence driver on ring 1 use gpu addr 0x0000000080000c04 and cpu addr 0xffff88041d0dfc04 Jul 19 23:55:18 piranha kernel: [ 7754.679185] radeon 0000:01:00.0: fence driver on ring 2 use gpu addr 0x0000000080000c08 and cpu addr 0xffff88041d0dfc08 Jul 19 23:55:18 piranha kernel: [ 7754.679187] radeon 0000:01:00.0: fence driver on ring 3 use gpu addr 0x0000000080000c0c and cpu addr 0xffff88041d0dfc0c Jul 19 23:55:18 piranha kernel: [ 7754.679188] radeon 0000:01:00.0: fence driver on ring 4 use gpu addr 0x0000000080000c10 and cpu addr 0xffff88041d0dfc10 Jul 19 23:55:18 piranha kernel: [ 7754.679801] radeon 0000:01:00.0: fence driver on ring 5 use gpu addr 0x0000000000075a18 and cpu addr 0xffffc90005db5a18 Jul 19 23:55:18 piranha kernel: [ 7754.835517] [drm] ring test on 0 succeeded in 4 usecs Jul 19 23:55:18 piranha kernel: [ 7754.835522] [drm] ring test on 1 succeeded in 1 usecs Jul 19 23:55:18 piranha kernel: [ 7754.835526] [drm] ring test on 2 succeeded in 1 usecs Jul 19 23:55:18 piranha kernel: [ 7754.835588] [drm] ring test on 3 succeeded in 2 usecs Jul 19 23:55:18 piranha kernel: [ 7754.835598] [drm] ring test on 4 succeeded in 1 usecs Jul 19 23:55:19 piranha kernel: [ 7755.011345] [drm] ring test on 5 succeeded in 2 usecs Jul 19 23:55:19 piranha kernel: [ 7755.011352] [drm] UVD initialized successfully. Jul 19 23:55:19 piranha kernel: [ 7755.013070] [drm:r600_ib_test] *ERROR* radeon: fence wait failed (-35). Jul 19 23:55:19 piranha kernel: [ 7755.013072] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB on GFX ring (-35). Jul 19 23:55:19 piranha kernel: [ 7755.013074] radeon 0000:01:00.0: ib ring test failed (-35). Jul 19 23:55:19 piranha kernel: [ 7755.476969] radeon 0000:01:00.0: GPU softreset: 0x00000048 Jul 19 23:55:19 piranha kernel: [ 7755.476976] radeon 0000:01:00.0: GRBM_STATUS = 0xA0000028 Jul 19 23:55:19 piranha kernel: [ 7755.476978] radeon 0000:01:00.0: GRBM_STATUS_SE0 = 0x00000000 Jul 19 23:55:19 piranha kernel: [ 7755.476980] radeon 0000:01:00.0: GRBM_STATUS_SE1 = 0x00000000 Jul 19 23:55:19 piranha kernel: [ 7755.476981] radeon 0000:01:00.0: SRBM_STATUS = 0x200400C0 Jul 19 23:55:19 piranha kernel: [ 7755.477092] radeon 0000:01:00.0: SRBM_STATUS2 = 0x00000000 Jul 19 23:55:19 piranha kernel: [ 7755.477094] radeon 0000:01:00.0: R_008674_CP_STALLED_STAT1 = 0x00000000 Jul 19 23:55:19 piranha kernel: [ 7755.477096] radeon 0000:01:00.0: R_008678_CP_STALLED_STAT2 = 0x00000000 Jul 19 23:55:19 piranha kernel: [ 7755.477097] radeon 0000:01:00.0: R_00867C_CP_BUSY_STAT = 0x00000006 Jul 19 23:55:19 piranha kernel: [ 7755.477099] radeon 0000:01:00.0: R_008680_CP_STAT = 0x80028647 Jul 19 23:55:19 piranha kernel: [ 7755.477101] radeon 0000:01:00.0: R_00D034_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:19 piranha kernel: [ 7755.477103] radeon 0000:01:00.0: R_00D834_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:19 piranha kernel: [ 7755.477105] radeon 0000:01:00.0: VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x00000000 Jul 19 23:55:19 piranha kernel: [ 7755.477107] radeon 0000:01:00.0: VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x00000000 Jul 19 23:55:20 piranha kernel: [ 7755.932045] radeon 0000:01:00.0: GRBM_SOFT_RESET=0x0000DDFF Jul 19 23:55:20 piranha kernel: [ 7755.932100] radeon 0000:01:00.0: SRBM_SOFT_RESET=0x00000100 Jul 19 23:55:20 piranha kernel: [ 7755.933247] radeon 0000:01:00.0: GRBM_STATUS = 0x00003028 Jul 19 23:55:20 piranha kernel: [ 7755.933248] radeon 0000:01:00.0: GRBM_STATUS_SE0 = 0x00000006 Jul 19 23:55:20 piranha kernel: [ 7755.933250] radeon 0000:01:00.0: GRBM_STATUS_SE1 = 0x00000006 Jul 19 23:55:20 piranha kernel: [ 7755.933251] radeon 0000:01:00.0: SRBM_STATUS = 0x200400C0 Jul 19 23:55:20 piranha kernel: [ 7755.933362] radeon 0000:01:00.0: SRBM_STATUS2 = 0x00000000 Jul 19 23:55:20 piranha kernel: [ 7755.933364] radeon 0000:01:00.0: R_008674_CP_STALLED_STAT1 = 0x00000000 Jul 19 23:55:20 piranha kernel: [ 7755.933366] radeon 0000:01:00.0: R_008678_CP_STALLED_STAT2 = 0x00000000 Jul 19 23:55:20 piranha kernel: [ 7755.933367] radeon 0000:01:00.0: R_00867C_CP_BUSY_STAT = 0x00000000 Jul 19 23:55:20 piranha kernel: [ 7755.933369] radeon 0000:01:00.0: R_008680_CP_STAT = 0x00000000 Jul 19 23:55:20 piranha kernel: [ 7755.933371] radeon 0000:01:00.0: R_00D034_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:20 piranha kernel: [ 7755.933373] radeon 0000:01:00.0: R_00D834_DMA_STATUS_REG = 0x44C83D57 Jul 19 23:55:20 piranha kernel: [ 7755.933617] radeon 0000:01:00.0: GPU reset succeeded, trying to resume Jul 19 23:55:20 piranha kernel: [ 7755.944532] [drm] probing gen 2 caps for device 8086:151 = 261ad03/e Jul 19 23:55:20 piranha kernel: [ 7755.944538] [drm] PCIE gen 3 link speeds already enabled Jul 19 23:55:20 piranha kernel: [ 7755.946534] [drm] PCIE GART of 1024M enabled (table at 0x0000000000276000). Jul 19 23:55:20 piranha kernel: [ 7755.946630] radeon 0000:01:00.0: WB enabled Jul 19 23:55:20 piranha kernel: [ 7755.946633] radeon 0000:01:00.0: fence driver on ring 0 use gpu addr 0x0000000080000c00 and cpu addr 0xffff88041d0dfc00 Jul 19 23:55:20 piranha kernel: [ 7755.946635] radeon 0000:01:00.0: fence driver on ring 1 use gpu addr 0x0000000080000c04 and cpu addr 0xffff88041d0dfc04 Jul 19 23:55:20 piranha kernel: [ 7755.946637] radeon 0000:01:00.0: fence driver on ring 2 use gpu addr 0x0000000080000c08 and cpu addr 0xffff88041d0dfc08 Jul 19 23:55:20 piranha kernel: [ 7755.946638] radeon 0000:01:00.0: fence driver on ring 3 use gpu addr 0x0000000080000c0c and cpu addr 0xffff88041d0dfc0c Jul 19 23:55:20 piranha kernel: [ 7755.946640] radeon 0000:01:00.0: fence driver on ring 4 use gpu addr 0x0000000080000c10 and cpu addr 0xffff88041d0dfc10 Jul 19 23:55:20 piranha kernel: [ 7755.947252] radeon 0000:01:00.0: fence driver on ring 5 use gpu addr 0x0000000000075a18 and cpu addr 0xffffc90005db5a18 Jul 19 23:55:20 piranha kernel: [ 7756.102387] [drm] ring test on 0 succeeded in 4 usecs Jul 19 23:55:20 piranha kernel: [ 7756.102395] [drm] ring test on 1 succeeded in 1 usecs Jul 19 23:55:20 piranha kernel: [ 7756.102398] [drm] ring test on 2 succeeded in 1 usecs Jul 19 23:55:20 piranha kernel: [ 7756.102461] [drm] ring test on 3 succeeded in 2 usecs Jul 19 23:55:20 piranha kernel: [ 7756.102497] [drm] ring test on 4 succeeded in 2 usecs Jul 19 23:55:20 piranha kernel: [ 7756.278275] [drm] ring test on 5 succeeded in 2 usecs Jul 19 23:55:20 piranha kernel: [ 7756.278281] [drm] UVD initialized successfully. Jul 19 23:55:20 piranha kernel: [ 7756.280029] [drm] ib test on ring 0 succeeded in 0 usecs Jul 19 23:55:20 piranha kernel: [ 7756.280076] [drm] ib test on ring 1 succeeded in 0 usecs Jul 19 23:55:20 piranha kernel: [ 7756.280119] [drm] ib test on ring 2 succeeded in 0 usecs Jul 19 23:55:20 piranha kernel: [ 7756.280155] [drm] ib test on ring 3 succeeded in 0 usecs Jul 19 23:55:20 piranha kernel: [ 7756.280189] [drm] ib test on ring 4 succeeded in 0 usecs Jul 19 23:55:20 piranha kernel: [ 7756.430256] [drm:uvd_v1_0_ib_test] *ERROR* radeon: failed to get create msg (-22). Jul 19 23:55:20 piranha kernel: [ 7756.430264] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB on ring 5 (-22). Jul 19 23:55:20 piranha kernel: [ 7756.430284] [drm:radeon_pm_resume_dpm] *ERROR* radeon: dpm resume failed I'm using xserver 1.16.0 and mesa 10.2.3. -- You are receiving this mail because: You are the assignee for the bug.

1 6

Brightness too high on internal AMD/ATI graphics device, but fine with external AMD/ATI graphics card
by Paul Menzel 26 Oct '14

26 Oct '14

Dear Linux folks, connecting a VGA monitor to the internal graphics device of the ASRock E350M1 [1], the brightness is much too high. $ lspci -tvnn […] +-01.0 Advanced Micro Devices [AMD] nee ATI Wrestler [Radeon HD 6310] [1002:9802] +-01.1 Advanced Micro Devices [AMD] nee ATI Wrestler HDMI Audio [Radeon HD 6250/6310] [1002:1314] […] Plugging in an external AMD/ATI graphics card and connecting the VGA monitor there, the brightness is normal as expected. $ lspci -nn […] 01:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Cedar [Radeon HD 5000/6000/7350/8350 Series] [1002:68f9] 01:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Cedar HDMI Audio [Radeon HD 5400/6300 Series] [1002:aa68] […] The software stack is the same. Any idea how I can configure or debug that? This has been verified with 3.2.x to 3.14.9. Thanks, Paul

2 2

[PATCH v3 01/11] drm/i915: Merge of visible and !visible paths for primary planes
by Gustavo Padovan 24 Oct '14

24 Oct '14

From: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> Fold intel_pipe_set_base() in the update primary plane path merging pieces of code that are common to both paths. Basically the the pin/unpin procedures are the same for both paths and some checks can also be shared (some of the were moved to the check() stage) v2: take Ville's comments: - remove unnecessary plane check - move mutex lock to inside the conditional - make the pin fail message a debug one - add a fixme for the fastboot hack - call intel_frontbuffer_flip() after FBC update v3: take more Ville's comments: - fold update code under if (intel_crtc->active), and do the visible/!visible split inside. - check ret inside the same conditional we assign it v4: don't use intel_enable_primary_hw_plane(), the primary_enabled check inside will break page flips v5: take more Ville's comments: - set primary_enabled to true and add BDW hack - unify if (old_fb) and if (old_fb != fb) v6: take more Ville's comments: - make was_primary bool and fix its check - add the BDW vblank wait comment Suggested-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Signed-off-by: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> fixup! drm/i915: Merge of visible and !visible paths for primary planes --- drivers/gpu/drm/i915/intel_display.c | 147 ++++++++++++++++++++++------------- 1 file changed, 92 insertions(+), 55 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b8488a8..966b9af 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -11676,12 +11676,23 @@ intel_check_primary_plane(struct drm_plane *plane, struct drm_rect *dest = &state->dst; struct drm_rect *src = &state->src; const struct drm_rect *clip = &state->clip; + int ret; - return drm_plane_helper_check_update(plane, crtc, fb, + ret = drm_plane_helper_check_update(plane, crtc, fb, src, dest, clip, DRM_PLANE_HELPER_NO_SCALING, DRM_PLANE_HELPER_NO_SCALING, false, true, &state->visible); + if (ret) + return ret; + + /* no fb bound */ + if (state->visible && !fb) { + DRM_ERROR("No FB bound\n"); + return -EINVAL; + } + + return 0; } static int @@ -11693,6 +11704,8 @@ intel_commit_primary_plane(struct drm_plane *plane, struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + enum pipe pipe = intel_crtc->pipe; + struct drm_framebuffer *old_fb = plane->fb; struct drm_i915_gem_object *obj = intel_fb_obj(fb); struct drm_i915_gem_object *old_obj = intel_fb_obj(plane->fb); struct intel_plane *intel_plane = to_intel_plane(plane); @@ -11701,76 +11714,100 @@ intel_commit_primary_plane(struct drm_plane *plane, intel_crtc_wait_for_pending_flips(crtc); - /* - * If clipping results in a non-visible primary plane, we'll disable - * the primary plane. Note that this is a bit different than what - * happens if userspace explicitly disables the plane by passing fb=0 - * because plane->fb still gets set and pinned. - */ - if (!state->visible) { + if (intel_crtc_has_pending_flip(crtc)) { + DRM_ERROR("pipe is still busy with an old pageflip\n"); + return -EBUSY; + } + + if (plane->fb != fb) { mutex_lock(&dev->struct_mutex); + ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); + if (ret == 0) + i915_gem_track_fb(old_obj, obj, + INTEL_FRONTBUFFER_PRIMARY(pipe)); + mutex_unlock(&dev->struct_mutex); + if (ret != 0) { + DRM_DEBUG_KMS("pin & fence failed\n"); + return ret; + } + } + + crtc->primary->fb = fb; + crtc->x = src->x1; + crtc->y = src->y1; + + intel_plane->crtc_x = state->orig_dst.x1; + intel_plane->crtc_y = state->orig_dst.y1; + intel_plane->crtc_w = drm_rect_width(&state->orig_dst); + intel_plane->crtc_h = drm_rect_height(&state->orig_dst); + intel_plane->src_x = state->orig_src.x1; + intel_plane->src_y = state->orig_src.y1; + intel_plane->src_w = drm_rect_width(&state->orig_src); + intel_plane->src_h = drm_rect_height(&state->orig_src); + intel_plane->obj = obj; + if (intel_crtc->active) { /* - * Try to pin the new fb first so that we can bail out if we - * fail. + * FBC does not work on some platforms for rotated + * planes, so disable it when rotation is not 0 and + * update it when rotation is set back to 0. + * + * FIXME: This is redundant with the fbc update done in + * the primary plane enable function except that that + * one is done too late. We eventually need to unify + * this. */ - if (plane->fb != fb) { - ret = intel_pin_and_fence_fb_obj(dev, obj, NULL); - if (ret) { - mutex_unlock(&dev->struct_mutex); - return ret; - } + if (intel_crtc->primary_enabled && + INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) && + dev_priv->fbc.plane == intel_crtc->plane && + intel_plane->rotation != BIT(DRM_ROTATE_0)) { + intel_disable_fbc(dev); } - i915_gem_track_fb(old_obj, obj, - INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe)); - - if (intel_crtc->primary_enabled) - intel_disable_primary_hw_plane(plane, crtc); + if (state->visible) { + bool was_enabled = intel_crtc->primary_enabled; + /* FIXME: kill this fastboot hack */ + intel_update_pipe_size(intel_crtc); - if (plane->fb != fb) - if (plane->fb) - intel_unpin_fb_obj(old_obj); + intel_crtc->primary_enabled = true; - mutex_unlock(&dev->struct_mutex); + dev_priv->display.update_primary_plane(crtc, plane->fb, + crtc->x, crtc->y); - } else { - if (intel_crtc && intel_crtc->active && - intel_crtc->primary_enabled) { /* - * FBC does not work on some platforms for rotated - * planes, so disable it when rotation is not 0 and - * update it when rotation is set back to 0. - * - * FIXME: This is redundant with the fbc update done in - * the primary plane enable function except that that - * one is done too late. We eventually need to unify - * this. + * BDW signals flip done immediately if the plane + * is disabled, even if the plane enable is already + * armed to occur at the next vblank :( */ - if (INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev) && - dev_priv->fbc.plane == intel_crtc->plane && - intel_plane->rotation != BIT(DRM_ROTATE_0)) { - intel_disable_fbc(dev); - } + if (IS_BROADWELL(dev) && !was_enabled) + intel_wait_for_vblank(dev, intel_crtc->pipe); + } else { + /* + * If clipping results in a non-visible primary plane, + * we'll disable the primary plane. Note that this is + * a bit different than what happens if userspace + * explicitly disables the plane by passing fb=0 + * because plane->fb still gets set and pinned. + */ + intel_disable_primary_hw_plane(plane, crtc); } - ret = intel_pipe_set_base(crtc, src->x1, src->y1, fb); - if (ret) - return ret; - if (!intel_crtc->primary_enabled) - intel_enable_primary_hw_plane(plane, crtc); + intel_frontbuffer_flip(dev, INTEL_FRONTBUFFER_PRIMARY(pipe)); + + mutex_lock(&dev->struct_mutex); + intel_update_fbc(dev); + mutex_unlock(&dev->struct_mutex); } - intel_plane->crtc_x = state->orig_dst.x1; - intel_plane->crtc_y = state->orig_dst.y1; - intel_plane->crtc_w = drm_rect_width(&state->orig_dst); - intel_plane->crtc_h = drm_rect_height(&state->orig_dst); - intel_plane->src_x = state->orig_src.x1; - intel_plane->src_y = state->orig_src.y1; - intel_plane->src_w = drm_rect_width(&state->orig_src); - intel_plane->src_h = drm_rect_height(&state->orig_src); - intel_plane->obj = obj; + if (old_fb && old_fb != fb) { + if (intel_crtc->active) + intel_wait_for_vblank(dev, intel_crtc->pipe); + + mutex_lock(&dev->struct_mutex); + intel_unpin_fb_obj(old_obj); + mutex_unlock(&dev->struct_mutex); + } return 0; } -- 1.9.3

4 23

[Bug 85311] New: radeon 0000:01:00.0: Max Payload Size 16384, but upstream 0000:00:01.0 set to 128; if necessary, use "pci=pcie_bus_safe" and report a bug
by bugzilla-daemon＠bugzilla.kernel.org 23 Oct '14

23 Oct '14

https://bugzilla.kernel.org/show_bug.cgi?id=85311 Bug ID: 85311 Summary: radeon 0000:01:00.0: Max Payload Size 16384, but upstream 0000:00:01.0 set to 128; if necessary, use "pci=pcie_bus_safe" and report a bug Product: Drivers Version: 2.5 Kernel Version: 3.17-rc6 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: pali.rohar(a)gmail.com Regression: No Created attachment 152131 --> https://bugzilla.kernel.org/attachment.cgi?id=152131&action=edit dmesg log Every time when I open LID on my notebook I see tons of new error lines in dmesg with kernel 3.17-rc6. And more lines come from radeon card (dmesg log is attached). I do not see these log lines with 3.13 kernel, so this is regression. -- You are receiving this mail because: You are watching the assignee of the bug.

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[Bug 83651] New: radeon: kernel returns invalid information about video connectors' status
by bugzilla-daemon＠bugzilla.kernel.org 23 Oct '14

23 Oct '14

https://bugzilla.kernel.org/show_bug.cgi?id=83651 Bug ID: 83651 Summary: radeon: kernel returns invalid information about video connectors' status Product: Drivers Version: 2.5 Kernel Version: 3.16.1 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: newgarry(a)mail.ru Regression: No Information obtained from kernel sys subsystem about ATI HD 5650 card's connectors status doesn't reflects real existing situation. That prevents higher level systems using the obtained information from working correctly. For example, systemd uses that information to decide what to do on lid close event (related bug report, https://bugs.freedesktop.org/show_bug.cgi?id=76267#c13). My laptop have hybrid video configuration (Intel + discrete ATI). The discrete ATI card is always powered off by init script via vgaswitcheroo interface on system boot. There aren't external connected monitors. Following is the valid report from kernel about the Intel card after system boot: # cat /sys/class/drm/card0-LVDS-1/status connected # cat /sys/class/drm/card0-VGA-1/status disconnected Following is the invalid report from kernel about the ATI card after system boot: # cat /sys/class/drm/card1-LVDS-2/status connected # cat /sys/class/drm/card1-VGA-2/status connected # cat /sys/class/drm/card1-HDMI-A-1/status disconnected Report from vgaswitcheroo interface: # cat /sys/kernel/debug/vgaswitcheroo/switch 0:IGD:+:Pwr:0000:00:02.0 1:DIS: :Off:0000:01:00.0 2:DIS-Audio: :Off:0000:01:00.1 lspci: # lspci | grep -i vga 00:02.0 VGA compatible controller: Intel Corporation Core Processor Integrated Graphics Controller (rev 18) 01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Madison [Mobility Radeon HD 5650/5750 / 6530M/6550M] (rev ff) # lspci -n | grep 0300 00:02.0 0300: 8086:0046 (rev 18) 01:00.0 0300: 1002:68c1 (rev ff) Kernel: 3.16.1 Thank you in advance! -- You are receiving this mail because: You are watching the assignee of the bug.

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dri-devel September 2014