dri-devel January 2015

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1123 discussions

[PULL] drm-intel-next
by Daniel Vetter 07 Jan '15

07 Jan '15

Hi Dave, drm-intel-next-2014-12-19: - plane handling refactoring from Matt Roper and Gustavo Padovan in prep for atomic updates - fixes and more patches for the seqno to request transformation from John - docbook for fbc from Rodrigo - prep work for dual-link dsi from Gaurav Signh - crc fixes from Ville - special ggtt views infrastructure from Tvrtko Ursulin - shadow patch copying for the cmd parser from Brad Volkin - execlist and full ppgtt by default on gen8, for testing for now drm-intel-next-2014-12-05: - dual-dsi enabling from Gaurav with prep work from Jani - reshuffling the ring init code to move towards a clean sw/hw state setup split - ring free space refactoring from Dave Gordon - s/seqno/request/ rework from John Harrison - psr support for vlv/chv from Rodrigo - skl mmio flip support from Damien - and the usual bits&pieces all over Cheers, Daniel The following changes since commit 00f0b3781028605910cb4662a0f8a4849b445fc2: drm/i915: Reject modeset when the same digital port is used more than once (2014-12-03 09:31:53 +0100) are available in the git repository at: git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-12-19 for you to fetch changes up to 0e2cfc005b376ed7b5c9a9fc466b5842fcc18cc7: drm/i915: Update DRIVER_DATE to 20141219 (2014-12-19 16:21:42 +0100) ---------------------------------------------------------------- - plane handling refactoring from Matt Roper and Gustavo Padovan in prep for atomic updates - fixes and more patches for the seqno to request transformation from John - docbook for fbc from Rodrigo - prep work for dual-link dsi from Gaurav Signh - crc fixes from Ville - special ggtt views infrastructure from Tvrtko Ursulin - shadow patch copying for the cmd parser from Brad Volkin - execlist and full ppgtt by default on gen8, for testing for now ---------------------------------------------------------------- Ander Conselvan de Oliveira (1): drm/i915: Remove unnecessary goto in intel_primary_plane_disable() Brad Volkin (5): drm/i915: Implement a framework for batch buffer pools drm/i915: Use batch pools with the command parser drm/i915: Use batch length instead of object size in command parser drm/i915: Mark shadow batch buffers as purgeable drm/i915: Tidy up execbuffer command parsing code Chris Wilson (1): drm/i915: Assert that we successfully downclock the GPU before suspend Damien Lespiau (8): drm/i915/skl: Read out crtl1 for eDP/DPLL0 drm/i915/skl: Implement the skl version of MMIO flips drm/i915: Fix short description of intel_display_power_is_enabled() drm/i915/skl: Update the DDI translation values for DP/eDP 1.3 drm/i915: Don't display nonsensical values in i915_ddb_info on gen < 9 drm/i915: Add headers to the various render state drm/i915: Consolidate DDI clock reading out in a single function drm/i915/skl: Skylake also supports DP MST Daniel Vetter (16): drm/i915: Remove user pinning code drm/i915: Convert i915_wait_seqno to i915_wait_request drm/i915: Check locking in i915_gem_request_unreference drm/i915: Remove redundant flip_work->flip_queued_ring drm/i915: s/init()/init_hw()/ in intel_engine_cs drm/i915: Move intel_init_pipe_control out of engine->init_hw drm/i915: Only init engines once drm/i915: Flatten engine init control flow drm/i915: Move init_unused_rings to gem_init_hw drm/i915: Update DRIVER_DATE to 20141205 drm/i915: Move golden context init into ->init_context drm/i915: Check mask/bit helper functions drm/i915: Protect against leaks in pipe_crc_set_source drm/i915: Name the lrc irq handler correctly drm/i915: Use BUILD_BUG if possible in the i915 WARN_ON drm/i915: Update DRIVER_DATE to 20141219 Dave Gordon (4): drm/i915: Check for matching ringbuffer in logical_ring_wait_request() drm/i915: Don't read 'HEAD' MMIO register in LRC mode drm/i915: Make ring freespace calculation more robust drm/i915: Consolidate ring freespace calculations Deepak M (1): drm/i915: Parsing LFP brightness control from VBT Deepak S (3): drm/i915: Forcewake Register Range changes for CHV drm/i915/chv: Use timeout mode for RC6 on chv drm/i915: Skip gunit save/restore for cherryview Gaurav K Singh (14): drm/i915: New functions added for enabling & disabling MIPI Port Ctrl reg drm/i915: Added port as parameter to the functions which does read/write of DSI Controller drm/i915: Add support for port enable/disable for dual link configuration drm/i915: Pixel Clock changes for DSI dual link drm/i915: Dual link needs Shutdown and Turn on packet for both ports drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link drm/i915: cck reg used for checking DSI Pll locked drm/i915: MIPI Timings related changes for dual link drm/i915: Update the DSI disable path to support dual link panel disabling drm/i915: Update the DSI enable path to support dual drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C drm/i915: Enable MIPI PHY transparent latch for DSI Port C drm/i915: Software workaround for getting the HW status of DSI Port C on BYT drm/i915: Changes related to the sequence port no for Gustavo Padovan (3): drm: add helper to get crtc timings (v5) drm/i915: remove intel_crtc_cursor_set_obj() (v5) drm/i915: remove intel_pipe_set_base() (v4) Imre Deak (1): drm/i915: fix use after free during eDP encoder destroying Jani Nikula (3): drm/i915/dsi: clean up MIPI DSI pipe vs. port usage drm/i915/dsi: add ports to intel_dsi to describe the ports being driven drm/i915: release struct_mutex on the i915_gem_init_hw fail path John Harrison (23): drm/i915: Ensure OLS & PLR are always in sync drm/i915: Add reference count to request structure drm/i915: Add helper functions to aid seqno -> request transition drm/i915: Replace last_[rwf]_seqno with last_[rwf]_req drm/i915: Convert i915_gem_ring_throttle to use requests drm/i915: Ensure requests stick around during waits drm/i915: Remove 'outstanding_lazy_seqno' drm/i915: Make 'i915_gem_check_olr' actually check by request not seqno drm/i915: Convert 'last_flip_req' to be a request not a seqno drm/i915: Convert mmio_flip::seqno to struct request drm/i915: Convert __wait_seqno() to __wait_request() drm/i915: Remove obsolete seqno parameter from 'i915_add_request' drm/i915: Convert 'flip_queued_seqno' into 'flip_queued_request' drm/i915: Convert trace functions from seqno to request drm/i915: Convert 'ring_idle()' to use requests not seqnos drm/i915: Connect requests to rings at creation not submission drm/i915: Convert 'i915_seqno_passed' calls into 'i915_gem_request_completed' drm/i915: Remove the now redundant 'obj->ring' drm/i915: Convert 'trace_irq' to use requests rather than seqnos drm/i915: Fix up seqno -> request merge issues drm/i915: Zero fill the request structure drm/i915: Add unique id to the request structure for debugging drm/i915: Additional request structure tracing Jordan Justen (1): drm/i915: Add GPGPU_THREADS_DISPATCHED to the register whitelist Matt Roper (8): drm/i915: Introduce intel_prepare_cursor_plane() (v2) drm/i915: Make intel_plane_state subclass drm_plane_state drm/i915: Consolidate plane 'prepare' functions (v2) drm/i915: Consolidate plane 'cleanup' operations (v3) drm/i915: Consolidate top-level .update_plane() handlers drm/i915: Ensure state->crtc is non-NULL for plane updates drm/i915: Make all plane disables use 'update_plane' (v5) drm/i915: Hold runtime PM during plane commit Michael H. Nguyen (1): drm/i915: Add MI_SET_APPID cmd to cmd parser tables Michel Thierry (4): drm/i915/bdw: Add WaHdcDisableFetchWhenMasked drm/i915/bdw: Add WaForceEnableNonCoherent label drm/i915: Use true PPGTT in Gen8+ when execlists are enabled drm/i915: Warn about missing context state workarounds only once Mika Kuoppala (1): drm/i915: Convert pxvid to extvid lookup table to a function Rickard Strandqvist (1): gpu: drm: i915: intel_display.c: Remove unused function Rob Clark (1): drm/i915: tame the chattermouth (v2) Rodrigo Vivi (17): drm/i915: Parse VBT PSR block. drm/i915: HSW/BDW PSR Set idle_frames = VBT + 1 drm/i915: PSR get full link off x standby from VBT drm/i915: remove PSR BDW single frame update. drm/i915: Remove intel_psr_is_enabled function. drm/i915: Add PSR registers for PSR VLV/CHV. drm/i915: PSR VLV/CHV: Introduce setup, enable and disable functions drm/i915: VLV/CHV PSR Software timer mode drm/i915: VLV/CHV PSR debugfs. drm/i915: Enable PSR for Baytrail and Braswell. drm/i915: Move FBC stuff to intel_fbc.c drm/i915: Introduce FBC DocBook. drm/i915: Organize Fence registers for future enablement. drm/i915: Organize PPGTT init drm/i915: Organize PDP regs report for future. drm/i915: Organize INSTDONE report for future. drm/i915: Organize bind_vma funcs Sonika Jindal (2): drm/i915/skl: Correctly updating sprite wm parameter drm/i915/skl: Correcting the flushing of pipe Thomas Daniel (2): drm/i915: Fix startup failure in LRC mode after recent init changes drm/i915/bdw: Enable execlists by default where supported Tvrtko Ursulin (3): drm/i915: Stop putting GGTT VMA at the head of the list drm/i915: Infrastructure for supporting different GGTT views per object drm/i915: Documentation for multiple GGTT views Ville Syrjälä (7): drm/i915: Deal with video overlay on GPU reset drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/ drm/i915: Engage the DP scramble reset for pipe C on CHV drm/i915: Fix CRC support for DP port D on CHV drm/i915: Protect pipe_crc->entries update drm/i915: Allocate the pipe_crc->entires with kcalloc() drm/i915: Make i915_pipe_crc_read() oops proof Documentation/DocBook/drm.tmpl | 15 + drivers/gpu/drm/drm_crtc.c | 32 +- drivers/gpu/drm/drm_modes.c | 26 +- drivers/gpu/drm/i915/Makefile | 2 + drivers/gpu/drm/i915/i915_cmd_parser.c | 131 +++- drivers/gpu/drm/i915/i915_debugfs.c | 232 +++++-- drivers/gpu/drm/i915/i915_dma.c | 12 +- drivers/gpu/drm/i915/i915_drv.c | 9 +- drivers/gpu/drm/i915/i915_drv.h | 255 +++++++- drivers/gpu/drm/i915/i915_gem.c | 535 +++++++-------- drivers/gpu/drm/i915/i915_gem_batch_pool.c | 137 ++++ drivers/gpu/drm/i915/i915_gem_context.c | 43 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 117 +++- drivers/gpu/drm/i915/i915_gem_gtt.c | 170 +++-- drivers/gpu/drm/i915/i915_gem_gtt.h | 35 +- drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +- drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 91 +-- drivers/gpu/drm/i915/i915_irq.c | 30 +- drivers/gpu/drm/i915/i915_params.c | 9 +- drivers/gpu/drm/i915/i915_reg.h | 378 ++++++----- drivers/gpu/drm/i915/i915_suspend.c | 2 +- drivers/gpu/drm/i915/i915_trace.h | 69 +- drivers/gpu/drm/i915/intel_bios.c | 65 ++ drivers/gpu/drm/i915/intel_bios.h | 36 +- drivers/gpu/drm/i915/intel_ddi.c | 25 +- drivers/gpu/drm/i915/intel_display.c | 895 ++++++++++++-------------- drivers/gpu/drm/i915/intel_dp.c | 21 +- drivers/gpu/drm/i915/intel_drv.h | 36 +- drivers/gpu/drm/i915/intel_dsi.c | 483 ++++++++------ drivers/gpu/drm/i915/intel_dsi.h | 26 + drivers/gpu/drm/i915/intel_dsi_cmd.c | 141 ++-- drivers/gpu/drm/i915/intel_dsi_cmd.h | 46 +- drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 58 +- drivers/gpu/drm/i915/intel_dsi_pll.c | 12 +- drivers/gpu/drm/i915/intel_fbc.c | 701 ++++++++++++++++++++ drivers/gpu/drm/i915/intel_lrc.c | 178 ++--- drivers/gpu/drm/i915/intel_lrc.h | 2 +- drivers/gpu/drm/i915/intel_overlay.c | 44 +- drivers/gpu/drm/i915/intel_pm.c | 817 +---------------------- drivers/gpu/drm/i915/intel_psr.c | 246 +++++-- drivers/gpu/drm/i915/intel_renderstate_gen6.c | 25 + drivers/gpu/drm/i915/intel_renderstate_gen7.c | 25 + drivers/gpu/drm/i915/intel_renderstate_gen8.c | 25 + drivers/gpu/drm/i915/intel_renderstate_gen9.c | 25 + drivers/gpu/drm/i915/intel_ringbuffer.c | 226 ++++--- drivers/gpu/drm/i915/intel_ringbuffer.h | 23 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 4 +- drivers/gpu/drm/i915/intel_sprite.c | 183 +----- drivers/gpu/drm/i915/intel_uncore.c | 15 +- include/drm/drm_crtc.h | 2 + include/drm/drm_modes.h | 3 + 52 files changed, 3898 insertions(+), 2824 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_gem_batch_pool.c create mode 100644 drivers/gpu/drm/i915/intel_fbc.c -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch

1 0

[PATCH] drm: tda998x: Change cec_write address type
by Jean-Francois Moine 07 Jan '15

07 Jan '15

The CEC registers of the TDA998x have no access by page, so, a 8 bits address is enough. Signed-off-by: Jean-Francois Moine <moinejf(a)free.fr> --- drivers/gpu/drm/i2c/tda998x_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index d476279..70658af 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -342,7 +342,7 @@ struct tda998x_priv { #define TDA19988 0x0301 static void -cec_write(struct tda998x_priv *priv, uint16_t addr, uint8_t val) +cec_write(struct tda998x_priv *priv, uint8_t addr, uint8_t val) { struct i2c_client *client = priv->cec; uint8_t buf[] = {addr, val}; -- 2.1.4

1 0

[PATCH v18 0/12] dw-hdmi: convert imx hdmi to bridge/dw_hdmi
by Andy Yan 07 Jan '15

07 Jan '15

We found Freescale imx6 and Rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS) use the interface compatible Designware HDMI IP, but they also have some lightly differences, such as phy pll configuration, register width(imx hdmi register is one byte, but rk3288 is 4 bytes width and can only be accessed by word), 4K support(imx6 doesn't support 4k, but rk3288 does), and HDMI2.0 support. To reuse the imx-hdmi driver, we make this patch set: (1): fix some CodingStyle warning to make checkpatch happy (2): convert imx-hdmi to drm_bridge (3): split platform specific code (4): move imx-hdmi to bridge/dw_hdmi (5): extend dw_hdmi.c to support rk3288 hdmi (6): add rockchip rk3288 platform specific code dw_hdmi-rockchip.c Changes in v18: - remove a multiple blank lines in imx-hdmi.c - fix a checkpatch warning in imx-hdmi_pltfm.c - add port bindings - correct some spelling mistakes in dw_hdmi bindings doc - correct some spelling mistakes in dw_hdmi-rockchip bindings doc Changes in v17: - remove platform device stuff, adviced by Russell King - remove prompt message of dw_hdmi, adviced by Russel King - parse resource and irq in platform driver Changes in v16: - use the common binding for the clocks - describe ddc-i2c-bus as optional - add common clocks bindings - modify clocks bindings - descrbie ddc-i2c-bus as optional Changes in v15: - add prefix dw_hdmi/DW_HDMI for public used dw_hdmi structs adviced by Philipp Zabel - remove THIS_MODULE in platform driver - remove unio of the multi-byte register access, adviced by Philipp Zabel - remove THIS_MODULE in platform driver Changes in v14: - add defer probing, adviced by Philipp Zabel - remove drm_connector_register, because imx-drm core has registered connector Changes in v13: - patch against drm-next - split platform specific phy configuration - split phy configuration from patch#4 Changes in v12: - refactor of_node_put(ddc_node) - squash patch <convert dw_hdmi to drm_bridge> - add comment for the depend on patch Changes in v11: - squash patch <split some phy configuration to platform driver> Changes in v10: - split generic dw_hdmi.c improvements from patch#11 (add rk3288 support) - add more display mode support mpll configuration for rk3288 Changes in v9: - move some phy configuration to platform driver Changes in v8: - correct some spelling mistake - modify ddc-i2c-bus and interrupt description - Add documentation for rockchip dw hdmi Changes in v7: - remove unused variables from structure dw_hdmi - remove a wrong modification - add copyrights for dw_hdmi-imx.c Changes in v6: - rearrange the patch order - refactor register access without reg_shift Changes in v5: - refactor reg-io-width Changes in v4: - fix checkpatch CHECK - defer probe ddc i2c adapter Changes in v3: - split multi-register access to one indepent patch Andy Yan (12): drm: imx: imx-hdmi: make checkpatch happy drm: imx: imx-hdmi: return defer if can't get ddc i2c adapter drm: imx: imx-hdmi: convert imx-hdmi to drm_bridge mode drm: imx: imx-hdmi: split phy configuration to platform driver drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi dt-bindings: add document for dw_hdmi drm: bridge/dw_hdmi: add support for multi-byte register width access drm: bridge/dw_hdmi: add mode_valid support drm: bridge/dw_hdmi: clear i2cmphy_stat0 reg in hdmi_phy_wait_i2c_done drm: bridge/dw_hdmi: add function dw_hdmi_phy_enable_spare dt-bindings: Add documentation for rockchip dw hdmi drm: bridge/dw_hdmi: add rockchip rk3288 support .../devicetree/bindings/drm/bridge/dw_hdmi.txt | 50 ++ .../devicetree/bindings/video/dw_hdmi-rockchip.txt | 46 ++ drivers/gpu/drm/bridge/Kconfig | 5 + drivers/gpu/drm/bridge/Makefile | 1 + .../gpu/drm/{imx/imx-hdmi.c => bridge/dw_hdmi.c} | 717 ++++++++++----------- .../gpu/drm/{imx/imx-hdmi.h => bridge/dw_hdmi.h} | 4 +- drivers/gpu/drm/imx/Kconfig | 1 + drivers/gpu/drm/imx/Makefile | 2 +- drivers/gpu/drm/imx/dw_hdmi-imx.c | 258 ++++++++ drivers/gpu/drm/rockchip/Kconfig | 10 + drivers/gpu/drm/rockchip/Makefile | 2 + drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 341 ++++++++++ include/drm/bridge/dw_hdmi.h | 61 ++ 13 files changed, 1111 insertions(+), 387 deletions(-) create mode 100644 Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt create mode 100644 Documentation/devicetree/bindings/video/dw_hdmi-rockchip.txt rename drivers/gpu/drm/{imx/imx-hdmi.c => bridge/dw_hdmi.c} (72%) rename drivers/gpu/drm/{imx/imx-hdmi.h => bridge/dw_hdmi.h} (99%) create mode 100644 drivers/gpu/drm/imx/dw_hdmi-imx.c create mode 100644 drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c create mode 100644 include/drm/bridge/dw_hdmi.h -- 1.9.1

6 27

[RFC PATCH v3 4/4] tests/drv_module_reload: add ipvr support
by Yao Cheng 07 Jan '15

07 Jan '15

on vlv, if ipvr is installed, it need be manually unloaded before i915, otherwise user might run into use-after-free issue. v2: added this patch per Daniel's comment v3: no change Signed-off-by: Yao Cheng <yao.cheng(a)intel.com> --- tests/drv_module_reload | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tests/drv_module_reload b/tests/drv_module_reload index 5cbff89..82c67bd 100755 --- a/tests/drv_module_reload +++ b/tests/drv_module_reload @@ -24,6 +24,14 @@ rmmod snd_hda_intel &> /dev/null #ignore errors in ips - gen5 only rmmod intel_ips &> /dev/null + +# vlv only for now: +# due to platform device model limitation, need unload ipvr manually +if lsmod | grep ipvr &> /dev/null ; then + echo Need manually unload ipvr.ko. + rmmod ipvr +fi + rmmod i915 #ignore errors in intel-gtt, often built-in rmmod intel-gtt &> /dev/null @@ -31,6 +39,11 @@ rmmod intel-gtt &> /dev/null rmmod drm_kms_helper &> /dev/null rmmod drm &> /dev/null +if lsmod | grep ipvr &> /dev/null ; then + echo WARNING: ipvr.ko still loaded! + exit 1 +fi + if lsmod | grep i915 &> /dev/null ; then echo WARNING: i915.ko still loaded! exit 1 @@ -41,6 +54,9 @@ fi modprobe i915 echo 1 > /sys/class/vtconsole/vtcon1/bind +# for vlv, load VED driver +modprobe ipvr + modprobe snd_hda_intel # try to run something -- 2.1.0

5 14

[PATCH 1/3] drm/radeon: fix VM flush on cayman/aruba (v3)
by Alex Deucher 07 Jan '15

07 Jan '15

We need to wait for the GPUVM flush to complete. There was some confusion as to how this mechanism was supposed to work. The operation is not atomic. For GPU initiated invalidations you need to read back a VM register to introduce enough latency for the update to complete. v2: drop gart changes v3: just read back rather than polling Reviewed-by: Christian König <christian.koenig(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Cc: stable(a)vger.kernel.org --- drivers/gpu/drm/radeon/ni.c | 10 ++++++++++ drivers/gpu/drm/radeon/ni_dma.c | 6 ++++++ drivers/gpu/drm/radeon/nid.h | 24 ++++++++++++++++++++++++ 3 files changed, 40 insertions(+) diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 360de9f..aea48c8 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -2516,6 +2516,16 @@ void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); radeon_ring_write(ring, 1 << vm_id); + /* wait for the invalidate to complete */ + radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); + radeon_ring_write(ring, (WAIT_REG_MEM_FUNCTION(0) | /* always */ + WAIT_REG_MEM_ENGINE(0))); /* me */ + radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); + radeon_ring_write(ring, 0); + radeon_ring_write(ring, 0); /* ref */ + radeon_ring_write(ring, 0); /* mask */ + radeon_ring_write(ring, 0x20); /* poll interval */ + /* sync PFP to ME, otherwise we might get invalid PFP reads */ radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); radeon_ring_write(ring, 0x0); diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index 50f8861..4be2bb7 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c @@ -463,5 +463,11 @@ void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); radeon_ring_write(ring, (0xf << 16) | (VM_INVALIDATE_REQUEST >> 2)); radeon_ring_write(ring, 1 << vm_id); + + /* wait for invalidate to complete */ + radeon_ring_write(ring, DMA_SRBM_READ_PACKET); + radeon_ring_write(ring, (0xff << 20) | (VM_INVALIDATE_REQUEST >> 2)); + radeon_ring_write(ring, 0); /* mask */ + radeon_ring_write(ring, 0); /* value */ } diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index 2e12e4d..ad71254 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h @@ -1133,6 +1133,23 @@ #define PACKET3_MEM_SEMAPHORE 0x39 #define PACKET3_MPEG_INDEX 0x3A #define PACKET3_WAIT_REG_MEM 0x3C +#define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) + /* 0 - always + * 1 - < + * 2 - <= + * 3 - == + * 4 - != + * 5 - >= + * 6 - > + */ +#define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) + /* 0 - reg + * 1 - mem + */ +#define WAIT_REG_MEM_ENGINE(x) ((x) << 8) + /* 0 - me + * 1 - pfp + */ #define PACKET3_MEM_WRITE 0x3D #define PACKET3_PFP_SYNC_ME 0x42 #define PACKET3_SURFACE_SYNC 0x43 @@ -1272,6 +1289,13 @@ (1 << 21) | \ (((n) & 0xFFFFF) << 0)) +#define DMA_SRBM_POLL_PACKET ((9 << 28) | \ + (1 << 27) | \ + (1 << 26)) + +#define DMA_SRBM_READ_PACKET ((9 << 28) | \ + (1 << 27)) + /* async DMA Packet types */ #define DMA_PACKET_WRITE 0x2 #define DMA_PACKET_COPY 0x3 -- 1.8.3.1

1 2

i915: regression: after DP connected monitor is turned off, when turned on, it does not work anymore
by Jiri Pirko 06 Jan '15

06 Jan '15

Hi. I'm experiencing this issue on Fedora kernel, but I tested that upstream kernel behaves the same. Description of problem: On my T440s machine I'm experiencing this regression when if I turn off DP connected display, I can never make graphics work again. Version-Release number of selected component (if applicable): 3.17.6-200.fc20.x86_64 How reproducible: always Steps to Reproduce: 1. have DP connected display 2. turn it off 3. turn it on Actual results: No signal in display. Expected results: There's signal going into display, everything is flooded in colours. Additional info: With 3.16.4-200.fc20.x86_64 this is working without any issues. I tested with current Linus's git (58628a7831edac5f7a13) and the issue is still there. 00:02.0 0300: 8086:0a16 (rev 0b) (prog-if 00 [VGA controller]) Subsystem: 17aa:220c Flags: bus master, fast devsel, latency 0, IRQ 60 Memory at f0000000 (64-bit, non-prefetchable) [size=4M] Memory at e0000000 (64-bit, prefetchable) [size=256M] I/O ports at 3000 [size=64] Expansion ROM at <unassigned> [disabled] Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Capabilities: [d0] Power Management version 2 Capabilities: [a4] PCI Advanced Features Kernel driver in use: i915 Kernel modules: i915 Screen 0: minimum 320 x 200, current 1920 x 1200, maximum 8192 x 8192 eDP-0 connected (normal left inverted right x axis y axis) 1920x1080 60.01 + 1400x1050 59.98 1280x1024 60.02 1280x960 60.00 1024x768 60.00 800x600 60.32 56.25 640x480 59.94 DP-0 disconnected (normal left inverted right x axis y axis) HDMI-0 disconnected (normal left inverted right x axis y axis) DP-1 connected primary 1920x1200+0+0 (normal left inverted right x axis y axis) 518mm x 324mm 1920x1200 59.95*+ 1920x1080 60.00 50.00 59.94 1920x1080i 60.00 50.00 59.94 1600x1200 60.00 1680x1050 59.95 1280x1024 60.02 1440x900 59.89 1280x960 60.00 1280x720 60.00 50.00 59.94 1024x768 60.00 800x600 60.32 720x576 50.00 720x480 60.00 59.94 640x480 60.00 59.94 HDMI-1 disconnected (normal left inverted right x axis y axis) Please let me know if you need me to provide any other info. I'm eager to test patches. Thanks! Jiri

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[PULL resend] amdkfd-fixes
by Oded Gabbay 06 Jan '15

06 Jan '15

Hi Dave, I'm resending this pull request due to Christian's email on the ioctl patch-set. Highlights: - Complete overhaul to the main IOCTL function, kfd_ioctl(), according to drm_ioctl() example. This includes changing the IOCTL definitions, so it breaks compatibility with previous versions of the userspace. However, because the kernel was not officialy released yet, and this the first kernel that includes amdkfd, I assume I can still do that at this stage. - A couple of bug fixes for the non-HWS path (used for bring-ups and debugging purposes only). Our QA team run a test on -rc2 and didn't discover any regressions, so I don't expect an additionl pull request for 3.19 unless something unexpected will pop-up. Oded The following changes since commit 2f6bd4da08b5054ba933be6f7b17ed02ad6c4162: Merge tag 'amdkfd-fixes-2014-12-30' of git://people.freedesktop.org/~gabbayo/linux into linus (2015-01-04 17:44:43 +1000) are available in the git repository at: git://people.freedesktop.org/~gabbayo/linux tags/amdkfd-fixes-2015-01-06 for you to fetch changes up to 76baee6c733bfef30fcf86cbd121e336b839e408: drm/amdkfd: rewrite kfd_ioctl() according to drm_ioctl() (2015-01-06 19:44:36 +0200) ---------------------------------------------------------------- Alexey Khoroshilov (1): drm/radeon: do not leave queue acquired if timeout happens in kgd_hqd_destroy() Ben Goz (4): drm/amd: Fixing typos in kfd<->kgd interface drm/amdkfd: Load mqd to hqd in non-HWS mode drm/radeon: Assign VMID to PASID for IH in non-HWS mode drm/amdkfd: unmap VMID<-->PASID when relesing VMID (non-HWS) Oded Gabbay (3): drm/amdkfd: Do copy_to/from_user in general kfd_ioctl() drm/amdkfd: reformat IOCTL definitions to drm-style drm/amdkfd: rewrite kfd_ioctl() according to drm_ioctl() drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 315 +++++++++++---------- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 15 + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 2 +- drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 18 ++ drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 2 +- drivers/gpu/drm/radeon/cikd.h | 2 + drivers/gpu/drm/radeon/radeon_kfd.c | 11 +- include/uapi/linux/kfd_ioctl.h | 37 ++- 8 files changed, 235 insertions(+), 167 deletions(-)

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[PULL] amdkfd-fixes
by Oded Gabbay 06 Jan '15

06 Jan '15

Hi Dave, Here are a couple of bug fixes for the non-HWS path (used for bring-ups and debugging purposes only). Our QA team run a test on -rc2 and didn't discover any regressions, so I don't expect an additionl pull request for 3.19 unless something unexpected will pop-up. Oded The following changes since commit 2f6bd4da08b5054ba933be6f7b17ed02ad6c4162: Merge tag 'amdkfd-fixes-2014-12-30' of git://people.freedesktop.org/~gabbayo/linux into linus (2015-01-04 17:44:43 +1000) are available in the git repository at: git://people.freedesktop.org/~gabbayo/linux tags/amdkfd-fixes-2015-01-06 for you to fetch changes up to 2030664b709caa769f2b6a1d2e71d8cb343c6884: drm/amdkfd: unmap VMID<-->PASID when relesing VMID (non-HWS) (2015-01-05 15:48:28 +0200) ---------------------------------------------------------------- Alexey Khoroshilov (1): drm/radeon: do not leave queue acquired if timeout happens in kgd_hqd_destroy() Ben Goz (4): drm/amd: Fixing typos in kfd<->kgd interface drm/amdkfd: Load mqd to hqd in non-HWS mode drm/radeon: Assign VMID to PASID for IH in non-HWS mode drm/amdkfd: unmap VMID<-->PASID when relesing VMID (non-HWS) drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 15 +++++++++++++++ drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 2 +- drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 2 +- drivers/gpu/drm/radeon/cikd.h | 2 ++ drivers/gpu/drm/radeon/radeon_kfd.c | 11 ++++++++--- 5 files changed, 27 insertions(+), 5 deletions(-)

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[PATCH 0/9] Replace use of radeon_sa with a new sub allocator
by Oded Gabbay 06 Jan '15

06 Jan '15

Background: amdkfd needs GART memory for several things, such as runlist packets, MQDs, HPDs and more. Unfortunately, all of this memory must be always pinned (due to several reasons which were discussed during the initial review of amdkfd). Current Solution: The current (short/mid-term) solution that was proposed by Jerome.G, is to limit the amount of memory to a small size, roughly 4MB and allocate this buffer at the start of the GART. To accomodate this, amdkfd has two kernel module parameters, maximum number of HSA processes and maximum number of queues per process, which require under 4MB of GART memory when using their defaults, 32 and 128 respectively. Until now, amdkfd used the radeon sub-allocator module (radeon_sa) to handle the sub-allocation of memory from this large buffer to different modules inside the amdkfd. However, while running OpenCL conformance test suite, we found that radeon_sa module is not suitable for this kind of task, due to its design: 1. Every allocation increments its interal pointer so the next allocation is *always* done ahead of the previous allocation. This causes the internal pointer to wrap-around when it reaches the end of the buffer. 2. When encoutering an area that is already allocated, the module waits for that area to be freed. If it is not freed in a timely manner (or has no fence), the allocation fails. Simply put, it can't "skip" the allocated area. Now, this is most probably good for graphics, but for amdkfd needs, the combination of the two behaviors mentioned above eventually causes a denial-of-service. This is because some memory allocations are *always* present and *never* freed (such as HPDs). Therefore, given enough time and workload, the radeon_sa eventually wraps around, encounters an already allocated area and gets stuck. Proposed new solution: To solve this, I have written a simple sub-allocator module inside amdkfd. It allocates fixed-size contiguous chunks (1 or more) and uses a bitmap to manage the allocations. The next allocation is always being searched for from the start of the GART buffer, and the module knows how to skip allocated chunks. Because most allocations are MQDs, and MQDs are 512 Bytes in size, I set the default chunk size to be 512 Bytes. The basic GART memory allocation is still being done in the amdkfd <--> radeon interface, and it still occupies less than 4MB. I have chosen to implement a new allocator instead of changing radeon_sa because the behavior of radeon_sa is very appropriate for graphics, where allocations do not stay forever. Also, amdkfd doesn't actually need the flexibility and features radeon_sa provides. Oded Oded Gabbay (9): drm/amd: Add new kfd-->kgd interface for gart usage drm/radeon: Impl. new gtt allocate/free functions drm/amdkfd: Add gtt sa related data to kfd_dev struct drm/amdkfd: Add kfd gtt sub-allocator functions drm/amdkfd: Fixed calculation of gart buffer size drm/amdkfd: Allocate gart memory using new interface drm/amdkfd: Using new gtt sa in amdkfd drm/radeon: Remove old radeon_sa usage from kfd-->kgd interface drm/amd: Remove old radeon_sa funcs from kfd-->kgd interface drivers/gpu/drm/amd/amdkfd/kfd_device.c | 217 ++++++++++++++++++++- .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 23 +-- drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c | 41 ++-- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 16 +- drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c | 10 +- drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 28 ++- drivers/gpu/drm/amd/include/kgd_kfd_interface.h | 23 +-- drivers/gpu/drm/radeon/radeon_kfd.c | 128 ++++++------ 8 files changed, 329 insertions(+), 157 deletions(-) -- 2.1.0

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[PATCH 1/2] drm/radeon: Assign VMID to PASID for IH in non-HWS mode
by Oded Gabbay 06 Jan '15

06 Jan '15

From: Ben Goz <ben.goz(a)amd.com> This patch fixes a bug in kgd_set_pasid_vmid_mapping(), where the function only updated the ATC registers (IOMMU) with the new VMID <--> PASID mapping, but didn't update the IH (Interrupt) registers. The bug only occurs when using non-HWS mode. In HWS mode, the CP automatically does the VMID <--> PASID mapping. Signed-off-by: Ben Goz <ben.goz(a)amd.com> Signed-off-by: Oded Gabbay <oded.gabbay(a)amd.com> --- drivers/gpu/drm/radeon/cikd.h | 2 ++ drivers/gpu/drm/radeon/radeon_kfd.c | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h index ba85986..03003f8 100644 --- a/drivers/gpu/drm/radeon/cikd.h +++ b/drivers/gpu/drm/radeon/cikd.h @@ -2156,4 +2156,6 @@ #define ATC_VM_APERTURE1_HIGH_ADDR 0x330Cu #define ATC_VM_APERTURE1_LOW_ADDR 0x3304u +#define IH_VMID_0_LUT 0x3D40u + #endif diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c index a55afba..8bf87f1 100644 --- a/drivers/gpu/drm/radeon/radeon_kfd.c +++ b/drivers/gpu/drm/radeon/radeon_kfd.c @@ -390,6 +390,10 @@ static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid, cpu_relax(); write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid); + /* Mapping vmid to pasid also for IH block */ + write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t), + pasid_mapping); + return 0; } -- 1.9.1

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dri-devel January 2015