dri-devel November 2015

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Patches for 4.4
by Christian König 03 Nov '15

03 Nov '15

Hi Alex, as discussed just the whole set of patches for you to pick up. Regards, Christian.

2 11

Re: [PATCH 5/5] ARM: asm/div64.h: adjust to generic codde
by Nicolas Pitre 03 Nov '15

03 Nov '15

[added Mike/linux-clk and David/dri-devel] A patch I produced is now highlighting existing bugs in the drivers listed below. On Tue, 3 Nov 2015, kbuild test robot wrote: > Hi Nicolas, > > [auto build test WARNING on asm-generic/master -- if it's inappropriate base, please suggest rules for selecting the more suitable base] > > url: https://github.com/0day-ci/linux/commits/Nicolas-Pitre/div64-h-optimize-do_… > config: arm-multi_v7_defconfig (attached as .config) > reproduce: > wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/m… -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # save the attached .config to linux build tree > make.cross ARCH=arm > > All warnings (new ones prefixed by >>): > > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from include/asm-generic/bug.h:13, > from arch/arm/include/asm/bug.h:62, > from include/linux/bug.h:4, > from include/linux/io.h:23, > from include/linux/clk-provider.h:14, > from drivers/clk/imx/clk-pllv1.c:1: > drivers/clk/imx/clk-pllv1.c: In function 'clk_pllv1_recalc_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > >> drivers/clk/imx/clk-pllv1.c:99:2: note: in expansion of macro 'do_div' > do_div(ll, mfd + 1); > ^ Here the problem is in clk-pllv1.c where the ll variable is declared as a long long. It should be an unsigned long long, or better yet an uint64_t or u64. > -- > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from drivers/clk/imx/clk-pllv2.c:1: > drivers/clk/imx/clk-pllv2.c: In function '__clk_pllv2_recalc_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > >> drivers/clk/imx/clk-pllv2.c:103:2: note: in expansion of macro 'do_div' > do_div(temp, mfd + 1); > ^ Same thing: temp is declared as a s64. It should be u64. > drivers/clk/imx/clk-pllv2.c: In function '__clk_pllv2_set_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > drivers/clk/imx/clk-pllv2.c:145:2: note: in expansion of macro 'do_div' > do_div(temp64, quad_parent_rate / 1000000); > ^ Ditto here. > -- > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from drivers/clk/tegra/clk-divider.c:17: > drivers/clk/tegra/clk-divider.c: In function 'get_div': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > >> drivers/clk/tegra/clk-divider.c:50:2: note: in expansion of macro 'do_div' > do_div(divider_ux1, rate); > ^ Ditto here. > -- > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from drivers/clk/ti/clkt_dpll.c:17: > drivers/clk/ti/clkt_dpll.c: In function 'omap2_get_dpll_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > >> drivers/clk/ti/clkt_dpll.c:266:2: note: in expansion of macro 'do_div' > do_div(dpll_clk, dpll_div + 1); > ^ Ditto here. > -- > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from include/linux/clk.h:16, > from drivers/clk/ti/fapll.c:12: > drivers/clk/ti/fapll.c: In function 'ti_fapll_recalc_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > >> drivers/clk/ti/fapll.c:182:3: note: in expansion of macro 'do_div' > do_div(rate, fapll_p); > ^ Ditto here. > drivers/clk/ti/fapll.c: In function 'ti_fapll_synth_recalc_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > drivers/clk/ti/fapll.c:346:3: note: in expansion of macro 'do_div' > do_div(rate, synth_div_freq); > ^ Ditto here. > -- > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from include/linux/list.h:8, > from include/linux/preempt.h:10, > from include/linux/spinlock.h:50, > from include/linux/mmzone.h:7, > from include/linux/gfp.h:5, > from include/linux/slab.h:14, > from drivers/gpu/drm/nouveau/include/nvif/os.h:5, > from drivers/gpu/drm/nouveau/include/nvkm/core/os.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/event.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/device.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h:3, > from drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h:4, > from drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:26: > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c: In function 'gk20a_pllg_calc_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:144:2: note: in expansion of macro 'do_div' > do_div(rate, divider); > ^ > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:144:2: warning: right shift count >= width of type > In file included from include/linux/kernel.h:136:0, > from include/linux/list.h:8, > from include/linux/preempt.h:10, > from include/linux/spinlock.h:50, > from include/linux/mmzone.h:7, > from include/linux/gfp.h:5, > from include/linux/slab.h:14, > from drivers/gpu/drm/nouveau/include/nvif/os.h:5, > from drivers/gpu/drm/nouveau/include/nvkm/core/os.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/event.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/device.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h:3, > from drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h:3, > from drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h:4, > from drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:26: > >> arch/arm/include/asm/div64.h:49:20: warning: passing argument 1 of '__div64_32' from incompatible pointer type > #define __div64_32 __div64_32 > ^ > >> include/asm-generic/div64.h:235:11: note: in expansion of macro '__div64_32' > __rem = __div64_32(&(n), __base); \ > ^ > drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c:144:2: note: in expansion of macro 'do_div' > do_div(rate, divider); > ^ > arch/arm/include/asm/div64.h:32:24: note: expected 'uint64_t *' but argument is of type 'u32 *' > static inline uint32_t __div64_32(uint64_t *n, uint32_t base) > ^ This one is a plain bug. > -- > In file included from arch/arm/include/asm/div64.h:126:0, > from include/linux/kernel.h:136, > from include/linux/list.h:8, > from include/linux/preempt.h:10, > from include/linux/spinlock.h:50, > from include/linux/mmzone.h:7, > from include/linux/gfp.h:5, > from include/linux/slab.h:14, > from drivers/gpu/drm//nouveau/include/nvif/os.h:5, > from drivers/gpu/drm//nouveau/include/nvkm/core/os.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/core/event.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/core/device.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/core/subdev.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/subdev/clk.h:3, > from drivers/gpu/drm//nouveau/nvkm/subdev/clk/priv.h:4, > from drivers/gpu/drm//nouveau/nvkm/subdev/clk/gk20a.c:26: > drivers/gpu/drm//nouveau/nvkm/subdev/clk/gk20a.c: In function 'gk20a_pllg_calc_rate': > include/asm-generic/div64.h:217:28: warning: comparison of distinct pointer types lacks a cast > (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ > ^ This one is a driver bug too. > drivers/gpu/drm//nouveau/nvkm/subdev/clk/gk20a.c:144:2: note: in expansion of macro 'do_div' > do_div(rate, divider); > ^ > drivers/gpu/drm//nouveau/nvkm/subdev/clk/gk20a.c:144:2: warning: right shift count >= width of type > In file included from include/linux/kernel.h:136:0, > from include/linux/list.h:8, > from include/linux/preempt.h:10, > from include/linux/spinlock.h:50, > from include/linux/mmzone.h:7, > from include/linux/gfp.h:5, > from include/linux/slab.h:14, > from drivers/gpu/drm//nouveau/include/nvif/os.h:5, > from drivers/gpu/drm//nouveau/include/nvkm/core/os.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/core/event.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/core/device.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/core/subdev.h:3, > from drivers/gpu/drm//nouveau/include/nvkm/subdev/clk.h:3, > from drivers/gpu/drm//nouveau/nvkm/subdev/clk/priv.h:4, > from drivers/gpu/drm//nouveau/nvkm/subdev/clk/gk20a.c:26: > >> arch/arm/include/asm/div64.h:49:20: warning: passing argument 1 of '__div64_32' from incompatible pointer type > #define __div64_32 __div64_32 > ^ > >> include/asm-generic/div64.h:235:11: note: in expansion of macro '__div64_32' > __rem = __div64_32(&(n), __base); \ > ^ > drivers/gpu/drm//nouveau/nvkm/subdev/clk/gk20a.c:144:2: note: in expansion of macro 'do_div' > do_div(rate, divider); > ^ > arch/arm/include/asm/div64.h:32:24: note: expected 'uint64_t *' but argument is of type 'u32 *' > static inline uint32_t __div64_32(uint64_t *n, uint32_t base) > ^ > > vim +/do_div +99 drivers/clk/imx/clk-pllv1.c > > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 @1 #include <linux/clk-provider.h> > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 2 #include <linux/io.h> > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 3 #include <linux/slab.h> > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 4 #include <linux/kernel.h> > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 5 #include <linux/err.h> > 3a84d17b arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 6 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 7 #include "clk.h" > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 8 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 9 /** > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 10 * pll v1 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 11 * > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 12 * @clk_hw clock source > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 13 * @parent the parent clock name > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 14 * @base base address of pll registers > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 15 * > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 16 * PLL clock version 1, found on i.MX1/21/25/27/31/35 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 17 */ > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 18 > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 19 #define MFN_BITS (10) > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 20 #define MFN_SIGN (BIT(MFN_BITS - 1)) > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 21 #define MFN_MASK (MFN_SIGN - 1) > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 22 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 23 struct clk_pllv1 { > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 24 struct clk_hw hw; > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 25 void __iomem *base; > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 26 enum imx_pllv1_type type; > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 27 }; > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 28 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 29 #define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk)) > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 30 > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 31 static inline bool is_imx1_pllv1(struct clk_pllv1 *pll) > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 32 { > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 33 return pll->type == IMX_PLLV1_IMX1; > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 34 } > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 35 > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 36 static inline bool is_imx21_pllv1(struct clk_pllv1 *pll) > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 37 { > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 38 return pll->type == IMX_PLLV1_IMX21; > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 39 } > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 40 > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 41 static inline bool is_imx27_pllv1(struct clk_pllv1 *pll) > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 42 { > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 43 return pll->type == IMX_PLLV1_IMX27; > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 44 } > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 45 > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 46 static inline bool mfn_is_negative(struct clk_pllv1 *pll, unsigned int mfn) > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 47 { > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 48 return !is_imx1_pllv1(pll) && !is_imx21_pllv1(pll) && (mfn & MFN_SIGN); > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 49 } > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 50 > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 51 static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw, > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 52 unsigned long parent_rate) > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 53 { > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 54 struct clk_pllv1 *pll = to_clk_pllv1(hw); > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 55 long long ll; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 56 int mfn_abs; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 57 unsigned int mfi, mfn, mfd, pd; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 58 u32 reg; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 59 unsigned long rate; > 2af9e6db arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-03-09 60 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 61 reg = readl(pll->base); > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 62 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 63 /* > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 64 * Get the resulting clock rate from a PLL register value and the input > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 65 * frequency. PLLs with this register layout can be found on i.MX1, > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 66 * i.MX21, i.MX27 and i,MX31 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 67 * > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 68 * mfi + mfn / (mfd + 1) > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 69 * f = 2 * f_ref * -------------------- > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 70 * pd + 1 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 71 */ > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 72 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 73 mfi = (reg >> 10) & 0xf; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 74 mfn = reg & 0x3ff; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 75 mfd = (reg >> 16) & 0x3ff; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 76 pd = (reg >> 26) & 0xf; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 77 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 78 mfi = mfi <= 5 ? 5 : mfi; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 79 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 80 mfn_abs = mfn; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 81 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 82 /* > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 83 * On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 84 * 2's complements number. > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 85 * On i.MX27 the bit 9 is the sign bit. > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 86 */ > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 87 if (mfn_is_negative(pll, mfn)) { > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 88 if (is_imx27_pllv1(pll)) > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 89 mfn_abs = mfn & MFN_MASK; > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 90 else > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 91 mfn_abs = BIT(MFN_BITS) - mfn; > a5947903 arch/arm/mach-imx/clk-pllv1.c Alexander Shiyan 2013-11-10 92 } > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 93 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 94 rate = parent_rate * 2; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 95 rate /= pd + 1; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 96 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 97 ll = (unsigned long long)rate * mfn_abs; > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 98 > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 @99 do_div(ll, mfd + 1); > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 100 > 3bec5f81 arch/arm/mach-imx/clk-pllv1.c Shawn Guo 2015-04-26 101 if (mfn_is_negative(pll, mfn)) > a6dd3c81 arch/arm/mach-imx/clk-pllv1.c Sascha Hauer 2012-09-11 102 ll = -ll; > > :::::: The code at line 99 was first introduced by commit > :::::: a6dd3c812e774b876d440c1a9ec1bd0fd5659390 ARM: i.MX clk pllv1: move mxc_decode_pll code to its user > > :::::: TO: Sascha Hauer <s.hauer(a)pengutronix.de> > :::::: CC: Sascha Hauer <s.hauer(a)pengutronix.de> > > --- > 0-DAY kernel test infrastructure Open Source Technology Center > https://lists.01.org/pipermail/kbuild-all Intel Corporation >

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[RESEND][GIT PULL] exynos-drm-next
by Inki Dae 03 Nov '15

03 Nov '15

Hi Dave, This pull request includes comprehensive cleanups to HDMI part and several fixups. In addition, this pull request includes also a defconfig patch which enables mixer driver as default. For this, I got already Acked-by from Krzysztof Kozlowski who is a Exynos SoC maintainer. In previous pull-request[1], there was Exynos specific userspace interface, DRM_EXYNOS_GEM_MAP ioctl. However, there was no real user actually using the interface yet. So removed it from this pull request. We have a real user[2] for it called Tizen platform, and the Graphics stack of the Tizen consists of Wayland or Xorg, libtbm and its backend specific to Hardware. The libtbm backend uses libdrm. So we are wait for the libtbm backend uses DRM_EXYNOS_GEM_MAP interface. Please kindly let me know if there is any problem. Thanks, Inki Dae [1] http://www.spinics.net/lists/dri-devel/msg93217.html [2] http://www.spinics.net/lists/dri-devel/msg93248.html The following changes since commit d7e1bc3f5e70c5a106606e33cfa4d413459611ba: Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next (2015-10-23 11:54:03 +1000) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos exynos-drm-next for you to fetch changes up to df547bf7735a623500eedff9cc6716ac1d82b95d: drm/exynos/gem: remove DMA-mapping hacks used for constructing page array (2015-11-03 11:46:39 +0900) ---------------------------------------------------------------- Andrzej Hajda (27): drm/exynos/hdmi: remove support for deprecated compatible drm/exynos/hdmi: use mappings for registers with IP dependent address drm/exynos/hdmi: move PLL stabilization check code to separate function drm/exynos/hdmi: simplify HDMI-PHY power sequence drm/exynos/hdmi: replace all writeb with writel drm/exynos/hdmi: fix removal order drm/exynos/hdmi: use optional regulator_get for hdmi-en drm/exynos/hdmi: use constant size array for regulators drm/exynos/hdmi: simplify clock re-parenting drm/exynos/hdmi: convert to gpiod API drm/exynos/hdmi: remove deprecated hdmi_resources structure drm/exynos/hdmi: convert container_of macro to inline function drm/exynos/hdmi: improve HDMI/ACR related code drm/exynos/hdmi: remove unused field drm/exynos/decon5433: add PCLK clock drm/exynos/decon5433: fix timing registers writes drm/exynos/decon5433: add function to set particular register bits drm/exynos/decon5433: merge different flag fields drm/exynos/decon5433: remove duplicated initialization drm/exynos/decon5433: add support for DECON-TV drm/exynos: add atomic_check callback to exynos_crtc drm/exynos/mixer: replace direct cross-driver call with drm mode validation drm/exynos: separate Mixer and HDMI drivers drm/exynos: abstract out common dependency drm/exynos: re-arrange Kconfig entries drm/exynos: simplify Kconfig component names ARM: exynos_defconfig: enable Exynos DRM Mixer driver Gustavo Padovan (2): drm/exynos: add global macro for the default primary plane drm/exynos: add cursor plane support Ingi Kim (1): drm/exynos: fix spelling errors Joonyoung Shim (2): drm/exynos: fix to detach device of iommu drm/exynos: cleanup name of gem object for exynos_drm Marek Szyprowski (1): drm/exynos/gem: remove DMA-mapping hacks used for constructing page array Tomasz Stanislawski (1): drm: exynos: mixer: fix using usleep() in atomic context arch/arm/configs/exynos_defconfig | 1 + drivers/gpu/drm/exynos/Kconfig | 75 ++-- drivers/gpu/drm/exynos/Makefile | 3 +- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 324 +++++++++-------- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 7 +- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 12 + drivers/gpu/drm/exynos/exynos_drm_drv.c | 4 +- drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 + drivers/gpu/drm/exynos/exynos_drm_fb.c | 45 ++- drivers/gpu/drm/exynos/exynos_drm_fb.h | 5 +- drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 53 +-- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 16 +- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 7 +- drivers/gpu/drm/exynos/exynos_drm_gem.c | 275 +++++++------- drivers/gpu/drm/exynos/exynos_drm_gem.h | 15 +- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 12 +- drivers/gpu/drm/exynos/exynos_drm_iommu.c | 3 +- drivers/gpu/drm/exynos/exynos_drm_plane.c | 20 +- drivers/gpu/drm/exynos/exynos_drm_plane.h | 2 + drivers/gpu/drm/exynos/exynos_drm_vidi.c | 8 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 496 +++++++++----------------- drivers/gpu/drm/exynos/exynos_mixer.c | 17 +- drivers/gpu/drm/exynos/exynos_mixer.h | 20 -- drivers/gpu/drm/exynos/regs-hdmi.h | 33 +- include/video/exynos5433_decon.h | 29 ++ 25 files changed, 694 insertions(+), 793 deletions(-) delete mode 100644 drivers/gpu/drm/exynos/exynos_mixer.h

1 0

[PATCH v2 00/13] Add mipi dsi support for rk3288
by Chris Zhong 03 Nov '15

03 Nov '15

The rk3288 MIPI DSI is a Synopsys DesignWare MIPI DSI host controller IP. This series adds support for a Synopsys DesignWare MIPI DSI host controller DRM bridge driver and a rockchip MIPI DSI specific DRM driver. This series also includes a DRM panel driver for BOE TV080WUM-NL0 panel. This panel only use the MIPI DSI video mode. The MIPI DSI feature is tested on rk3288 evb board, backport them to chrome os kernel v3.14, and it can display normally. This patchset is base on the patchset from Ying.liu(a)freescale.com. <http://www.spinics.net/lists/dri-devel/msg77181.html> Changes in v2: add the mipi clk id in a single patch add vendor prefix for boe As Thierry.Reding comment, add a documentation for this panel. Chris Zhong (11): clk: rockchip: add id for mipidsi sclk on rk3288 clk: rockchip: add mipidsi clocks on rk3288 drm/rockchip: return a true clock rate to adjusted_mode drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver drm: rockchip: Support Synopsys DesignWare MIPI DSI host controller Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver ARM: dts: rockchip: add rk3288 mipi_dsi nodes of: add vendor prefix for boe drm/panel: simple: Add support for BOE TV080WUM-NL0 drm/panel: simple: Add simple panel device tree binding ARM: dts: rockchip: add support mipi panel tv080wum-nl0 for rk3288-evb Liu Ying (2): drm/dsi: Add a helper to get bits per pixel of MIPI DSI pixel format Documentation: dt-bindings: Add bindings for Synopsys DW MIPI DSI DRM bridge driver .../devicetree/bindings/drm/bridge/dw_mipi_dsi.txt | 76 ++ .../devicetree/bindings/panel/boe,tv080wum-nl0.txt | 7 + .../devicetree/bindings/vendor-prefixes.txt | 1 + .../bindings/video/dw_mipi_dsi_rockchip.txt | 56 ++ arch/arm/boot/dts/rk3288-evb.dtsi | 20 +- arch/arm/boot/dts/rk3288.dtsi | 39 + drivers/clk/rockchip/clk-rk3288.c | 2 +- drivers/gpu/drm/bridge/Kconfig | 9 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/dw_mipi_dsi.c | 1055 ++++++++++++++++++++ drivers/gpu/drm/panel/panel-simple.c | 33 + drivers/gpu/drm/rockchip/Kconfig | 10 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c | 249 +++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 9 + include/drm/bridge/dw_mipi_dsi.h | 27 + include/drm/drm_mipi_dsi.h | 14 + include/dt-bindings/clock/rk3288-cru.h | 1 + 18 files changed, 1608 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/drm/bridge/dw_mipi_dsi.txt create mode 100644 Documentation/devicetree/bindings/panel/boe,tv080wum-nl0.txt create mode 100644 Documentation/devicetree/bindings/video/dw_mipi_dsi_rockchip.txt create mode 100644 drivers/gpu/drm/bridge/dw_mipi_dsi.c create mode 100644 drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c create mode 100644 include/drm/bridge/dw_mipi_dsi.h -- 2.6.2

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[PATCH -next] drm/vc4: Add dependency on HAVE_DMA_ATTRS, and select DRM_GEM_CMA_HELPER
by Guenter Roeck 02 Nov '15

02 Nov '15

Avoid the following build errors, seen with m68k:allmodconfig and other architectures which do not support HAVE_DMA_ATTRS. ERROR: "drm_gem_cma_create" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_prime_mmap" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_prime_get_sg_table" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_vm_ops" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_mmap" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_prime_vunmap" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_prime_import_sg_table" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_free_object" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_prime_vmap" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_dumb_map_offset" [drivers/gpu/drm/vc4/vc4.ko] undefined! ERROR: "drm_gem_cma_create" [drivers/gpu/drm/drm_kms_helper.ko] undefined! ERROR: "drm_gem_cma_describe" [drivers/gpu/drm/drm_kms_helper.ko] undefined! ERROR: "drm_gem_cma_free_object" [drivers/gpu/drm/drm_kms_helper.ko] undefined! Cc: Eric Anholt <eric(a)anholt.net> Fixes: c8b75bca92cb ("drm/vc4: Add KMS support for Raspberry Pi.") Signed-off-by: Guenter Roeck <linux(a)roeck-us.net> --- drivers/gpu/drm/vc4/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig index e502802d74b6..2d7d115ddf3f 100644 --- a/drivers/gpu/drm/vc4/Kconfig +++ b/drivers/gpu/drm/vc4/Kconfig @@ -1,9 +1,10 @@ config DRM_VC4 tristate "Broadcom VC4 Graphics" depends on ARCH_BCM2835 || COMPILE_TEST - depends on DRM + depends on DRM && HAVE_DMA_ATTRS select DRM_KMS_HELPER select DRM_KMS_CMA_HELPER + select DRM_GEM_CMA_HELPER help Choose this option if you have a system that has a Broadcom VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835. -- 2.1.4

2 1

[Bug 106851] WARNING: CPU: 0 PID: 686 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x68/0x80() + drm:radeon_pm_late_init [radeon]] *ERROR*
by bugzilla-daemon＠bugzilla.kernel.org 02 Nov '15

02 Nov '15

https://bugzilla.kernel.org/show_bug.cgi?id=106851 Hin-Tak Leung <htl10(a)users.sourceforge.net> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |htl10(a)users.sourceforge.net --- Comment #6 from Hin-Tak Leung <htl10(a)users.sourceforge.net> --- me too with 4.2.5 . -- You are receiving this mail because: You are watching the assignee of the bug.

1 0

[Bug 92765] Linux 4.1.12+, 4.2.5+ -> drm:radeon_pm_late_init [radeon]] *ERROR* + WARNING: CPU: 0 PID: 686 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x68/0x80() +
by bugzilla-daemon＠freedesktop.org 02 Nov '15

02 Nov '15

https://bugs.freedesktop.org/show_bug.cgi?id=92765 Bug ID: 92765 Summary: Linux 4.1.12+, 4.2.5+ -> drm:radeon_pm_late_init [radeon]] *ERROR* + WARNING: CPU: 0 PID: 686 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x68/0x80() + Product: Mesa Version: 11.0 Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org Reporter: lblmr(a)yopmail.com QA Contact: dri-devel(a)lists.freedesktop.org Hey guys. Since I've upgraded to 4.1.12 from 4.1.11 I've been getting some errors: Oct 29 05:26:43 hosty kernel: radeon 0000:01:00.0: WB enabled Oct 29 05:26:43 hosty kernel: radeon 0000:01:00.0: fence driver on ring 0 use gpu addr 0x0000000080000c00 and cpu addr 0xffff8800cbbdec00 Oct 29 05:26:43 hosty kernel: radeon 0000:01:00.0: fence driver on ring 1 use gpu addr 0x0000000080000c04 and cpu addr 0xffff8800cbbdec04 Oct 29 05:26:43 hosty kernel: radeon 0000:01:00.0: fence driver on ring 2 use gpu addr 0x0000000080000c08 and cpu addr 0xffff8800cbbdec08 Oct 29 05:26:43 hosty kernel: radeon 0000:01:00.0: fence driver on ring 3 use gpu addr 0x0000000080000c0c and cpu addr 0xffff8800cbbdec0c Oct 29 05:26:43 hosty kernel: radeon 0000:01:00.0: fence driver on ring 4 use gpu addr 0x0000000080000c10 and cpu addr 0xffff8800cbbdec10 Oct 29 05:26:43 hosty kernel: [drm] ring test on 0 succeeded in 1 usecs Oct 29 05:26:43 hosty kernel: [drm] ring test on 1 succeeded in 1 usecs Oct 29 05:26:43 hosty kernel: [drm] ring test on 2 succeeded in 1 usecs Oct 29 05:26:43 hosty kernel: [drm] ring test on 3 succeeded in 3 usecs Oct 29 05:26:43 hosty kernel: [drm] ring test on 4 succeeded in 3 usecs Oct 29 05:26:43 hosty kernel: [drm] ib test on ring 0 succeeded in 0 usecs Oct 29 05:26:43 hosty kernel: [drm] ib test on ring 1 succeeded in 0 usecs Oct 29 05:26:43 hosty kernel: [drm] ib test on ring 2 succeeded in 0 usecs Oct 29 05:26:43 hosty kernel: [drm] ib test on ring 3 succeeded in 0 usecs Oct 29 05:26:43 hosty kernel: [drm] ib test on ring 4 succeeded in 0 usecs Oct 29 05:26:43 hosty kernel: ------------[ cut here ]------------ Oct 29 05:26:43 hosty kernel: WARNING: CPU: 0 PID: 686 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x68/0x80() Oct 29 05:26:43 hosty kernel: sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:01.0/0000:01:00.0/power_dpm_state' Oct 29 05:26:43 hosty kernel: Modules linked in: uvcvideo videobuf2_vmalloc videobuf2_memops videobuf2_core v4l2_common videodev media joydev snd_hda_codec_hdmi mousedev snd_hda_codec_realtek snd_hda_ Oct 29 05:26:43 hosty kernel: drm snd_pcm ie31200_edac ptp mei_me snd_timer mei pps_core intel_gtt snd i2c_algo_bit regmap_i2c soundcore i2c_hid shpchp edac_core i2c_designware_platform parport_pc wm Oct 29 05:26:43 hosty kernel: CPU: 0 PID: 686 Comm: Xorg.wrap Tainted: G U O 4.1.12-1-ck #1 Oct 29 05:26:43 hosty kernel: Hardware name: Dell Inc. Latitude E6440/0K9GNV, BIOS A13 09/01/2015 Oct 29 05:26:43 hosty kernel: 0000000000000000 00000000f4e85e22 ffff88021d917778 ffffffff8156f7ac Oct 29 05:26:43 hosty kernel: 0000000000000000 ffff88021d9177d0 ffff88021d9177b8 ffffffff81077a3a Oct 29 05:26:43 hosty kernel: 000064d01d9177b8 ffff88021f4f3000 ffffffffa08e6470 ffff88022480f168 Oct 29 05:26:43 hosty kernel: Call Trace: Oct 29 05:26:43 hosty kernel: [<ffffffff8156f7ac>] dump_stack+0x4c/0x6e Oct 29 05:26:43 hosty kernel: [<ffffffff81077a3a>] warn_slowpath_common+0x8a/0xc0 Oct 29 05:26:43 hosty kernel: [<ffffffff81077ac5>] warn_slowpath_fmt+0x55/0x70 Oct 29 05:26:43 hosty kernel: [<ffffffff81238c58>] ? kernfs_path+0x48/0x60 Oct 29 05:26:43 hosty kernel: [<ffffffff8123c538>] sysfs_warn_dup+0x68/0x80 Oct 29 05:26:43 hosty kernel: [<ffffffff8123c217>] sysfs_add_file_mode_ns+0x147/0x1b0 Oct 29 05:26:43 hosty kernel: [<ffffffff8123c2aa>] sysfs_create_file_ns+0x2a/0x40 Oct 29 05:26:43 hosty kernel: [<ffffffff813d80c6>] device_create_file+0x46/0xb0 Oct 29 05:26:43 hosty kernel: [<ffffffffa08081c8>] radeon_pm_late_init+0x88/0x1d0 [radeon] Oct 29 05:26:43 hosty kernel: [<ffffffffa0798c23>] radeon_resume_kms+0x283/0x420 [radeon] Oct 29 05:26:43 hosty kernel: [<ffffffffa0796143>] radeon_pmops_runtime_resume+0x73/0xb0 [radeon] Oct 29 05:26:43 hosty kernel: [<ffffffff812fb1bf>] pci_pm_runtime_resume+0x7f/0xc0 Oct 29 05:26:43 hosty kernel: [<ffffffff813d5050>] ? vga_switcheroo_runtime_suspend+0x60/0x60 Oct 29 05:26:43 hosty kernel: [<ffffffff813d5089>] vga_switcheroo_runtime_resume+0x39/0x40 Oct 29 05:26:43 hosty kernel: [<ffffffff813e7326>] __rpm_callback+0x36/0x90 Oct 29 05:26:43 hosty kernel: [<ffffffff813e73a8>] rpm_callback+0x28/0x90 Oct 29 05:26:43 hosty kernel: [<ffffffff813e87de>] rpm_resume+0x4ce/0x6b0 Oct 29 05:26:43 hosty kernel: [<ffffffff813e89ff>] __pm_runtime_resume+0x3f/0x60 Oct 29 05:26:43 hosty kernel: [<ffffffffa079b006>] radeon_driver_open_kms+0x36/0x1d0 [radeon] Oct 29 05:26:43 hosty kernel: [<ffffffff812632c8>] ? security_capable+0x18/0x20 Oct 29 05:26:43 hosty kernel: [<ffffffffa043185f>] drm_open+0x1af/0x4c0 [drm] Oct 29 05:26:43 hosty kernel: [<ffffffff811c61f1>] ? exact_lock+0x11/0x20 Oct 29 05:26:43 hosty kernel: [<ffffffffa0438789>] drm_stub_open+0xa9/0x120 [drm] Oct 29 05:26:43 hosty kernel: [<ffffffff811c65ce>] chrdev_open+0xae/0x1f0 Oct 29 05:26:43 hosty kernel: [<ffffffff811bf4f7>] do_dentry_open+0x227/0x330 Oct 29 05:26:43 hosty kernel: [<ffffffff811c6520>] ? cdev_put+0x30/0x30 Oct 29 05:26:43 hosty kernel: [<ffffffff811c0736>] vfs_open+0x56/0x60 Oct 29 05:26:43 hosty kernel: [<ffffffff811d0354>] do_last.isra.11+0x344/0xf60 Oct 29 05:26:43 hosty kernel: [<ffffffff811ceb1e>] ? path_init+0x17e/0x460 Oct 29 05:26:43 hosty kernel: [<ffffffff811d1001>] path_openat+0x91/0x690 Oct 29 05:26:43 hosty kernel: [<ffffffff811d2a99>] do_filp_open+0x49/0xd0 Oct 29 05:26:43 hosty kernel: [<ffffffff812c76ca>] ? find_next_zero_bit+0x1a/0x30 Oct 29 05:26:43 hosty kernel: [<ffffffff811e00b7>] ? __alloc_fd+0xa7/0x130 Oct 29 05:26:43 hosty kernel: [<ffffffff811c0b3d>] do_sys_open+0x14d/0x250 Oct 29 05:26:43 hosty kernel: [<ffffffff811c0c5e>] SyS_open+0x1e/0x20 Oct 29 05:26:43 hosty kernel: [<ffffffff8157566e>] system_call_fastpath+0x12/0x71 Oct 29 05:26:43 hosty kernel: ---[ end trace 1148860c62f9432d ]--- Oct 29 05:26:43 hosty kernel: [drm:radeon_pm_late_init [radeon]] *ERROR* failed to create device file for dpm state Oct 29 05:26:43 hosty kernel: ------------[ cut here ]------------ This is when I start the X server/ power off / reboot / resume from suspend : Oct 29 05:25:40 hosty kernel: [drm:radeon_pm_late_init [radeon]] *ERROR* failed to create device file for dpm state Oct 29 05:25:40 hosty kernel: [drm:radeon_pm_late_init [radeon]] *ERROR* failed to create device file for dpm state Oct 29 05:25:40 hosty kernel: [drm:radeon_pm_late_init [radeon]] *ERROR* failed to create device file for power profile Oct 29 05:25:40 hosty kernel: [drm:radeon_pm_late_init [radeon]] *ERROR* failed to create device file for power method Found something related: https://lkml.org/lkml/2015/10/26/780 Right now I'm running the -ck patch, but it behaves the same on the generic one Hw: DGPU 01:00.0 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] Sun XT [Radeon HD 8670A/8670M/8690M / R5 M330] (rev ff) OS: ArchLinux It didn't happen on Linux 4.1.11 and 4.2.4. I think this is the commit that messed it up: ============================================================== commit 4e4887f08f2ece9e7f1975af4c3dc797b1ad557b Author: Alex Deucher <alexander.deucher(a)amd.com> Date: Wed Sep 30 16:45:52 2015 -0400 drm/radeon: add pm sysfs files late commit 51a4726b04e880fdd9b4e0e58b13f70b0a68a7f5 upstream. They were added relatively early in the driver init process which meant that in some cases the driver was not finished initializing before external tools tried to use them which could result in a crash depending on the timing. Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> ============================================================== -- You are receiving this mail because: You are the assignee for the bug.

3 4

[PATCH] drm: Describe the Rotation property bits.
by Robert Fekete 02 Nov '15

02 Nov '15

Adds clarification of the rotation property bits. I.e. rotation is Counter clockwise and that reflects are applied before any rotation. Signed-off-by: Robert Fekete <robert.fekete(a)linux.intel.com> --- include/drm/drm_crtc.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 3f0c6909dda1..45334fa0cb10 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -85,7 +85,11 @@ static inline uint64_t I642U64(int64_t val) return (uint64_t)*((uint64_t *)&val); } -/* rotation property bits */ +/* + * Rotation property bits. Rotate-(degrees) rotates the image by the specified + * amount in degrees in counter clockwise direction. reflect-x and reflect-y + * reflects the image along the specified axis prior to rotation + */ #define DRM_ROTATE_MASK 0x0f #define DRM_ROTATE_0 0 #define DRM_ROTATE_90 1 -- 1.9.1

2 2

drm/exynos: when to call dma_map_sg() on a GEM object?
by Tobias Jakobi 02 Nov '15

02 Nov '15

Hey there, this question arose during some discussion with someone concerning the Exynos mixer and G2D. The question is the following. Consider the Exynos mixer when run under the IOMMU (that's sysmmu_tv IIRC). What exactly does setup the IOMMU mapping so that the mixer can scanout the framebuffer? There is exynos_gem_map_sgt_with_dma() in the Exynos GEM code, but it's currently exclusively used for the G2D and only when dealing with userptr (and not GEM) there. I was looking at exynos_drm_alloc_buf() since this called when allocating a BO to be used as scanout. I see dma_alloc_attrs() being called, which also sets the DMA address that is later used in the mixer code. But DMA_ATTR_NO_KERNEL_MAPPING is passed, so no mapping is done at this point. Is the mapping done somewhere else, or is it simply not necessary here? With best wishes, Tobias

3 3

[PATCH v3] tests/exynos: add fimg2d performance analysis
by Tobias Jakobi 02 Nov '15

02 Nov '15

Currently only fast solid color clear performance is measured. A large buffer is allocated and solid color clear operations are executed on it with randomly chosen properties (position and size of the region, clear color). Execution time is measured and output together with the amount of pixels processed. The 'simple' variant only executes one G2D command buffer at a time, while the 'multi' variant executes multiple ones. This can be used to measure setup/exec overhead. The test also serves a stability check. If clocks/voltages are too high or low respectively, the test quickly reveals this. v2: Add GPLv2 header, argument handling and documentation. Tool is only installed when requested. v3: Free images array in fimg2d_perf_multi() as pointed out by Hyungwon Hwang. Signed-off-by: Tobias Jakobi <tjakobi(a)math.uni-bielefeld.de> --- tests/exynos/Makefile.am | 19 ++- tests/exynos/exynos_fimg2d_perf.c | 326 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 343 insertions(+), 2 deletions(-) create mode 100644 tests/exynos/exynos_fimg2d_perf.c diff --git a/tests/exynos/Makefile.am b/tests/exynos/Makefile.am index b21d016..e82d199 100644 --- a/tests/exynos/Makefile.am +++ b/tests/exynos/Makefile.am @@ -5,16 +5,31 @@ AM_CFLAGS = \ -I $(top_srcdir)/exynos \ -I $(top_srcdir) +bin_PROGRAMS = +noinst_PROGRAMS = + if HAVE_LIBKMS if HAVE_INSTALL_TESTS -bin_PROGRAMS = \ +bin_PROGRAMS += \ exynos_fimg2d_test else -noinst_PROGRAMS = \ +noinst_PROGRAMS += \ exynos_fimg2d_test endif endif +if HAVE_INSTALL_TESTS +bin_PROGRAMS += \ + exynos_fimg2d_perf +else +noinst_PROGRAMS += \ + exynos_fimg2d_perf +endif + +exynos_fimg2d_perf_LDADD = \ + $(top_builddir)/libdrm.la \ + $(top_builddir)/exynos/libdrm_exynos.la + exynos_fimg2d_test_LDADD = \ $(top_builddir)/libdrm.la \ $(top_builddir)/libkms/libkms.la \ diff --git a/tests/exynos/exynos_fimg2d_perf.c b/tests/exynos/exynos_fimg2d_perf.c new file mode 100644 index 0000000..5068b9a --- /dev/null +++ b/tests/exynos/exynos_fimg2d_perf.c @@ -0,0 +1,326 @@ +/* + * Copyright (C) 2015 - Tobias Jakobi + * + * This is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published + * by the Free Software Foundation, either version 2 of the License, + * or (at your option) any later version. + * + * It is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * You should have received a copy of the GNU General Public License + * along with it. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <stdlib.h> +#include <stdio.h> +#include <time.h> +#include <getopt.h> + +#include <xf86drm.h> + +#include "exynos_drm.h" +#include "exynos_drmif.h" +#include "exynos_fimg2d.h" + +static int output_mathematica = 0; + +static int fimg2d_perf_simple(struct exynos_bo *bo, struct g2d_context *ctx, + unsigned buf_width, unsigned buf_height, unsigned iterations) +{ + struct timespec tspec = { 0 }; + struct g2d_image img = { 0 }; + + unsigned long long g2d_time; + unsigned i; + int ret = 0; + + img.width = buf_width; + img.height = buf_height; + img.stride = buf_width * 4; + img.color_mode = G2D_COLOR_FMT_ARGB8888 | G2D_ORDER_AXRGB; + img.buf_type = G2D_IMGBUF_GEM; + img.bo[0] = bo->handle; + + srand(time(NULL)); + + printf("starting simple G2D performance test\n"); + printf("buffer width = %u, buffer height = %u, iterations = %u\n", + buf_width, buf_height, iterations); + + if (output_mathematica) + putchar('{'); + + for (i = 0; i < iterations; ++i) { + unsigned x, y, w, h; + + x = rand() % buf_width; + y = rand() % buf_height; + + if (x == (buf_width - 1)) + x -= 1; + if (y == (buf_height - 1)) + y -= 1; + + w = rand() % (buf_width - x); + h = rand() % (buf_height - y); + + if (w == 0) w = 1; + if (h == 0) h = 1; + + img.color = rand(); + + ret = g2d_solid_fill(ctx, &img, x, y, w, h); + + clock_gettime(CLOCK_MONOTONIC, &tspec); + + if (ret == 0) + ret = g2d_exec(ctx); + + if (ret != 0) { + fprintf(stderr, "error: iteration %u failed (x = %u, y = %u, w = %u, h = %u)\n", + i, x, y, w, h); + break; + } else { + struct timespec end = { 0 }; + clock_gettime(CLOCK_MONOTONIC, &end); + + g2d_time = (end.tv_sec - tspec.tv_sec) * 1000000000ULL; + g2d_time += (end.tv_nsec - tspec.tv_nsec); + + if (output_mathematica) { + if (i != 0) putchar(','); + printf("{%u,%llu}", w * h, g2d_time); + } else { + printf("num_pixels = %u, usecs = %llu\n", w * h, g2d_time); + } + } + } + + if (output_mathematica) + printf("}\n"); + + return ret; +} + +static int fimg2d_perf_multi(struct exynos_bo *bo, struct g2d_context *ctx, + unsigned buf_width, unsigned buf_height, unsigned iterations, unsigned batch) +{ + struct timespec tspec = { 0 }; + struct g2d_image *images; + + unsigned long long g2d_time; + unsigned i, j; + int ret = 0; + + images = calloc(batch, sizeof(struct g2d_image)); + if (images == NULL) { + fprintf(stderr, "error: failed to allocate G2D images.\n"); + return -ENOMEM; + } + + for (i = 0; i < batch; ++i) { + images[i].width = buf_width; + images[i].height = buf_height; + images[i].stride = buf_width * 4; + images[i].color_mode = G2D_COLOR_FMT_ARGB8888 | G2D_ORDER_AXRGB; + images[i].buf_type = G2D_IMGBUF_GEM; + images[i].bo[0] = bo->handle; + } + + srand(time(NULL)); + + printf("starting multi G2D performance test (batch size = %u)\n", batch); + printf("buffer width = %u, buffer height = %u, iterations = %u\n", + buf_width, buf_height, iterations); + + if (output_mathematica) + putchar('{'); + + for (i = 0; i < iterations; ++i) { + unsigned num_pixels = 0; + + for (j = 0; j < batch; ++j) { + unsigned x, y, w, h; + + x = rand() % buf_width; + y = rand() % buf_height; + + if (x == (buf_width - 1)) + x -= 1; + if (y == (buf_height - 1)) + y -= 1; + + w = rand() % (buf_width - x); + h = rand() % (buf_height - y); + + if (w == 0) w = 1; + if (h == 0) h = 1; + + images[j].color = rand(); + + num_pixels += w * h; + + ret = g2d_solid_fill(ctx, &images[j], x, y, w, h); + if (ret != 0) + break; + } + + clock_gettime(CLOCK_MONOTONIC, &tspec); + + if (ret == 0) + ret = g2d_exec(ctx); + + if (ret != 0) { + fprintf(stderr, "error: iteration %u failed (num_pixels = %u)\n", i, num_pixels); + break; + } else { + struct timespec end = { 0 }; + clock_gettime(CLOCK_MONOTONIC, &end); + + g2d_time = (end.tv_sec - tspec.tv_sec) * 1000000000ULL; + g2d_time += (end.tv_nsec - tspec.tv_nsec); + + if (output_mathematica) { + if (i != 0) putchar(','); + printf("{%u,%llu}", num_pixels, g2d_time); + } else { + printf("num_pixels = %u, usecs = %llu\n", num_pixels, g2d_time); + } + } + } + + if (output_mathematica) + printf("}\n"); + + free(images); + + return ret; +} + +static void usage(const char *name) +{ + fprintf(stderr, "usage: %s [-ibwh]\n\n", name); + + fprintf(stderr, "\t-i <number of iterations>\n"); + fprintf(stderr, "\t-b <size of a batch> (default = 3)\n\n"); + + fprintf(stderr, "\t-w <buffer width> (default = 4096)\n"); + fprintf(stderr, "\t-h <buffer height> (default = 4096)\n\n"); + + fprintf(stderr, "\t-M <enable Mathematica styled output>\n"); + + exit(0); +} + +int main(int argc, char **argv) +{ + int fd, ret, c, parsefail; + + struct exynos_device *dev; + struct g2d_context *ctx; + struct exynos_bo *bo; + + unsigned int iters = 0, batch = 3; + unsigned int bufw = 4096, bufh = 4096; + + ret = 0; + parsefail = 0; + + while ((c = getopt(argc, argv, "i:b:w:h:M")) != -1) { + switch (c) { + case 'i': + if (sscanf(optarg, "%u", &iters) != 1) + parsefail = 1; + break; + case 'b': + if (sscanf(optarg, "%u", &batch) != 1) + parsefail = 1; + break; + case 'w': + if (sscanf(optarg, "%u", &bufw) != 1) + parsefail = 1; + break; + case 'h': + if (sscanf(optarg, "%u", &bufh) != 1) + parsefail = 1; + break; + case 'M': + output_mathematica = 1; + break; + default: + parsefail = 1; + break; + } + } + + if (parsefail || (argc == 1) || (iters == 0)) + usage(argv[0]); + + if (bufw < 2 || bufw > 4096 || bufh < 2 || bufh > 4096) { + fprintf(stderr, "error: buffer width/height should be in the range 2 to 4096.\n"); + ret = -1; + + goto out; + } + + if (bufw == 0 || bufh == 0) { + fprintf(stderr, "error: buffer width/height should be non-zero.\n"); + ret = -1; + + goto out; + } + + fd = drmOpen("exynos", NULL); + if (fd < 0) { + fprintf(stderr, "error: failed to open drm\n"); + ret = -1; + + goto out; + } + + dev = exynos_device_create(fd); + if (dev == NULL) { + fprintf(stderr, "error: failed to create device\n"); + ret = -2; + + goto fail; + } + + ctx = g2d_init(fd); + if (ctx == NULL) { + fprintf(stderr, "error: failed to init G2D\n"); + ret = -3; + + goto g2d_fail; + } + + bo = exynos_bo_create(dev, bufw * bufh * 4, 0); + if (bo == NULL) { + fprintf(stderr, "error: failed to create bo\n"); + ret = -4; + + goto bo_fail; + } + + ret = fimg2d_perf_simple(bo, ctx, bufw, bufh, iters); + + if (ret == 0) + ret = fimg2d_perf_multi(bo, ctx, bufw, bufh, iters, batch); + + exynos_bo_destroy(bo); + +bo_fail: + g2d_fini(ctx); + +g2d_fail: + exynos_device_destroy(dev); + +fail: + drmClose(fd); + +out: + return ret; +} -- 2.4.9

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dri-devel November 2015