dri-devel December 2015

dri-devel@lists.freedesktop.org

162 participants
1148 discussions

[PATCH v3 1/3] modetest: introduce get_prop_info() for getting property id and type
by Hyungwon Hwang 07 Dec '15

07 Dec '15

Modetest gets the property name from user to set it. So the name must be converted to its id. Until now, this is done in the set_property(). But to support atomic modeset in modetest, this logic should be separated from the fuction, because atomic modeset and legacy modeset use different IOCTLs. Signed-off-by: Hyungwon Hwang <human.hwang(a)samsung.com> --- tests/modetest/modetest.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c index 3b01918..08ecf58 100644 --- a/tests/modetest/modetest.c +++ b/tests/modetest/modetest.c @@ -894,12 +894,11 @@ struct property_arg { uint64_t value; }; -static void set_property(struct device *dev, struct property_arg *p) +static int get_prop_info(struct resources *resources, struct property_arg *p, + const char *obj_type) { drmModeObjectProperties *props = NULL; drmModePropertyRes **props_info = NULL; - const char *obj_type; - int ret; int i; p->obj_type = 0; @@ -918,21 +917,21 @@ static void set_property(struct device *dev, struct property_arg *p) } \ } while(0) \ - find_object(dev->resources, res, crtc, CRTC); + find_object(resources, res, crtc, CRTC); if (p->obj_type == 0) - find_object(dev->resources, res, connector, CONNECTOR); + find_object(resources, res, connector, CONNECTOR); if (p->obj_type == 0) - find_object(dev->resources, plane_res, plane, PLANE); + find_object(resources, plane_res, plane, PLANE); if (p->obj_type == 0) { fprintf(stderr, "Object %i not found, can't set property\n", p->obj_id); - return; + return -1; } if (!props) { fprintf(stderr, "%s %i has no properties\n", obj_type, p->obj_id); - return; + return -1; } for (i = 0; i < (int)props->count_props; ++i) { @@ -945,11 +944,23 @@ static void set_property(struct device *dev, struct property_arg *p) if (i == (int)props->count_props) { fprintf(stderr, "%s %i has no %s property\n", obj_type, p->obj_id, p->name); - return; + return -1; } p->prop_id = props->props[i]; + return 0; +} + +static void set_property(struct device *dev, struct property_arg *p) +{ + int ret; + const char *obj_type = NULL; + + ret = get_prop_info(dev->resources, p, obj_type); + if (ret < 0) + return; + ret = drmModeObjectSetProperty(dev->fd, p->obj_id, p->obj_type, p->prop_id, p->value); if (ret < 0) -- 2.4.3

3 7

[PATCH] drm/omap: Use platform_register/unregister_drivers()
by Thierry Reding 07 Dec '15

07 Dec '15

From: Thierry Reding <treding(a)nvidia.com> These new helpers simplify implementing multi-driver modules and properly handle failure to register one driver by unregistering all previously registered drivers. Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- drivers/gpu/drm/omapdrm/omap_drv.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 5c6609cbb6a2..db6d05576685 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -928,35 +928,23 @@ static struct platform_driver pdev = { .remove = pdev_remove, }; +static struct platform_driver * const drivers[] = { + &omap_dmm_driver, + &pdev, +}; + static int __init omap_drm_init(void) { - int r; - DBG("init"); - r = platform_driver_register(&omap_dmm_driver); - if (r) { - pr_err("DMM driver registration failed\n"); - return r; - } - - r = platform_driver_register(&pdev); - if (r) { - pr_err("omapdrm driver registration failed\n"); - platform_driver_unregister(&omap_dmm_driver); - return r; - } - - return 0; + return platform_register_drivers(drivers, ARRAY_SIZE(drivers)); } static void __exit omap_drm_fini(void) { DBG("fini"); - platform_driver_unregister(&pdev); - - platform_driver_unregister(&omap_dmm_driver); + platform_unregister_drivers(drivers, ARRAY_SIZE(drivers)); } /* need late_initcall() so we load after dss_driver's are loaded */ -- 2.5.0

2 1

DRM i2c module or bridge ?
by Emil Velikov 07 Dec '15

07 Dec '15

Hello Thierry, all, Inspired by a recent discussion I was started wondering - where is the cut between DRM i2c modules (most of which encoders/transmitters) and bridge drivers (again some of which i2c encoders) ? Does anyone has some pointers on the topic ? Based on the above I did a very quick search for third party IP modules in the DRM subsystem: * i915 dvo_ch7017.c dvo_ch7xxx.c dvo_ivch.c dvo_ns2501.c dvo_sil164.c dvo_tfp410.c * gma500 tc35876x-dsi-lvds.c * sti sti_hdmi_tx3g0c55phy.c sti_hdmi_tx3g4c28phy.c (and for posterity) * i2c adv7511.c ch7006_drv.c sil164_drv.c tda998x_drv.c * bridge dw_hdmi.c nxp-ptn3460.c parade-ps8622.c By the looks of it, we can move rework (some of?) the above into i2c/bridge modules and in other cases (sil164) just use the existing one ? I'm neither volunteering nor suggesting people must work of these, merely curious. Thanks Emil

3 4

[PATCH] drm/exynos: decon: remove unused variables
by Inki Dae 07 Dec '15

07 Dec '15

This patch just removes unused variables, i and ret. Signed-off-by: Inki Dae <inki.dae(a)samsung.com> --- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index edfd6e3..2ac1d4d 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c @@ -377,8 +377,6 @@ static void decon_swreset(struct decon_context *ctx) static void decon_enable(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; - int ret; - int i; if (!test_and_clear_bit(BIT_SUSPENDED, &ctx->flags)) return; -- 1.9.1

2 1

[PATCH v2 1/2] drm/exynos: dp: add of_graph dt binding support for panel
by Inki Dae 07 Dec '15

07 Dec '15

This patch adds of_graph dt binding support for panel device and also keeps the backward compatibility. i.e., The dts file for Exynos5800 based peach pi board has a panel property so we need to keep the backward compatibility. Changelog v2: - return -EINVAL if getting a port node failed. Signed-off-by: Inki Dae <inki.dae(a)samsung.com> --- drivers/gpu/drm/exynos/exynos_dp_core.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c index 94f02a0..0b53045 100644 --- a/drivers/gpu/drm/exynos/exynos_dp_core.c +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c @@ -1392,7 +1392,7 @@ static const struct component_ops exynos_dp_ops = { static int exynos_dp_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct device_node *panel_node, *bridge_node, *endpoint; + struct device_node *panel_node = NULL, *bridge_node, *endpoint = NULL; struct exynos_dp_device *dp; int ret; @@ -1403,15 +1403,32 @@ static int exynos_dp_probe(struct platform_device *pdev) platform_set_drvdata(pdev, dp); + /* This is for the backward compatibility. */ panel_node = of_parse_phandle(dev->of_node, "panel", 0); if (panel_node) { dp->panel = of_drm_find_panel(panel_node); of_node_put(panel_node); if (!dp->panel) return -EPROBE_DEFER; + } else { + endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); + if (endpoint) { + panel_node = of_graph_get_remote_port_parent(endpoint); + if (panel_node) { + dp->panel = of_drm_find_panel(panel_node); + of_node_put(panel_node); + if (!dp->panel) + return -EPROBE_DEFER; + } else { + DRM_ERROR("no port node for panel device.\n"); + return -EINVAL; + } + } } - endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); + panel_node = !endpoint ? NULL : panel_node; + + endpoint = of_graph_get_next_endpoint(dev->of_node, panel_node); if (endpoint) { bridge_node = of_graph_get_remote_port_parent(endpoint); if (bridge_node) { -- 1.9.1

4 9

[PATCH 03/10] i915: Replace "hweight8(dev_priv->info.subslice_7eu[i]) != 1" with "!is_power_of_2(dev_priv->info.subslice_7eu[i])"
by Zhaoxiu Zeng 07 Dec '15

07 Dec '15

From: Zeng Zhaoxiu <zhaoxiu.zeng(a)gmail.com> Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng(a)gmail.com> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 9461a23..16c8cf1 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -27,6 +27,7 @@ * */ +#include <linux/log2.h> #include <drm/drmP.h> #include "i915_drv.h" #include <drm/i915_drm.h> @@ -1000,7 +1001,7 @@ static int skl_tune_iz_hashing(struct intel_engine_cs *ring) * Only consider slices where one, and only one, subslice has 7 * EUs */ - if (hweight8(dev_priv->info.subslice_7eu[i]) != 1) + if (!is_power_of_2(dev_priv->info.subslice_7eu[i])) continue; /* -- 2.5.0

3 2

[PATCH] amdgpu: add amdgpu_find_bo_by_cpu_mapping interface V2
by Chunming Zhou 07 Dec '15

07 Dec '15

userspace needs to know if the user memory is from BO or malloc. V2: add bo_table_mutex protection. Change-Id: Ie2dbc13f1c02bc0a996f64f9db83a21da63c1d70 Signed-off-by: Chunming Zhou <David1.Zhou(a)amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou(a)amd.com> (V1) Reviewed-by: Christian König <christian.koenig(a)amd.com> (V1) --- amdgpu/amdgpu.h | 24 ++++++++++++++++++++++++ amdgpu/amdgpu_bo.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ include/drm/amdgpu_drm.h | 12 ++++++++++++ 3 files changed, 82 insertions(+) diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index baae113..4925056 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h @@ -672,6 +672,30 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev, amdgpu_bo_handle *buf_handle); /** + * Validate if the user memory comes from BO + * + * \param dev - [in] Device handle. See #amdgpu_device_initialize() + * \param cpu - [in] CPU address of user allocated memory which we + * want to map to GPU address space (make GPU accessible) + * (This address must be correctly aligned). + * \param size - [in] Size of allocation (must be correctly aligned) + * \param buf_handle - [out] Buffer handle for the userptr memory + * if the user memory is not from BO, the buf_handle will be NULL. + * \param offset_in_bo - [out] offset in this BO for this user memory + * + * + * \return 0 on success\n + * <0 - Negative POSIX Error code + * +*/ +int amdgpu_find_bo_by_cpu_mapping(amdgpu_device_handle dev, + void *cpu, + uint64_t size, + amdgpu_bo_handle *buf_handle, + uint64_t *offset_in_bo); + + +/** * Free previosuly allocated memory * * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c index 5a0f4ac..2e794ef 100644 --- a/amdgpu/amdgpu_bo.c +++ b/amdgpu/amdgpu_bo.c @@ -528,6 +528,52 @@ int amdgpu_bo_wait_for_idle(amdgpu_bo_handle bo, } } +int amdgpu_find_bo_by_cpu_mapping(amdgpu_device_handle dev, + void *cpu, + uint64_t size, + amdgpu_bo_handle *buf_handle, + uint64_t *offset_in_bo) +{ + int r; + struct amdgpu_bo *bo; + struct drm_amdgpu_gem_find_bo args; + + pthread_mutex_lock(&dev->bo_table_mutex); + args.addr = (uintptr_t)cpu; + args.size = size; + r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_FIND_BO, + &args, sizeof(args)); + if (r) { + pthread_mutex_unlock(&dev->bo_table_mutex); + return r; + } + if (args.handle == 0) { + pthread_mutex_unlock(&dev->bo_table_mutex); + return -EINVAL; + } + bo = util_hash_table_get(dev->bo_handles, + (void*)(uintptr_t)args.handle); + if (!bo) { + bo = calloc(1, sizeof(struct amdgpu_bo)); + if (!bo) { + pthread_mutex_unlock(&dev->bo_table_mutex); + return -ENOMEM; + } + atomic_set(&bo->refcount, 1); + bo->dev = dev; + bo->alloc_size = size; + bo->handle = args.handle; + } else + atomic_inc(&bo->refcount); + + *buf_handle = bo; + *offset_in_bo = args.offset; + pthread_mutex_unlock(&dev->bo_table_mutex); + + return r; +} + + int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev, void *cpu, uint64_t size, diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index 050e7fe..e07904c 100644 --- a/include/drm/amdgpu_drm.h +++ b/include/drm/amdgpu_drm.h @@ -47,6 +47,7 @@ #define DRM_AMDGPU_GEM_OP 0x10 #define DRM_AMDGPU_GEM_USERPTR 0x11 #define DRM_AMDGPU_WAIT_FENCES 0x12 +#define DRM_AMDGPU_GEM_FIND_BO 0x13 #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create) #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap) @@ -61,6 +62,7 @@ #define DRM_IOCTL_AMDGPU_GEM_OP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_OP, struct drm_amdgpu_gem_op) #define DRM_IOCTL_AMDGPU_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_USERPTR, struct drm_amdgpu_gem_userptr) #define DRM_IOCTL_AMDGPU_WAIT_FENCES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_FENCES, union drm_amdgpu_wait_fences) +#define DRM_IOCTL_AMDGPU_GEM_FIND_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_FIND_BO, struct drm_amdgpu_gem_find_bo) #define AMDGPU_GEM_DOMAIN_CPU 0x1 #define AMDGPU_GEM_DOMAIN_GTT 0x2 @@ -201,6 +203,16 @@ struct drm_amdgpu_gem_userptr { uint32_t handle; }; +struct drm_amdgpu_gem_find_bo { + uint64_t addr; + uint64_t size; + uint32_t flags; + /* Resulting GEM handle */ + uint32_t handle; + /* offset in bo */ + uint64_t offset; +}; + /* same meaning as the GB_TILE_MODE and GL_MACRO_TILE_MODE fields */ #define AMDGPU_TILING_ARRAY_MODE_SHIFT 0 #define AMDGPU_TILING_ARRAY_MODE_MASK 0xf -- 1.9.1

2 1

[PATCH 00/12] drm/msm/dsi: Add support for DSI on MSM8960/APQ8064
by Archit Taneja 07 Dec '15

07 Dec '15

Add support for DSI on 8960/8064. The DSI IP used in these chips is an older version(DSIv2) of what we have right now(DSI6G). The bulk of the additions come thanks to a different PHY/PLL. The DSI host in itself doesn't have too many changes. Archit Taneja (12): drm/msm/dsi: Update generated header for 8960 drm/msm/dsi: Add support for 28nm PHY on 8960 drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY drm/msm/dsi: Use a better way to figure out DSI version drm/msm/dsi: Delay dsi_clk_init drm/msm/dsi: Parse bus clocks from a list drm/msm/dsi: Set up link clocks for DSIv2 drm/msm/dsi: Add dsi_cfg for APQ8064 drm/msm/dsi: Don't use iommu for command TX buffer for DSIv2 drm/msm/dsi: SFPB: Update generated headers drm/msm/dsi: Enable MMSS SPFB port via syscon dt-bindings: Add DSIv2 documentation Documentation/devicetree/bindings/drm/msm/dsi.txt | 10 +- drivers/gpu/drm/msm/Kconfig | 8 + drivers/gpu/drm/msm/Makefile | 2 + drivers/gpu/drm/msm/dsi/dsi.h | 6 +- drivers/gpu/drm/msm/dsi/dsi.xml.h | 243 +++++++--- drivers/gpu/drm/msm/dsi/dsi_cfg.c | 35 +- drivers/gpu/drm/msm/dsi/dsi_cfg.h | 4 + drivers/gpu/drm/msm/dsi/dsi_host.c | 497 ++++++++++++++------ drivers/gpu/drm/msm/dsi/dsi_manager.c | 6 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 4 + drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 195 ++++++++ drivers/gpu/drm/msm/dsi/pll/dsi_pll.c | 3 + drivers/gpu/drm/msm/dsi/pll/dsi_pll.h | 10 + drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 529 ++++++++++++++++++++++ drivers/gpu/drm/msm/dsi/sfpb.xml.h | 26 +- 16 files changed, 1363 insertions(+), 216 deletions(-) create mode 100644 drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c create mode 100644 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation

3 51

[PATCH] gpu: host1x: mipi: Added missing mutex_unlock
by Saurabh Sengar 06 Dec '15

06 Dec '15

In case of error too function should return after releasing the mutex Signed-off-by: Saurabh Sengar <saurabh.truth(a)gmail.com> --- drivers/gpu/host1x/mipi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c index 52a6fd2..6e559a9 100644 --- a/drivers/gpu/host1x/mipi.c +++ b/drivers/gpu/host1x/mipi.c @@ -250,6 +250,7 @@ struct tegra_mipi_device *tegra_mipi_request(struct device *device) dev_err(dev->mipi->dev, "failed to power up MIPI bricks: %d\n", err); + mutex_unlock(&dev->mipi->lock); return ERR_PTR(err); } } -- 1.9.1

1 0

[PATCH] Gpu: drm: tilcdc: don't use devm_pinctrl_get_select_default() in probe
by Nizam Haider 06 Dec '15

06 Dec '15

Since commit ab78029ecc34 (drivers/pinctrl: grab default handles from device core), we can rely on device core for setting the default pins. Signed-off-by: Nizam Haider <nizamhaider786(a)gmail.com> --- drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c index 354c47c..205f461 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c @@ -18,8 +18,6 @@ #include <linux/i2c.h> #include <linux/gpio.h> #include <linux/of_gpio.h> -#include <linux/pinctrl/pinmux.h> -#include <linux/pinctrl/consumer.h> #include "tilcdc_drv.h" @@ -312,7 +310,6 @@ static int tfp410_probe(struct platform_device *pdev) struct device_node *i2c_node; struct tfp410_module *tfp410_mod; struct tilcdc_module *mod; - struct pinctrl *pinctrl; uint32_t i2c_phandle; int ret = -EINVAL; @@ -331,10 +328,6 @@ static int tfp410_probe(struct platform_device *pdev) tilcdc_module_init(mod, "tfp410", &tfp410_module_ops); - pinctrl = devm_pinctrl_get_select_default(&pdev->dev); - if (IS_ERR(pinctrl)) - dev_warn(&pdev->dev, "pins are not configured\n"); - if (of_property_read_u32(node, "i2c", &i2c_phandle)) { dev_err(&pdev->dev, "could not get i2c bus phandle\n"); goto fail; -- 1.8.1.4

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dri-devel December 2015