dri-devel June 2015

dri-devel@lists.freedesktop.org

188 participants
1140 discussions

[pull] radeon drm-fixes-4.1
by Alex Deucher 11 Jun '15

11 Jun '15

Hi Dave, If you are still taking fixes for 4.1, take this and ignore my last radeon 4.2 pull request. The following changes since commit 38d8571dad8a759bdc051dbff747b189c90658cf: drm: fix writing to /sys/class/drm/*/status (2015-06-06 08:27:30 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-fixes-4.1 for you to fetch changes up to ee18e599251ed06bf0c8ade7c434a0de311342ca: drm/radeon: Make sure radeon_vm_bo_set_addr always unreserves the BO (2015-06-11 10:27:54 -0400) ---------------------------------------------------------------- Alex Deucher (2): Revert "drm/radeon: don't share plls if monitors differ in audio support" Revert "drm/radeon: adjust pll when audio is not enabled" Jérôme Glisse (1): drm/radeon: fix freeze for laptop with Turks/Thames GPU. Michel Dänzer (1): drm/radeon: Make sure radeon_vm_bo_set_addr always unreserves the BO drivers/gpu/drm/radeon/atombios_crtc.c | 7 +------ drivers/gpu/drm/radeon/radeon_device.c | 15 +++++++++++++++ drivers/gpu/drm/radeon/radeon_vm.c | 17 ++++++++++++----- 3 files changed, 28 insertions(+), 11 deletions(-)

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re: drm/amdgpu: Add support for CIK parts
by Dan Carpenter 11 Jun '15

11 Jun '15

Hello Alex Deucher, The patch a2e73f56fa62: "drm/amdgpu: Add support for CIK parts" from Apr 20, 2015, leads to the following static checker warning: drivers/gpu/drm/amd/amdgpu/ci_dpm.c:4509 ci_set_mc_special_registers() error: buffer overflow 'table->mc_reg_address' 16 <= 16 drivers/gpu/drm/amd/amdgpu/ci_dpm.c 4491 j++; 4492 if (j >= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) 4493 return -EINVAL; 4494 4495 temp_reg = RREG32(mmMC_PMG_CMD_MRS); 4496 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; 4497 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; 4498 for (k = 0; k < table->num_entries; k++) { 4499 table->mc_reg_table_entry[k].mc_data[j] = 4500 (temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); 4501 if (adev->mc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) 4502 table->mc_reg_table_entry[k].mc_data[j] |= 0x100; 4503 } 4504 j++; 4505 if (j > SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) This should >= instead of >. 4506 return -EINVAL; 4507 4508 if (adev->mc.vram_type != AMDGPU_VRAM_TYPE_GDDR5) { 4509 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; 4510 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; 4511 for (k = 0; k < table->num_entries; k++) { 4512 table->mc_reg_table_entry[k].mc_data[j] = 4513 (table->mc_reg_table_entry[k].mc_data[i] & 0xffff0000) >> 16; 4514 } 4515 j++; 4516 if (j > SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) 4517 return -EINVAL; But my question was about the other checks, should they be changed as well? 4518 } 4519 break; 4520 case mmMC_SEQ_RESERVE_M: 4521 temp_reg = RREG32(mmMC_PMG_CMD_MRS1); 4522 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS1; 4523 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS1_LP; 4524 for (k = 0; k < table->num_entries; k++) { 4525 table->mc_reg_table_entry[k].mc_data[j] = 4526 (temp_reg & 0xffff0000) | (table->mc_reg_table_entry[k].mc_data[i] & 0x0000ffff); 4527 } 4528 j++; 4529 if (j > SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) 4530 return -EINVAL; 4531 break; 4532 default: 4533 break; 4534 } 4535 4536 } 4537 4538 table->last = j; We use the last j here. It's not clear to me if ->last has to be within the array. I would have generally assumed it would be except for the check below. 4539 4540 return 0; 4541 } 4542 [ snip ] 4670 static int ci_register_patching_mc_seq(struct amdgpu_device *adev, 4671 struct ci_mc_reg_table *table) 4672 { 4673 u8 i, k; 4674 u32 tmp; 4675 bool patch; 4676 4677 tmp = RREG32(mmMC_SEQ_MISC0); 4678 patch = ((tmp & 0x0000f00) == 0x300) ? true : false; 4679 4680 if (patch && 4681 ((adev->pdev->device == 0x67B0) || 4682 (adev->pdev->device == 0x67B1))) { 4683 for (i = 0; i < table->last; i++) { 4684 if (table->last >= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) Here, we assume ->last has to be inside the array. 4685 return -EINVAL; regards, dan carpenter

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[PATCH] drm/msm/dsi: Use pinctrl in DSI driver
by Hai Li 11 Jun '15

11 Jun '15

Some targets use pinctrl framework to configure some pins. This change allows DSI driver to set default and sleep pinctrl status. Signed-off-by: Hai Li <hali(a)codeaurora.org> --- Documentation/devicetree/bindings/drm/msm/dsi.txt | 7 +++++++ drivers/gpu/drm/msm/dsi/dsi_host.c | 12 ++++++++++++ 2 files changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/drm/msm/dsi.txt b/Documentation/devicetree/bindings/drm/msm/dsi.txt index 6ccd860..4edd6fa 100644 --- a/Documentation/devicetree/bindings/drm/msm/dsi.txt +++ b/Documentation/devicetree/bindings/drm/msm/dsi.txt @@ -38,6 +38,9 @@ Optional properties: driving a 2-DSI panel whose 2 links need receive command simultaneously. - interrupt-parent: phandle to the MDP block if the interrupt signal is routed through MDP block +- pinctrl-names: the pin control state names; should contain "default" +- pinctrl-0: the default pinctrl state (active) +- pinctrl-n: the "sleep" pinctrl state DSI PHY: Required properties: @@ -94,6 +97,10 @@ Example: qcom,master-dsi; qcom,sync-dual-dsi; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mdss_dsi_active>; + pinctrl-1 = <&mdss_dsi_suspend>; + panel: panel@0 { compatible = "sharp,lq101r1sx01"; reg = <0>; diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index de04009..69c1397 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -20,6 +20,7 @@ #include <linux/of_device.h> #include <linux/of_gpio.h> #include <linux/of_irq.h> +#include <linux/pinctrl/consumer.h> #include <linux/regulator/consumer.h> #include <linux/spinlock.h> #include <video/mipi_display.h> @@ -1919,6 +1920,13 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host) goto fail_disable_reg; } + ret = pinctrl_pm_select_default_state(&msm_host->pdev->dev); + if (ret) { + pr_err("%s: failed to set pinctrl default state, %d\n", + __func__, ret); + goto fail_disable_clk; + } + dsi_timing_setup(msm_host); dsi_sw_reset(msm_host); dsi_ctrl_config(msm_host, true, clk_pre, clk_post); @@ -1931,6 +1939,8 @@ int msm_dsi_host_power_on(struct mipi_dsi_host *host) return 0; +fail_disable_clk: + dsi_clk_ctrl(msm_host, 0); fail_disable_reg: dsi_host_regulator_disable(msm_host); unlock_ret: @@ -1953,6 +1963,8 @@ int msm_dsi_host_power_off(struct mipi_dsi_host *host) if (msm_host->disp_en_gpio) gpiod_set_value(msm_host->disp_en_gpio, 0); + pinctrl_pm_select_sleep_state(&msm_host->pdev->dev); + msm_dsi_manager_phy_disable(msm_host->id); dsi_clk_ctrl(msm_host, 0); -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation

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[PATCH 1/2] drm/exynos: ipp: fix wrong index referencing a config element
by Hyungwon Hwang 11 Jun '15

11 Jun '15

Config depends on the opreation. So it must be referenced by an operation id, not a property id. Signed-off-by: Hyungwon Hwang <human.hwang(a)samsung.com> --- drivers/gpu/drm/exynos/exynos_drm_ipp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c b/drivers/gpu/drm/exynos/exynos_drm_ipp.c index b7f1cbc..54c5cf4 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c +++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c @@ -486,8 +486,7 @@ static int ipp_validate_mem_node(struct drm_device *drm_dev, unsigned int bpp; int i; - /* The property id should already be varified */ - ipp_cfg = &c_node->property.config[m_node->prop_id]; + ipp_cfg = &c_node->property.config[m_node->ops_id]; num_plane = drm_format_num_planes(ipp_cfg->fmt); /** -- 1.9.1

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[PATCH v3] drm/exynos: dsi: check whether dsi is enabled before sending data
by Hyungwon Hwang 11 Jun '15

11 Jun '15

exynos_dsi_host_transfer() can be called through a panel driver while DSI is turning down. It is possible because the function checks only whether DSI is initialized or not, and there is a moment which DSI is set by uninitialized, but DSI is still turning down. To prevent it, DSI must be set by disabled before starting to be turned down, and exynos_dsi_host_transfer() must check whether DSI is enabled or not. Kernel dump: [ 4721.351448] Unhandled fault: synchronous external abort (0x96000210) at 0xffffff800015e018 [ 4721.351809] Internal error: : 96000210 [#1] PREEMPT SMP [ 4721.352031] Modules linked in: [ 4721.352173] CPU: 2 PID: 300 Comm: deviced Tainted: G W 4.0.4-01017-g7964a87 #1 [ 4721.353989] Hardware name: Samsung DRACO board (DT) [ 4721.358852] task: ffffffc0a0b70000 ti: ffffffc0a00ec000 task.ti: ffffffc0a00ec000 [ 4721.366327] PC is at exynos_dsi_enable_lane+0x14/0x5c [ 4721.371353] LR is at exynos_dsi_host_transfer+0x834/0x8d8 [ 4721.376731] pc : [<ffffffc000432bcc>] lr : [<ffffffc000434590>] pstate: 60000145 [ 4721.384107] sp : ffffffc0a00efbe0 [ 4721.387405] x29: ffffffc0a00efbe0 x28: ffffffc0a00ec000 [ 4721.392699] x27: ffffffc000968000 x26: 0000000000000040 [ 4721.397994] x25: ffffffc000f74dc0 x24: ffffffc0a00efec8 [ 4721.403290] x23: ffffffc0a4815400 x22: ffffffc0009f2729 [ 4721.408584] x21: ffffffc0a00efcc8 x20: ffffffc0a4a2a848 [ 4721.413879] x19: ffffffc0a4a2a818 x18: 0000000000000004 [ 4721.419173] x17: 0000007faa5cddf0 x16: ffffffc0001a40a8 [ 4721.424469] x15: 0000000000000009 x14: 000000000000000d [ 4721.429762] x13: 6e6e6f63206b726f x12: 0000000000000010 [ 4721.435058] x11: 0101010101010101 x10: 0000000000000000 [ 4721.440353] x9 : 000000000000000a x8 : 8386838282818381 [ 4721.445648] x7 : ffffffc0a201efe8 x6 : 0000000000000000 [ 4721.450943] x5 : 00000000fffffffa x4 : ffffffc0a201f170 [ 4721.456237] x3 : ffffff800015e000 x2 : ffffff800015e018 [ 4721.461531] x1 : 000000000000000f x0 : ffffffc0a4a2a818 [ 4721.466826] [ 4721.468305] Process deviced (pid: 300, stack limit = 0xffffffc0a00ec028) [ 4721.474989] Stack: (0xffffffc0a00efbe0 to 0xffffffc0a00f0000) [ 4721.480720] fbe0: a00efca0 ffffffc0 0042c944 ffffffc0 a0f2d680 ffffffc0 00000024 00000000 [ 4721.488895] fc00: a4b6d000 ffffffc0 009f2729 ffffffc0 a4815400 ffffffc0 a00efec8 ffffffc0 Signed-off-by: Hyungwon Hwang <human.hwang(a)samsung.com> --- Changes for v2: - Previous version of this patch makes a problem in initializing the DSI. This patch fixes it, by moving the point which DSI is set by enabled to the point before drm_panel_prepare() called. This is where the setting must be done, because to call drm_panel_prepare() successfully, DSI must be enabled. Also this patch adds the condition to TE irq handler. DSI must be enabled and initialized, not just enabled before calling te_handler in the display driver. Changes for v3: - New state DSIM_STATE_VIDOUT_AVAILABLE for representing video output availability is introduced. Because DSIM_STATE_ENABLED becomes to represent whether DSI can be used for data transfer or not, this state can be used for checking whether video ouput is available or not anymore. So new state have to be introduced. The stete DSIM_STATE_VIDOUT_AVAILABLE represents whether DSI is prepared for outputting video to a panel or not. drivers/gpu/drm/exynos/exynos_drm_dsi.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 1cfc4be07..9250356 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -241,6 +241,7 @@ struct exynos_dsi_transfer { #define DSIM_STATE_ENABLED BIT(0) #define DSIM_STATE_INITIALIZED BIT(1) #define DSIM_STATE_CMD_LPM BIT(2) +#define DSIM_STATE_VIDOUT_AVAILABLE BIT(3) struct exynos_dsi_driver_data { unsigned int *regs; @@ -1268,7 +1269,7 @@ static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) struct exynos_dsi *dsi = (struct exynos_dsi *)dev_id; struct drm_encoder *encoder = dsi->display.encoder; - if (dsi->state & DSIM_STATE_ENABLED) + if (dsi->state & DSIM_STATE_VIDOUT_AVAILABLE) exynos_drm_crtc_te_handler(encoder->crtc); return IRQ_HANDLED; @@ -1408,6 +1409,9 @@ static ssize_t exynos_dsi_host_transfer(struct mipi_dsi_host *host, struct exynos_dsi_transfer xfer; int ret; + if (!(dsi->state & DSIM_STATE_ENABLED)) + return -EINVAL; + if (!(dsi->state & DSIM_STATE_INITIALIZED)) { ret = exynos_dsi_init(dsi); if (ret) @@ -1520,8 +1524,11 @@ static int exynos_dsi_enable(struct exynos_dsi *dsi) if (ret < 0) return ret; + dsi->state |= DSIM_STATE_ENABLED; + ret = drm_panel_prepare(dsi->panel); if (ret < 0) { + dsi->state &= ~DSIM_STATE_ENABLED; exynos_dsi_poweroff(dsi); return ret; } @@ -1529,8 +1536,6 @@ static int exynos_dsi_enable(struct exynos_dsi *dsi) exynos_dsi_set_display_mode(dsi); exynos_dsi_set_display_enable(dsi, true); - dsi->state |= DSIM_STATE_ENABLED; - ret = drm_panel_enable(dsi->panel); if (ret < 0) { dsi->state &= ~DSIM_STATE_ENABLED; @@ -1540,6 +1545,8 @@ static int exynos_dsi_enable(struct exynos_dsi *dsi) return ret; } + dsi->state |= DSIM_STATE_VIDOUT_AVAILABLE; + return 0; } @@ -1548,12 +1555,15 @@ static void exynos_dsi_disable(struct exynos_dsi *dsi) if (!(dsi->state & DSIM_STATE_ENABLED)) return; + dsi->state &= ~DSIM_STATE_VIDOUT_AVAILABLE; + drm_panel_disable(dsi->panel); exynos_dsi_set_display_enable(dsi, false); drm_panel_unprepare(dsi->panel); - exynos_dsi_poweroff(dsi); dsi->state &= ~DSIM_STATE_ENABLED; + + exynos_dsi_poweroff(dsi); } static void exynos_dsi_dpms(struct exynos_drm_display *display, int mode) -- 1.9.1

2 1

[patch] drm/amdgpu: potential NULL dereference on error
by Dan Carpenter 11 Jun '15

11 Jun '15

debugfs_create_file() can return an error pointer if debugfs is disabled or it can return NULL on error. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 36be03c..adba2a1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1980,6 +1980,8 @@ static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev) adev, &amdgpu_debugfs_regs_fops); if (IS_ERR(ent)) return PTR_ERR(ent); + if (!ent) + return -ENOMEM; i_size_write(ent->d_inode, adev->rmmio_size); adev->debugfs_regs = ent;

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[PATCH 0/3] exynos_drm initialization fix
by Andrzej Hajda 11 Jun '15

11 Jun '15

Hi Inki, Those patches fixes issue of exynos_drm initialization with more than one pipeline, which is present in exynos_drm drivers for long time. On most platforms at least two of three following pipelines are present: 1. VIDI. 2. FIMD/DECON -> DSI/DPI -> Panel. 3. MIXER/DECON -> HDMI -> TV. In case we want use two or three pipelines simultaneously and one of KMS drivers defers probing only some drivers will be bound to drm driver and usually only one pipeline will be available. This patchset fixes it. Beside bugfixing the patchset significantly simplifies and clears the code - about 300 lines removed. The patchset is based on exynos-drm-next branch. The patchset was tested on universal_c210 board. Regards Andrzej Andrzej Hajda (3): drm/exynos: consolidate driver/device initialization code drm/exynos: fix broken component binding in case of multiple pipelines drm/exynos: remove SoC checking code drivers/gpu/drm/exynos/exynos7_drm_decon.c | 14 +- drivers/gpu/drm/exynos/exynos_dp_core.c | 13 +- drivers/gpu/drm/exynos/exynos_drm_dpi.c | 20 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 427 +++++++++++------------------ drivers/gpu/drm/exynos/exynos_drm_drv.h | 17 -- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 29 +- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 28 +- drivers/gpu/drm/exynos/exynos_drm_ipp.c | 27 -- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 53 +--- drivers/gpu/drm/exynos/exynos_hdmi.c | 22 +- drivers/gpu/drm/exynos/exynos_mixer.c | 14 +- 11 files changed, 187 insertions(+), 477 deletions(-) -- 1.9.1

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[PATCH 1/9] drm/exynos: add error messages if clks failed to get enabled
by Gustavo Padovan 11 Jun '15

11 Jun '15

From: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> Check error and call DRM_ERROR if clk_prepare_enable() fails. Signed-off-by: Gustavo Padovan <gustavo.padovan(a)collabora.co.uk> --- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 29 ++++++++++++++++++++++++---- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 14 ++++++++++++-- drivers/gpu/drm/exynos/exynos_mixer.c | 31 +++++++++++++++++++++++++----- 3 files changed, 63 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c index d659ba2..ffd7c3b 100644 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c @@ -606,6 +606,7 @@ static void decon_init(struct decon_context *ctx) static void decon_enable(struct exynos_drm_crtc *crtc) { struct decon_context *ctx = crtc->ctx; + int ret; if (!ctx->suspended) return; @@ -614,10 +615,30 @@ static void decon_enable(struct exynos_drm_crtc *crtc) pm_runtime_get_sync(ctx->dev); - clk_prepare_enable(ctx->pclk); - clk_prepare_enable(ctx->aclk); - clk_prepare_enable(ctx->eclk); - clk_prepare_enable(ctx->vclk); + ret = clk_prepare_enable(ctx->pclk); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the pclk [%d]\n", ret); + return; + goto pclk_err; + } + + ret = clk_prepare_enable(ctx->aclk); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the aclk [%d]\n", ret); + return; + } + + ret = clk_prepare_enable(ctx->eclk); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the eclk [%d]\n", ret); + return; + } + + ret = clk_prepare_enable(ctx->vclk); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the vclk [%d]\n", ret); + return; + } decon_init(ctx); diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 9661853..7c8ba61 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -808,6 +808,7 @@ static void fimd_apply(struct fimd_context *ctx) static void fimd_enable(struct exynos_drm_crtc *crtc) { struct fimd_context *ctx = crtc->ctx; + int ret; if (!ctx->suspended) return; @@ -816,8 +817,17 @@ static void fimd_enable(struct exynos_drm_crtc *crtc) pm_runtime_get_sync(ctx->dev); - clk_prepare_enable(ctx->bus_clk); - clk_prepare_enable(ctx->lcd_clk); + ret = clk_prepare_enable(ctx->bus_clk); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the bus clk [%d]\n", ret); + return; + } + + ret = clk_prepare_enable(ctx->lcd_clk); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the lcd clk [%d]\n", ret); + return; + } /* if vblank was enabled status, enable it again. */ if (test_and_clear_bit(0, &ctx->irq_flags)) diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 6bab717..1b77fc7 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -1031,6 +1031,7 @@ static void mixer_enable(struct exynos_drm_crtc *crtc) { struct mixer_context *ctx = crtc->ctx; struct mixer_resources *res = &ctx->mixer_res; + int ret; mutex_lock(&ctx->mixer_mutex); if (ctx->powered) { @@ -1042,12 +1043,32 @@ static void mixer_enable(struct exynos_drm_crtc *crtc) pm_runtime_get_sync(ctx->dev); - clk_prepare_enable(res->mixer); - clk_prepare_enable(res->hdmi); + ret = clk_prepare_enable(res->mixer); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the mixer clk [%d]\n", ret); + return; + } + ret = clk_prepare_enable(res->hdmi); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the hdmi clk [%d]\n", ret); + return; + } if (ctx->vp_enabled) { - clk_prepare_enable(res->vp); - if (ctx->has_sclk) - clk_prepare_enable(res->sclk_mixer); + ret = clk_prepare_enable(res->vp); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the vp clk [%d]\n", + ret); + return; + } + if (ctx->has_sclk) { + ret = clk_prepare_enable(res->sclk_mixer); + if (ret < 0) { + DRM_ERROR("Failed to prepare_enable the " \ + "sclk_mixer clk [%d]\n", + ret); + return; + } + } } mutex_lock(&ctx->mixer_mutex); -- 2.1.0

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atombios_crtc.c - make error messages distinguishable "unable to allocate a PPLL\n"
by James Feeney 11 Jun '15

11 Jun '15

atombios_crtc.c In multi-display configurations, especially with three or more displays, PLL/clock source allocations can fail when there are more crtc's than PLLs. When attempting to debug these PLL allocation failures in the source code, the error message displayed in the log, DRM_ERROR("unable to allocate a PPLL\n");, is not useful because the exact same error message is used for _five_ different error states/code paths. These different error states/paths should be distinguished, simply by including some kind of distinguishing mark with each error message. For instance: DRM_ERROR("unable to allocate a PPLL ONE\n"); DRM_ERROR("unable to allocate a PPLL TWO\n"); DRM_ERROR("unable to allocate a PPLL THREE\n"); DRM_ERROR("unable to allocate a PPLL FOUR\n"); DRM_ERROR("unable to allocate a PPLL FIVE\n"); Whether the reported error is truly valid because of an actual hardware limitation, or invalid because of faulty heuristics in the software, is a separate topic. Thanks

4 8

[patch] drm/amdgpu: remove an unnecessary condition
by Dan Carpenter 11 Jun '15

11 Jun '15

We already checked "if (r)" so there is no need to check again. Signed-off-by: Dan Carpenter <dan.carpenter(a)oracle.com> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 5533434..b7d0425 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -111,12 +111,9 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags) /* Call ACPI methods: require modeset init * but failure is not fatal */ - if (!r) { - acpi_status = amdgpu_acpi_init(adev); - if (acpi_status) - dev_dbg(&dev->pdev->dev, - "Error during ACPI methods call\n"); - } + acpi_status = amdgpu_acpi_init(adev); + if (acpi_status) + dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n"); if (amdgpu_device_is_px(dev)) { pm_runtime_use_autosuspend(dev->dev);

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dri-devel June 2015