dri-devel June 2015

dri-devel@lists.freedesktop.org

188 participants
1140 discussions

Patch for libdrm: Provide DRM_MODE_FB_DIRTY_MAX_CLIPS
by Lampersperger Andreas 09 Jun '15

09 Jun '15

Hello Thomas, please include this patch (also attached as patch-file) to libdrm. Thank you! Andreas ------------------------------------------------------------ mailto:lampersperger.andreas@heidenhain.de tel.: +49 8669 31 1791 ------------------------------------------------------------ DR. JOHANNES HEIDENHAIN GmbH Dr.-Johannes-Heidenhain-Str. 5 83301 Traunreut, Deutschland http://www.heidenhain.de Author: Andreas Lampersperger <Lampersperger.andreas(a)heidenhain.de> libdrm: Provide DRM_MODE_FB_DIRTY_MAX_CLIPS When calling drmModeDirtyFB(..) on linux, it fails when num_clips are more than DRM_MODE_FB_DIRTY_MAX_CLIPS (value: 256). But there is no way to check this for xf86-video-* drivers, because when including drm_mode.h, you get the drm_mode.h from .../include/libdrm/drm_mode.h and not .../include/drm/drm_mode.h. This commit adds the define DRM_MODE_FB_DIRTY_MAX_CLIPS also to libdrm/drm_mode.h, so applications/drivers linking against libdrm can use it to check the proper use of drmModeDirtyFB(..) Index: libdrm-2.4.61/include/drm/drm_mode.h =================================================================== --- libdrm-2.4.61.orig/include/drm/drm_mode.h +++ libdrm-2.4.61/include/drm/drm_mode.h @@ -353,6 +353,8 @@ struct drm_mode_fb_cmd2 { #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 +#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 + /* * Mark a region of a framebuffer as dirty. * ------------------------------------------------------------------------------------------------------ Registergericht: Traunstein / Registry Court: HRB 275 - Sitz / Head Office: Traunreut Aufsichtsratsvorsitzender / Chairman of Supervisory Board: Rainer Burkhard Geschäftsführung / Management Board: Thomas Sesselmann (Vorsitzender / Chairman), Michael Grimm, Hubert Ermer E-Mail Haftungsausschluss / E-Mail Disclaimer: http://www.heidenhain.de/disclaimer

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[Bug 89699] Regression in 10.5.1 causes flickering/artifacting in a particular video game
by bugzilla-daemon＠freedesktop.org 09 Jun '15

09 Jun '15

https://bugs.freedesktop.org/show_bug.cgi?id=89699 --- Comment #11 from Sergio Pais <sp(a)srge.org> --- Hello, The following is the result of bisecting: 0543630d0b0d9d9f6eefbc14fbd3385d4de37ba0 is the first bad commit commit 0543630d0b0d9d9f6eefbc14fbd3385d4de37ba0 Author: Marek Olšák <marek.olsak(a)amd.com> Date: Sun Jan 4 22:01:43 2015 +0100 radeonsi: only set BC_OPTIMIZE_DISABLE when necessary SPI_PS_IN_CONTROL is moved into the SPI mapping state. Reviewed-by: Michel Dänzer <michel.daenzer(a)amd.com> :040000 040000 1cf87184549eeb5432cc02fbb352c10f873ffd9f 8d8f7873bdcaf67167ec744265d008306e53d901 M src http://cgit.freedesktop.org/mesa/mesa/commit/?id=0543630d0b0d9d9f6eefbc14fb… -- You are receiving this mail because: You are the assignee for the bug.

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linux-next: manual merge of the drm tree with the drm-intel-fixes tree
by michael＠ozlabs.org 09 Jun '15

09 Jun '15

Hi Dave, Today's linux-next merge of the drm tree got a conflict in drivers/gpu/drm/i915/intel_ringbuffer.c between commit 4f47c99a9be7 ("drm/i915: Move WaBarrierPerformanceFixDisable:skl to skl code from chv code") from the drm-intel-fixes tree and commit b62adbd1ea1f ("drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only") from the drm tree. I fixed it up (see below) and can carry the fix as necessary (no action is required). cheers diff --cc drivers/gpu/drm/i915/intel_ringbuffer.c index 005b5e04de4d,d934f857394d..000000000000 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@@ -1017,13 -1030,17 +1023,24 @@@ static int skl_init_workarounds(struct WA_SET_BIT_MASKED(HIZ_CHICKEN, BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE); + if (INTEL_REVID(dev) == SKL_REVID_C0 || + INTEL_REVID(dev) == SKL_REVID_D0) + /* WaBarrierPerformanceFixDisable:skl */ + WA_SET_BIT_MASKED(HDC_CHICKEN0, + HDC_FENCE_DEST_SLM_DISABLE | + HDC_BARRIER_PERFORMANCE_DISABLE); + + if (INTEL_REVID(dev) <= SKL_REVID_D0) { + /* + *Use Force Non-Coherent whenever executing a 3D context. This + * is a workaround for a possible hang in the unlikely event + * a TLB invalidation occurs during a PSD flush. + */ + /* WaForceEnableNonCoherent:skl */ + WA_SET_BIT_MASKED(HDC_CHICKEN0, + HDC_FORCE_NON_COHERENT); + } + return skl_tune_iz_hashing(ring); }

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Re: [PATCH v2 05/10] drm: Add a new function for updating color blob
by Matt Roper 09 Jun '15

09 Jun '15

On Thu, Jun 04, 2015 at 07:12:36PM +0530, Kausal Malladi wrote: > From: Kausal Malladi <Kausal.Malladi(a)intel.com> > > This patch adds a new function to update color blob properties > and exports it. > > v2: Addressing Sonika's comment, > 1. Moved this function to a separate patch > 2. Removed one input parameter to the function > > Signed-off-by: Shashank Sharma <shashank.sharma(a)intel.com> > Signed-off-by: Kausal Malladi <Kausal.Malladi(a)intel.com> This function is basically just a pass-through. Can we just un-static drm_property_replace_global_blob() so that it can be called directly instead? Matt > --- > drivers/gpu/drm/drm_crtc.c | 15 +++++++++++++++ > include/drm/drm_crtc.h | 4 ++++ > 2 files changed, 19 insertions(+) > > diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c > index 77f87b2..f6fa147 100644 > --- a/drivers/gpu/drm/drm_crtc.c > +++ b/drivers/gpu/drm/drm_crtc.c > @@ -4691,6 +4691,21 @@ int drm_mode_connector_set_tile_property(struct drm_connector *connector) > } > EXPORT_SYMBOL(drm_mode_connector_set_tile_property); > > +int drm_mode_crtc_update_color_property(struct drm_property_blob **blob, > + size_t length, const void *color_data, > + struct drm_mode_object *obj_holds_id, > + struct drm_property *prop_holds_id) > +{ > + struct drm_device *dev = prop_holds_id->dev; > + int ret; > + > + ret = drm_property_replace_global_blob(dev, > + blob, length, color_data, obj_holds_id, prop_holds_id); > + > + return ret; > +} > +EXPORT_SYMBOL(drm_mode_crtc_update_color_property); > + > /** > * drm_mode_connector_update_edid_property - update the edid property of a connector > * @connector: drm connector > diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h > index bc44f27..31b52cb 100644 > --- a/include/drm/drm_crtc.h > +++ b/include/drm/drm_crtc.h > @@ -1343,6 +1343,10 @@ extern void drm_mode_config_cleanup(struct drm_device *dev); > > extern int drm_mode_connector_set_path_property(struct drm_connector *connector, > const char *path); > +extern int drm_mode_crtc_update_color_property(struct drm_property_blob **blob, > + size_t length, const void *color_data, > + struct drm_mode_object *obj_holds_id, > + struct drm_property *prop_holds_id); > int drm_mode_connector_set_tile_property(struct drm_connector *connector); > extern int drm_mode_connector_update_edid_property(struct drm_connector *connector, > const struct edid *edid); > -- > 2.4.2 > -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795

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Re: [PATCH v2 04/10] drm: Add Gamma correction structure
by Matt Roper 09 Jun '15

09 Jun '15

On Thu, Jun 04, 2015 at 07:12:35PM +0530, Kausal Malladi wrote: > From: Kausal Malladi <Kausal.Malladi(a)intel.com> > > This patch adds a new structure in DRM layer for Gamma color correction. > This structure will be used by all user space agents to configure > appropriate Gamma precision and Gamma level. > > struct drm_intel_gamma { > __u32 gamma_level; > (The gamma_level variable indicates if the Gamma correction is to be > applied on Pipe/plane) I'm not sure I understand the need for this one...you're getting the set_property call against a specific DRM object, so I don't think there should be any confusion at that point about what the values apply to? > __u32 gamma_precision; > (The Gamma precision indicates the Gamma mode to be applied) > > Supported precisions are - > #define I915_GAMMA_PRECISION_UNKNOWN 0 > #define I915_GAMMA_PRECISION_CURRENT 0xFFFFFFFF > #define I915_GAMMA_PRECISION_LEGACY (1 << 0) > #define I915_GAMMA_PRECISION_10BIT (1 << 1) > #define I915_GAMMA_PRECISION_12BIT (1 << 2) > #define I915_GAMMA_PRECISION_14BIT (1 << 3) > #define I915_GAMMA_PRECISION_16BIT (1 << 4) I feel like the precision would work better as a separate enum property rather than being part of your blob; I think it would be cleaner if your blob only held the actual values if possible. > > __u32 num_samples; > (The num_samples indicates the number of Gamma correction > coefficients) > __u32 reserved; > __u16 values[0]; > (An array of size 0, to accommodate the "num_samples" number of > R16G16B16 pixels, dynamically) > }; > > v2: Addressing Daniel Stone's comment, added a variable sized array to > carry Gamma correction values as blob property. > > Signed-off-by: Shashank Sharma <shashank.sharma(a)intel.com> > Signed-off-by: Kausal Malladi <Kausal.Malladi(a)intel.com> > --- > include/drm/drm_crtc.h | 3 +++ > include/uapi/drm/drm.h | 10 ++++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h > index 2a75d7d..bc44f27 100644 > --- a/include/drm/drm_crtc.h > +++ b/include/drm/drm_crtc.h > @@ -483,6 +483,9 @@ struct drm_crtc { > * acquire context. > */ > struct drm_modeset_acquire_ctx *acquire_ctx; > + > + /* Color Management Blob IDs */ > + u32 gamma_blob_id; > }; > > /** > diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h > index 3801584..fc2661c 100644 > --- a/include/uapi/drm/drm.h > +++ b/include/uapi/drm/drm.h > @@ -829,6 +829,16 @@ struct drm_event_vblank { > __u32 reserved; > }; > > +/* Color Management structure for Gamma */ > +struct drm_gamma { > + __u32 flags; The flags aren't described in your commit message...what are they used for? I guess it will become more clear as I read farther through your patch series. Matt > + __u32 gamma_level; > + __u32 gamma_precision; > + __u32 num_samples; > + __u32 reserved; > + __u16 values[0]; > +}; > + > /* typedef area */ > #ifndef __KERNEL__ > typedef struct drm_clip_rect drm_clip_rect_t; > -- > 2.4.2 > -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795

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[PATCHv2 00/45] Convert omapdrm to the atomic updates API
by Tomi Valkeinen 08 Jun '15

08 Jun '15

Hi, This is v2 of the atomic modesetting series for omapdrm. Laurent was not able to finish the work before having to leave abroad, so I continued the work on the series, fixing up the remaining issues and doing some additional cleanups. It is a bit late in the kernel development cycle, but I'm hoping we could get this into v4.2 for two reasons: * After these patches some long remaining issues in omapdrm are gone. We finally get tear-free page flipping. * After these patches the driver is so, SO much cleaner, that fixing any new bugs found will be considerably easier. There is some going back-and-forth in these patches, but that's expected with such a big change. The kernel should compile after each patch, but omapdrm will not function perfectly after each patch. The issues shouldn't be huge, though, but things like fps dropping into half do happen in the middle of the series. The series is based on the latest drm/next branch and depends on the pending "drm: omapdrm: Store the rotation property in dev->mode_config" patch by Daniel Vetter. The omapdrm loses support for its custom fences in the process. This isn't deemed to be an issue, as the custom fences API is used by the SGX driver only, which requires out-of-tree patches anyway. Fences support will be reimplemented at a later point on top of the atomic updates conversion using the mainline fence API. I have been testing this with Pandaboard, using single and dual outputs, without any issues. These patches can also be found from: git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git omapdrm-atomic Tomi Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Rob Clark <robdclark(a)gmail.com> Cc: Thierry Reding <treding(a)nvidia.com> Cc: Benjamin Gaignard <benjamin.gaignard(a)linaro.org> Laurent Pinchart (37): drm: omapdrm: Store the rotation property in dev->mode_config drm: omapdrm: Apply settings synchronously drm: omapdrm: Rename omap_crtc_page_flip_locked to omap_crtc_page_flip drm: omapdrm: Rename omap_crtc page flip-related fields drm: omapdrm: Simplify IRQ registration drm: omapdrm: Cancel pending page flips when closing device drm: omapdrm: Rework page flip handling drm: omapdrm: Turn vblank on/off when enabling/disabling CRTC drm: omapdrm: Fix page flip race with CRTC disable drm: omapdrm: Clean up #include's drm: omapdrm: Rename CRTC DSS operations with an omap_crtc_dss_ prefix drm: omapdrm: Rework CRTC enable/disable for atomic updates drm: omapdrm: Implement encoder .disable() and .enable() operations drm: omapdrm: Wire up atomic state object scaffolding drm: omapdrm: Implement planes atomic operations drm: omapdrm: Handle primary plane config through atomic plane ops drm: omapdrm: Switch plane update to atomic helpers drm: omapdrm: Switch mode config to atomic helpers drm: omapdrm: Switch connector DPMS to atomic helpers drm: omapdrm: Replace encoder mode_fixup with atomic_check drm: omapdrm: Implement asynchronous commit support drm: omapdrm: Switch page flip to atomic helpers drm: omapdrm: Drop manual framebuffer pin handling drm: omapdrm: Switch crtc and plane set_property to atomic helpers drm: omapdrm: Move plane info and win out of the plane structure drm: omapdrm: Move crtc info out of the crtc structure drm: omapdrm: Remove omap_crtc enabled field drm: omapdrm: Remove omap_plane enabled field drm: omapdrm: Make the omap_crtc_flush function static drm: omapdrm: Don't get/put dispc in omap_crtc_flush() drm: omapdrm: omap_crtc_flush() isn't called with modeset locked drm: omapdrm: Support unlinking page flip events prematurely drm: omapdrm: Remove nested PM get/sync when configuring encoders drm: omapdrm: Simplify DSS power management drm: omapdrm: Move encoder setup to encoder operations drm: omapdrm: Don't flush CRTC when enabling or disabling it drm: omapdrm: Don't setup planes manually from CRTC .enable()/.disable() Tomi Valkeinen (8): drm: omapdrm: omap_plane_setup() cannot fail, use WARN drm: omapdrm: inline omap_plane_setup into update/disable drm: omapdrm: if omap_plane_atomic_update fails, disable plane drm: omapdrm: remove omap_crtc_wait_page_flip drm: omapdrm: add omap_atomic_wait_for_gos() drm: omapdrm: don't wait in crtc_atomic_flush drm: omapdrm: merge omap_crtc_flush and omap_crtc_atomic_flush drm: omapdrm: add lock for fb pinning drivers/gpu/drm/omapdrm/omap_connector.c | 12 +- drivers/gpu/drm/omapdrm/omap_crtc.c | 539 +++++++++--------------------- drivers/gpu/drm/omapdrm/omap_debugfs.c | 6 +- drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 19 +- drivers/gpu/drm/omapdrm/omap_drv.c | 233 ++++++++++++- drivers/gpu/drm/omapdrm/omap_drv.h | 59 +--- drivers/gpu/drm/omapdrm/omap_encoder.c | 99 ++---- drivers/gpu/drm/omapdrm/omap_fb.c | 27 +- drivers/gpu/drm/omapdrm/omap_fbdev.c | 6 +- drivers/gpu/drm/omapdrm/omap_gem.c | 4 +- drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c | 4 +- drivers/gpu/drm/omapdrm/omap_irq.c | 106 ++---- drivers/gpu/drm/omapdrm/omap_plane.c | 424 +++++++++-------------- 13 files changed, 664 insertions(+), 874 deletions(-) -- 2.1.4

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[GIT PULL] drm: sti: fix hdmi timing
by Benjamin Gaignard 08 Jun '15

08 Jun '15

Hello Dave, I have prepare this serie of minor patches for drm-next. Mainly it is fixing timing on HDMI to be compliant with CEA-861E spec. It is also the chance for me to introduce you Vincent Abriou who will help me to maintain sti drm driver. Regards, Benjamin The following changes since commit ae45577324d1f749c907840247d443696ac3bc7a: virtgpu: include linux/types.h to avoid warning. (2015-06-05 12:31:12 +1000) are available in the git repository at: http://git.linaro.org/people/benjamin.gaignard/kernel.git 2015-06-08-st-drm-next for you to fetch changes up to c58d6d1b6652b0a8db4aef7e93fb21ee869b5387: drm/sti: vtg fix CEA-861E video format timing error (2015-06-08 15:28:28 +0200) ---------------------------------------------------------------- Vincent Abriou (4): drm/sti: missing first pixel column on HDMI display drm/sti: VTG interrupt names are badly displayed drm/sti: hdmi fix CEA-861E video format timing error drm/sti: vtg fix CEA-861E video format timing error Wei Yongjun (1): drm/sti: correctly test devm_ioremap() return drivers/gpu/drm/sti/sti_dvo.c | 4 +-- drivers/gpu/drm/sti/sti_hdmi.c | 4 +-- drivers/gpu/drm/sti/sti_vtg.c | 56 +++++++++++++++++++++++++++++------------- 3 files changed, 43 insertions(+), 21 deletions(-)

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[GIT PULL] tilcdc DRM refactoring (again)
by Jyri Sarha 08 Jun '15

08 Jun '15

David, Please pull the contents of "Use DRM component API in tilcdc to connect to tda998x" patch series[1] from: https://github.com/jsarha/linux.git linux-4.1.0-rc6-tilcdc-refactor These are the same commits I sent a pull request for already sometime earlier. They have just been rebased on top of 4.1-rc6 and tested. This time there are no DTS patches slipped into the series and all apply to drm/tilcdc. The commits are all acked-by Tomi Valkeinen. The commits: c83ce67 drm/tilcdc: Force building of DRM_TILCDC_SLAVE_COMPAT f717447 drm/tilcdc: Add DRM_TILCDC_SLAVE_COMPAT for ti,tilcdc,slave binding support ff61c6a drm/tilcdc: use pm_runtime_irq_safe() 55d5d04 drm/tilcdc: Add support for external tda998x encoder fa6710f drm/tilcdc: Remove tilcdc slave support for tda998x driver bfa2b83 drm/tilcdc: Fix module unloading The relevant patch review and patches can be found here: http://lists.freedesktop.org/archives/dri-devel/2015-May/083619.html Best regards, Jyri

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[PATCH v4 1/3] dt-bindings: describe dw_hdmi supplies
by Heiko Stübner 08 Jun '15

08 Jun '15

The Designware HDMI block has two supplies for 1.0 and 1.8V. Not all IP implementations expose or want to use these, so they remain optional. Signed-off-by: Heiko Stuebner <heiko(a)sntech.de> Acked-by: Philipp Zabel <p.zabel(a)pengutronix.de> --- changes since v3: - split generic dt-bindings and rockchip implementation - add Ack from Philipp Zabel changes since v2: - rename supplies to the names found in the hdmi IP databook Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt index a905c14..ba42d89 100644 --- a/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt +++ b/Documentation/devicetree/bindings/drm/bridge/dw_hdmi.txt @@ -22,6 +22,10 @@ Optional properties - ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing - clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec" +Optional supplies: +- vp-supply: 1.0V power supply +- vph-supply: 1.8V power supply + Example: hdmi: hdmi@0120000 { compatible = "fsl,imx6q-hdmi"; -- 2.1.4

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[PATCH] drm/panel: add lg4573 driver
by Heiko Schocher 08 Jun '15

08 Jun '15

The patch adds LG4573 parallel RGB panel driver with SPI control interface. The driver uses drm_panel framework. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- .../devicetree/bindings/panel/lg,lg4573.txt | 42 +++ drivers/gpu/drm/panel/Kconfig | 8 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-lg4573.c | 367 +++++++++++++++++++++ 4 files changed, 418 insertions(+) create mode 100644 Documentation/devicetree/bindings/panel/lg,lg4573.txt create mode 100644 drivers/gpu/drm/panel/panel-lg4573.c diff --git a/Documentation/devicetree/bindings/panel/lg,lg4573.txt b/Documentation/devicetree/bindings/panel/lg,lg4573.txt new file mode 100644 index 0000000..55f495d --- /dev/null +++ b/Documentation/devicetree/bindings/panel/lg,lg4573.txt @@ -0,0 +1,42 @@ +LG LG4573 TFT liquid crystal display with SPI control bus + +Required properties: + - compatible: "lg4573" + - reg: address of the panel on SPI bus + - display-timings: timings for the connected panel according to [1] + +The panel must obey rules for SPI slave device specified in document [2]. + +Optional properties: + - power-on-delay: delay after turning regulators on [ms] + +[1]: Documentation/devicetree/bindings/video/display-timing.txt +[2]: Documentation/devicetree/bindings/spi/spi-bus.txt + +Example: + + lcd_panel: display@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lg,lg4573"; + spi-max-frequency = <10000000>; + reset-gpios = <&gpio2 11 0>; + reg = <0>; + power-on-delay = <10>; + display-timings { + 480x800p57 { + native-mode; + clock-frequency = <27000027>; + hactive = <480>; + vactive = <800>; + hfront-porch = <10>; + hback-porch = <59>; + hsync-len = <10>; + vback-porch = <15>; + vfront-porch = <15>; + vsync-len = <15>; + hsync-active = <1>; + vsync-active = <1>; + }; + }; + }; diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 6d64c7b..29c3407 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -23,6 +23,14 @@ config DRM_PANEL_LD9040 depends on OF && SPI select VIDEOMODE_HELPERS +config DRM_PANEL_LG4573 + tristate "LG4573 RGB/SPI panel" + depends on OF && SPI + select VIDEOMODE_HELPERS + help + Say Y here if you want to enable support for LG4573 RGB panel. + To compile this driver as a module, choose M here. + config DRM_PANEL_S6E8AA0 tristate "S6E8AA0 DSI video mode panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 4b2a043..715b95d 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -1,4 +1,5 @@ obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o obj-$(CONFIG_DRM_PANEL_LD9040) += panel-ld9040.o +obj-$(CONFIG_DRM_PANEL_LG4573) += panel-lg4573.o obj-$(CONFIG_DRM_PANEL_S6E8AA0) += panel-s6e8aa0.o obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o diff --git a/drivers/gpu/drm/panel/panel-lg4573.c b/drivers/gpu/drm/panel/panel-lg4573.c new file mode 100644 index 0000000..9d5e5a5 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-lg4573.c @@ -0,0 +1,367 @@ +/* + * + * Copyright (C) 2015 Heiko Schocher <hs(a)denx.de> + * + * from: + * drivers/gpu/drm/panel/panel-ld9040.c + * ld9040 AMOLED LCD drm_panel driver. + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd + * Derived from drivers/video/backlight/ld9040.c + * + * Andrzej Hajda <a.hajda(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <drm/drmP.h> +#include <drm/drm_panel.h> + +#include <linux/gpio/consumer.h> +#include <linux/regulator/consumer.h> +#include <linux/spi/spi.h> + +#include <video/mipi_display.h> +#include <video/of_videomode.h> +#include <video/videomode.h> + +struct lg4573 { + struct device *dev; + struct drm_panel panel; + u32 power_on_delay; + struct videomode vm; +}; + +static inline struct lg4573 *panel_to_lg4573(struct drm_panel *panel) +{ + return container_of(panel, struct lg4573, panel); +} + +static int lg4573_spi_write_u16(struct lg4573 *ctx, u16 data) +{ + struct spi_device *spi = to_spi_device(ctx->dev); + struct spi_transfer xfer = { + .len = 2, + }; + struct spi_message msg; + u16 temp = htons(data); + + dev_dbg(ctx->dev, "writing data: %x\n", data); + xfer.tx_buf = &temp; + spi_message_init(&msg); + spi_message_add_tail(&xfer, &msg); + + return spi_sync(spi, &msg); +} + +static void lg4573_spi_write_u16_array(struct lg4573 *ctx, u16 *buff, int size) +{ + int idx; + + for (idx = 0; idx < size; idx++) + lg4573_spi_write_u16(ctx, buff[idx]); +} + +static void lg4573_display_on(struct lg4573 *ctx) +{ + static u16 sleep_out = 0x7011; + static u16 display_on = 0x7029; + + lg4573_spi_write_u16(ctx, sleep_out); + msleep(ctx->power_on_delay); + lg4573_spi_write_u16(ctx, display_on); +} + +static int lg4573_display_off(struct lg4573 *ctx) +{ + static u16 display_off = 0x7028; + static u16 sleep_in = 0x7010; + + lg4573_spi_write_u16(ctx, display_off); + msleep(ctx->power_on_delay); + lg4573_spi_write_u16(ctx, sleep_in); + return 0; +} + +static void lg4573_display_mode_settings(struct lg4573 *ctx) +{ + static u16 display_mode_settings[] = { + 0x703A, + 0x7270, + 0x70B1, + 0x7208, + 0x723B, + 0x720F, + 0x70B2, + 0x7200, + 0x72C8, + 0x70B3, + 0x7200, + 0x70B4, + 0x7200, + 0x70B5, + 0x7242, + 0x7210, + 0x7210, + 0x7200, + 0x7220, + 0x70B6, + 0x720B, + 0x720F, + 0x723C, + 0x7213, + 0x7213, + 0x72E8, + 0x70B7, + 0x7246, + 0x7206, + 0x720C, + 0x7200, + 0x7200, + }; + + dev_dbg(ctx->dev, "transfer display mode settings\n"); + lg4573_spi_write_u16_array(ctx, display_mode_settings, + ARRAY_SIZE(display_mode_settings)); +} + +static void lg4573_power_settings(struct lg4573 *ctx) +{ + static u16 power_settings[] = { + 0x70C0, + 0x7201, + 0x7211, + 0x70C3, + 0x7207, + 0x7203, + 0x7204, + 0x7204, + 0x7204, + 0x70C4, + 0x7212, + 0x7224, + 0x7218, + 0x7218, + 0x7202, + 0x7249, + 0x70C5, + 0x726F, + 0x70C6, + 0x7241, + 0x7263, + }; + + dev_dbg(ctx->dev, "transfer power settings\n"); + lg4573_spi_write_u16_array(ctx, power_settings, + ARRAY_SIZE(power_settings)); +} + +static void lg4573_gamma_settings(struct lg4573 *ctx) +{ + static u16 gamma_settings[] = { + 0x70D0, + 0x7203, + 0x7207, + 0x7273, + 0x7235, + 0x7200, + 0x7201, + 0x7220, + 0x7200, + 0x7203, + 0x70D1, + 0x7203, + 0x7207, + 0x7273, + 0x7235, + 0x7200, + 0x7201, + 0x7220, + 0x7200, + 0x7203, + 0x70D2, + 0x7203, + 0x7207, + 0x7273, + 0x7235, + 0x7200, + 0x7201, + 0x7220, + 0x7200, + 0x7203, + 0x70D3, + 0x7203, + 0x7207, + 0x7273, + 0x7235, + 0x7200, + 0x7201, + 0x7220, + 0x7200, + 0x7203, + 0x70D4, + 0x7203, + 0x7207, + 0x7273, + 0x7235, + 0x7200, + 0x7201, + 0x7220, + 0x7200, + 0x7203, + 0x70D5, + 0x7203, + 0x7207, + 0x7273, + 0x7235, + 0x7200, + 0x7201, + 0x7220, + 0x7200, + 0x7203, + }; + + dev_dbg(ctx->dev, "transfer gamma settings\n"); + lg4573_spi_write_u16_array(ctx, gamma_settings, + ARRAY_SIZE(gamma_settings)); +} + +static void lg4573_init(struct lg4573 *ctx) +{ + dev_dbg(ctx->dev, "initializing LCD\n"); + + lg4573_display_mode_settings(ctx); + lg4573_power_settings(ctx); + lg4573_gamma_settings(ctx); +} + +static int lg4573_power_on(struct lg4573 *ctx) +{ + msleep(ctx->power_on_delay); + lg4573_display_on(ctx); + return 0; +} + +static int lg4573_disable(struct drm_panel *panel) +{ + struct lg4573 *ctx = panel_to_lg4573(panel); + + return lg4573_display_off(ctx); +} + +static int lg4573_enable(struct drm_panel *panel) +{ + struct lg4573 *ctx = panel_to_lg4573(panel); + int ret; + + lg4573_init(ctx); + + ret = lg4573_power_on(ctx); + + return ret; +} + +static int lg4573_get_modes(struct drm_panel *panel) +{ + struct drm_connector *connector = panel->connector; + struct lg4573 *ctx = panel_to_lg4573(panel); + struct drm_display_mode *mode; + + mode = drm_mode_create(connector->dev); + if (!mode) { + DRM_ERROR("failed to create a new display mode\n"); + return 0; + } + + drm_display_mode_from_videomode(&ctx->vm, mode); + + mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; + drm_mode_probed_add(connector, mode); + + return 1; +} + +static const struct drm_panel_funcs lg4573_drm_funcs = { + .disable = lg4573_disable, + .enable = lg4573_enable, + .get_modes = lg4573_get_modes, +}; + +static int lg4573_parse_dt(struct lg4573 *ctx) +{ + struct device *dev = ctx->dev; + struct device_node *np = dev->of_node; + int ret; + + ret = of_get_videomode(np, &ctx->vm, 0); + if (ret < 0) + return ret; + + of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay); + + return 0; +} + +static int lg4573_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct lg4573 *ctx; + int ret; + + ctx = devm_kzalloc(dev, sizeof(struct lg4573), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + spi_set_drvdata(spi, ctx); + ctx->dev = dev; + + ret = lg4573_parse_dt(ctx); + if (ret < 0) + return ret; + + spi->bits_per_word = 8; + ret = spi_setup(spi); + if (ret < 0) { + dev_err(dev, "spi setup failed.\n"); + return ret; + } + + drm_panel_init(&ctx->panel); + ctx->panel.dev = dev; + ctx->panel.funcs = &lg4573_drm_funcs; + + return drm_panel_add(&ctx->panel); +} + +static int lg4573_remove(struct spi_device *spi) +{ + struct lg4573 *ctx = spi_get_drvdata(spi); + + lg4573_display_off(ctx); + drm_panel_remove(&ctx->panel); + + return 0; +} + +static const struct of_device_id lg4573_of_match[] = { + { .compatible = "lg,lg4573" }, + { } +}; +MODULE_DEVICE_TABLE(of, lg4573_of_match); + +static struct spi_driver lg4573_driver = { + .probe = lg4573_probe, + .remove = lg4573_remove, + .driver = { + .name = "lg4573", + .owner = THIS_MODULE, + .of_match_table = lg4573_of_match, + }, +}; +module_spi_driver(lg4573_driver); + +MODULE_AUTHOR("Heiko Schocher <hs(a)denx.de>"); +MODULE_DESCRIPTION("lg4573 LCD Driver"); +MODULE_LICENSE("GPL v2"); -- 2.1.0

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dri-devel June 2015