dri-devel January 2016

dri-devel@lists.freedesktop.org

194 participants
1200 discussions

[Bug 93761] A conditional discard in a fragment shader causes no depth writing at all
by bugzilla-daemon＠freedesktop.org 25 Feb '16

25 Feb '16

https://bugs.freedesktop.org/show_bug.cgi?id=93761 Bug ID: 93761 Summary: A conditional discard in a fragment shader causes no depth writing at all Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org Reporter: jlegg(a)feralinteractive.com QA Contact: dri-devel(a)lists.freedesktop.org Created attachment 121116 --> https://bugs.freedesktop.org/attachment.cgi?id=121116&action=edit Test case When rendering to an FBO with only a GL_DEPTH_COMPONENT16 depth buffer, with depth testing enabled, if a fragment shader has a conditional discard, nothing is written to the depth buffer for pixels which should not be discarded. Platform: Fedora 22 x86_64 Mesa version: tested both git eaf7ec9 (from griever-mesa-git copr) and 10.6.9 (the default mesa package with Fedora 22). The bug occurred on both. GL Renderer string: Gallium 0.4 on AMD PITCAIRN (DRM 2.43.0, LLVM 3.7.1) GPU: AMD R9 270 with 2GB VRAM Workaround: If you write to gl_FragDepth, only the intentionally discarded pixels are discarded. I've attached a test case demonstrating the problem. It will fail an assertion on the machine with this bug. It should draw only on the even columns of pixels in the depth buffer, but nothing is drawn. -- You are receiving this mail because: You are the assignee for the bug.

1 4

[Bug 80678] New: xrandr scaling / transform does not work with radeon
by bugzilla-daemon＠freedesktop.org 25 Feb '16

25 Feb '16

https://bugs.freedesktop.org/show_bug.cgi?id=80678 Priority: medium Bug ID: 80678 Assignee: dri-devel(a)lists.freedesktop.org Summary: xrandr scaling / transform does not work with radeon Severity: normal Classification: Unclassified OS: Linux (All) Reporter: h.judt(a)gmx.at Hardware: x86-64 (AMD64) Status: NEW Version: XOrg CVS Component: DRM/Radeon Product: DRI Scaling doesn't work with radeon. Screen rotation does work, though. On a laptop with intel driver, the following works fine, except the mouse pointer is confined to the mode area, but I believe that is a known xorg-server bug to which a patch is available in bug #39949: xrandr --fb 1920x1080 --output eDP1 --mode 1600x900 --scale-from 1920x1080 The same command, adapted to the radeon output device doesn't work. Same software configuration (xorg-1.15.99.903, libdrm-git, mesa-git, xf86-video-ati-git, various kernel versions (at the moment 3.15.2)). lspci -vvv: 01:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Cayman PRO [Radeon HD 6950] (prog-if 00 [VGA controller]) Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] Device 0b00 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 41 Region 0: Memory at e0000000 (64-bit, prefetchable) [size=256M] Region 2: Memory at f7e20000 (64-bit, non-prefetchable) [size=128K] Region 4: I/O ports at e000 [size=256] Expansion ROM at f7e00000 [disabled] [size=128K] Capabilities: [50] Power Management version 3 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [58] Express (v2) Legacy Endpoint, MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend- LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis- Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- Compliance De-emphasis: -6dB LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1- EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0100c Data: 4191 Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> Capabilities: [150 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- Kernel driver in use: radeon Is scaling not implemented in radeon? -- You are receiving this mail because: You are the assignee for the bug.

1 10

[PATCH v7 0/5] Add mipi dsi support for rk3288
by Chris Zhong 24 Feb '16

24 Feb '16

The rk3288 MIPI DSI is a Synopsys DesignWare MIPI DSI host controller IP. This series adds support for a Synopsys DesignWare MIPI DSI host controller DRM driver. The MIPI DSI feature is tested on rk3288 evb board, backport them to chrome os kernel chrome_v3.14, and it can display normally. This patchset is base on the patchset from Ying.liu(a)freescale.com. <http://www.spinics.net/lists/dri-devel/msg77181.html> According to the suggestion from Thierry, I have get rid of the bridge, and register the encoder & connecter in drm/rockchip/dw-mipi-dsi.c. After backport below patches from linux-next, I can merge this serial into Dave's drm-next branch. 94d5d6a0fbf3 clk: rockchip: add an id for rk3288 crypto clk c6d49fbcfcc4 clk: rockchip: add id for mipidsi sclk on rk3288 a2f4c560f18e clk: rockchip: add mipidsi clock on rk3288 69c923743640 ARM: dts: rockchip: correct the name of REG8 for rk3288-evb-act8846 662513a14c9d ARM: dts: rockchip: add 2 regulators for rk3288-evb-act8846 b04061e6599b ARM: dts: rockchip: move the public part to rk3288-evb common Changes in v7: - modify the config to tristate for modules build (Mark Yao) - Pass NULL 'name' to drm_encoder_init() to fix compile err (Mark Yao) - Move the lcd_en control to act8846 dts Changes in v6: - update the document, since the bridge device has been deleted. - move the mipi_en gate to ockchip_drm_crtc_mode_config - Remove the atomic feature check (Mark Yao) - Add atomic API support (Heiko Stübne) - Do not use bridge driver (Thierry Reding) - Optimization the phy init sequence Changes in v5: - modify the clk name to SCLK_MIPIDSI_24M - add a blank line befor lcd_en Changes in v4: - use clk_round_rate to check the clock rate in vop_crtc_mode_fixup Changes in v3: - move dw_mipi_dsi_rockchip.txt to bindings/display/rockchip/ Chris Zhong (5): drm/rockchip: return a true clock rate to adjusted_mode Documentation: dt-bindings: Add bindings for rk3288 DW MIPI DSI driver drm: rockchip: Support Synopsys DW MIPI DSI ARM: dts: rockchip: add rk3288 mipi_dsi nodes ARM: dts: rockchip: add support mipi panel tv080wum-nl0 .../display/rockchip/dw_mipi_dsi_rockchip.txt | 60 + arch/arm/boot/dts/rk3288-evb-act8846.dts | 2 + arch/arm/boot/dts/rk3288-evb.dtsi | 12 +- arch/arm/boot/dts/rk3288.dtsi | 39 + drivers/gpu/drm/rockchip/Kconfig | 10 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 1196 ++++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 8 + 8 files changed, 1327 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt create mode 100644 drivers/gpu/drm/rockchip/dw-mipi-dsi.c -- 2.6.3

5 10

[PATCH 1/2] drm/panel: simple: Add support for Sharp LQ101K1LY04
by Joshua Clayton 23 Feb '16

23 Feb '16

Add simple-panel support for the Sharp LQ101K1LY04i, which is a 10 inch WXGA (1280x800) lvds panel. Signed-off-by: Joshua Clayton <stillcompiling(a)gmail.com> --- drivers/gpu/drm/panel/panel-simple.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f97b73e..e01eacb 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1073,6 +1073,30 @@ static const struct panel_desc samsung_ltn140at29_301 = { }, }; +static const struct display_timing sharp_lq101k1ly04_timing = { + .pixelclock = { 60000000, 65000000, 80000000 }, + .hactive = { 1280, 1280, 1280 }, + .hfront_porch = { 20, 20, 20 }, + .hback_porch = { 20, 20, 20 }, + .hsync_len = { 10, 10, 10 }, + .vactive = { 800, 800, 800 }, + .vfront_porch = { 4, 4, 4 }, + .vback_porch = { 4, 4, 4 }, + .vsync_len = { 4, 4, 4 }, + .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, +}; + +static const struct panel_desc sharp_lq101k1ly04 = { + .timings = &sharp_lq101k1ly04_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 217, + .height = 136, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, +}; + static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = { .clock = 33300, .hdisplay = 800, @@ -1188,6 +1212,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "samsung,ltn140at29-301", .data = &samsung_ltn140at29_301, }, { + .compatible = "sharp,lq101k1ly04", + .data = &sharp_lq101k1ly04, + }, { .compatible = "shelly,sca07010-bfn-lnn", .data = &shelly_sca07010_bfn_lnn, }, { -- 2.5.0

1 3

[PATCH v2 0/2] Improve drm_of_component_probe() and move rockchip to use it
by Liviu Dudau 22 Feb '16

22 Feb '16

Hello, This is v2 of the patchset trying to make drm_of_component_probe() cope with finding both local crtc ports and remote encoder ones. Heiko Stübner was nice enough to test an earlier version that was patched following Russell's suggestions on rk3288, but I haven't seen any reports from iMX or Armada users. Changelog: v2: Updated the drm_of_component_probe() comment to explain why the reference count is not dropped. Fixed the compare_port() function for rockchip as described by Russell. v1: Original submission. http://lists.freedesktop.org/archives/dri-devel/2015-November/094546.html Liviu Dudau (2): drm: Improve drm_of_component_probe() to correctly handle ports and remote ports. drm/rockchip: Convert the probe function to the generic drm_of_component_probe() drivers/gpu/drm/armada/armada_drv.c | 3 +- drivers/gpu/drm/drm_of.c | 19 ++++-- drivers/gpu/drm/imx/imx-drm-core.c | 3 +- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 98 ++++++----------------------- include/drm/drm_of.h | 6 +- 5 files changed, 40 insertions(+), 89 deletions(-) -- 2.6.2

6 19

[Bug 76321] New: Incorrect hwmon temperature when radeon card is turned off
by bugzilla-daemon＠bugzilla.kernel.org 20 Feb '16

20 Feb '16

https://bugzilla.kernel.org/show_bug.cgi?id=76321 Bug ID: 76321 Summary: Incorrect hwmon temperature when radeon card is turned off Product: Drivers Version: 2.5 Kernel Version: 3.15-rc3 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: high Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: pali.rohar(a)gmail.com Regression: No When radeon card is turned off (automatically via runpm) sensors program show totally incorrect temperature: radeon-pci-0100 Adapter: PCI adapter temp1: +511.0°C (crit = +120.0°C, hyst = +90.0°C) When some opengl program is running with DRI_PRIME=1 then sensors reports: radeon-pci-0100 Adapter: PCI adapter temp1: +46.0°C (crit = +120.0°C, hyst = +90.0°C) So kernel radeon driver should not report temperature (e.g. returns -EINVAL in hwmon) when radeon card is turned off (via vgaswitcheroo or runpm). -- You are receiving this mail because: You are watching the assignee of the bug.

1 14

[PATCH v2 00/26] drm: Add Allwinner A10 display engine support
by Maxime Ripard 20 Feb '16

20 Feb '16

Hi everyone, The Allwinner SoCs (except for the very latest ones) all share the same set of controllers, loosely coupled together to form the display pipeline. Depending on the SoC, the number of instances of the controller will change (2 instances of each in the A10, only one in the A13, for example), and the output availables will change too (HDMI, composite, VGA on the A20, none of them on the A13). On most featured SoCs, it looks like that: +--------------------------------------------+ | RAM | +--------------------------------------------+ | | | | v | | v +----------------+ | | +----------------+ | Frontend | | | | Frontend | +----------------+ | | +----------------+ | | | | v | | v +----------------+ | | +----------------+ | Backend |<+ +>| Backend | +----------------+ +----------------+ | | v v +----------------+ +----------------+---> LVDS | TCON | | TCON |---> RGB +----------------+ +----------------+ | +---+ +---+ | | | | | v v v v +------------+ +------------+ +------------+---> VGA | TV Encoder | | HDMI | | TV Encoder |---> Composite +------------+ +------------+ +------------+ The current code only assumes that there is a single instance of all the controllers. It also supports only the RGB and Composite interfaces. Let me know what you think, Maxime Changes from v1: - Rebased on top of 4.4 - Merged the clock drivers for the display and TCON channel 0 clocks - Replaced the container_of calls in the display reset clocks to an inline function - Checked the return code of of_clk_parent_fill in the clocks drivers - Checked the return code of of_clk_add_provider in the tcon-ch1 and PLL3 clocks - Added missing clocks headers - Created a composite clock unregister function - Moved the binding documentation to Documentation/devicetree/bindings/display - Added the clocks binding documentation - Added the Olimex vendor to the list of DT vendors - Moved to the OF graph representation and the component framework - Moved the reset cells count check into the reset framework to avoid duplicating the code in every xlate implementation. - Made the reset_ops const - Reworked the DRM cmdline mode parsing code to allow named mode - Fixed the TV mode lookup when the mode name is not present (for example because it was given by the userspace) - Made the driver outputs optional (to avoid crashing when a board doesn't have either a panel or a composite output enabled) - Added multiple plane support with transparency - Moved the backend registers writes commit in the CRTC atomic_flush callback - Removed the load / unload functions - Removed the enabled booleans in my private structure and removed the implicit call to disable_unused_functions in the DRM core to push it in the drivers. - Fixed a few bitmasks on some bitfields definition - Fixed the RGB connector mode validation that was not testing the right values Matthias Brugger (1): clk: Add regmap support Maxime Ripard (25): reset: Move DT cell size check to the core reset: Make reset_control_ops const clk: composite: Add unregister function clk: sunxi: Add display and TCON0 clocks driver clk: sunxi: Add PLL3 clock clk: sunxi: Add TCON channel1 clock clk: sun5i: add DRAM gates ARM: sun5i: dt: Add pll3 and pll7 clocks ARM: sun5i: a13: Add display and TCON clocks ARM: sun5i: Add DRAM gates ARM: sun5i: Add TV encoder gate to the DTSI drm/fb_cma_helper: Remove implicit call to disable_unused_functions drm/modes: Rewrite the command line parser drm/modes: Support modes names on the command line drm: Add Allwinner A10 Display Engine support drm: sun4i: Add DT bindings documentation drm: sun4i: Add RGB output drm: sun4i: Add composite output drm: sun4i: tv: Add PAL output standard drm: sun4i: tv: Add NTSC output standard ARM: sun5i: r8: Add display blocks to the DTSI ARM: sun5i: chip: Enable the TV Encoder devicetree: Add olimex vendor prefix drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS DO NOT MERGE: ARM: sun5i: chip: Enable the LCD panel Documentation/devicetree/bindings/clock/sunxi.txt | 5 + .../display/panel/olimex,lcd-olinuxino-43-ts.txt | 7 + .../bindings/display/sunxi/sun4i-drm.txt | 228 +++++++ .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +- arch/arm/boot/dts/sun5i-a13.dtsi | 46 +- arch/arm/boot/dts/sun5i-r8-chip.dts | 17 + arch/arm/boot/dts/sun5i-r8.dtsi | 139 ++++- arch/arm/boot/dts/sun5i.dtsi | 62 ++ drivers/clk/Makefile | 1 + drivers/clk/clk-composite.c | 15 + drivers/clk/clk-divider.c | 68 ++- drivers/clk/clk-gate.c | 54 +- drivers/clk/clk-io.c | 48 ++ drivers/clk/clk-io.h | 22 + drivers/clk/clk-mux.c | 94 ++- drivers/clk/sunxi/Makefile | 3 + drivers/clk/sunxi/clk-simple-gates.c | 2 + drivers/clk/sunxi/clk-sun4i-display.c | 241 ++++++++ drivers/clk/sunxi/clk-sun4i-pll3.c | 90 +++ drivers/clk/sunxi/clk-sun4i-tcon-ch1.c | 154 +++++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 3 +- drivers/gpu/drm/drm_crtc.c | 3 +- drivers/gpu/drm/drm_fb_cma_helper.c | 3 - drivers/gpu/drm/drm_fb_helper.c | 4 + drivers/gpu/drm/drm_modes.c | 327 ++++++---- drivers/gpu/drm/imx/imx-drm-core.c | 1 + drivers/gpu/drm/panel/panel-simple.c | 26 + drivers/gpu/drm/sti/sti_drv.c | 1 + drivers/gpu/drm/sun4i/Kconfig | 14 + drivers/gpu/drm/sun4i/Makefile | 12 + drivers/gpu/drm/sun4i/sun4i_backend.c | 321 ++++++++++ drivers/gpu/drm/sun4i/sun4i_backend.h | 160 +++++ drivers/gpu/drm/sun4i/sun4i_crtc.c | 120 ++++ drivers/gpu/drm/sun4i/sun4i_crtc.h | 30 + drivers/gpu/drm/sun4i/sun4i_drv.c | 325 ++++++++++ drivers/gpu/drm/sun4i/sun4i_drv.h | 30 + drivers/gpu/drm/sun4i/sun4i_framebuffer.c | 54 ++ drivers/gpu/drm/sun4i/sun4i_framebuffer.h | 19 + drivers/gpu/drm/sun4i/sun4i_layer.c | 160 +++++ drivers/gpu/drm/sun4i/sun4i_layer.h | 30 + drivers/gpu/drm/sun4i/sun4i_rgb.c | 229 +++++++ drivers/gpu/drm/sun4i/sun4i_rgb.h | 18 + drivers/gpu/drm/sun4i/sun4i_tcon.c | 521 ++++++++++++++++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 177 ++++++ drivers/gpu/drm/sun4i/sun4i_tv.c | 675 +++++++++++++++++++++ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 + drivers/reset/core.c | 6 +- include/drm/drm_modes.h | 1 + include/linux/clk-provider.h | 55 +- include/linux/reset-controller.h | 2 +- 52 files changed, 4455 insertions(+), 179 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino-43-ts.txt create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt create mode 100644 drivers/clk/clk-io.c create mode 100644 drivers/clk/clk-io.h create mode 100644 drivers/clk/sunxi/clk-sun4i-display.c create mode 100644 drivers/clk/sunxi/clk-sun4i-pll3.c create mode 100644 drivers/clk/sunxi/clk-sun4i-tcon-ch1.c create mode 100644 drivers/gpu/drm/sun4i/Kconfig create mode 100644 drivers/gpu/drm/sun4i/Makefile create mode 100644 drivers/gpu/drm/sun4i/sun4i_backend.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_backend.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_crtc.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_crtc.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_drv.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_drv.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_framebuffer.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_framebuffer.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_layer.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_layer.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_rgb.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_rgb.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_tcon.c create mode 100644 drivers/gpu/drm/sun4i/sun4i_tcon.h create mode 100644 drivers/gpu/drm/sun4i/sun4i_tv.c -- 2.6.4

9 63

[Bug 66352] New: GPU lockup in L4D2 on TURKS with HyperZ
by bugzilla-daemon＠freedesktop.org 19 Feb '16

19 Feb '16

https://bugs.freedesktop.org/show_bug.cgi?id=66352 Priority: medium Bug ID: 66352 Assignee: dri-devel(a)lists.freedesktop.org Summary: GPU lockup in L4D2 on TURKS with HyperZ Severity: normal Classification: Unclassified OS: FreeBSD Reporter: russianneuromancer(a)ya.ru Hardware: x86-64 (AMD64) Status: NEW Version: unspecified Component: DRM/Radeon Product: DRI Created attachment 81668 --> https://bugs.freedesktop.org/attachment.cgi?id=81668&action=edit dmesg Lockup described in bug 64220 was happen right after campaign start (in first minute) but this lockup usually happen later - in first hour of playing. This lockup is not reproducible when HyperZ is disabled, so probably (like bug 64220) is related to HyperZ. [ 2160.750951] radeon 0000:01:00.0: GPU lockup CP stall for more than 10000msec [ 2160.750966] radeon 0000:01:00.0: GPU lockup (waiting for 0x000000000002525f last fence id 0x000000000002525c) [ 2160.786068] radeon 0000:01:00.0: fence driver on ring 5 use gpu addr 0x0000000000174118 and cpu addr 0xffffc9000681c118 [ 2160.787147] radeon 0000:01:00.0: Saved 183 dwords of commands on ring 0. [ 2160.787166] radeon 0000:01:00.0: GPU softreset: 0x00000019 [ 2160.787175] radeon 0000:01:00.0: GRBM_STATUS = 0xE7730CA0 [ 2160.787177] radeon 0000:01:00.0: GRBM_STATUS_SE0 = 0xFC000001 [ 2160.787180] radeon 0000:01:00.0: GRBM_STATUS_SE1 = 0x00000007 [ 2160.787182] radeon 0000:01:00.0: SRBM_STATUS = 0x200000C0 [ 2160.787184] radeon 0000:01:00.0: SRBM_STATUS2 = 0x00000000 [ 2160.787186] radeon 0000:01:00.0: R_008674_CP_STALLED_STAT1 = 0x01000000 [ 2160.787189] radeon 0000:01:00.0: R_008678_CP_STALLED_STAT2 = 0x000D1000 [ 2160.787191] radeon 0000:01:00.0: R_00867C_CP_BUSY_STAT = 0x00068506 [ 2160.787193] radeon 0000:01:00.0: R_008680_CP_STAT = 0x80878647 [ 2160.787196] radeon 0000:01:00.0: R_00D034_DMA_STATUS_REG = 0x44C83D57 [ 2160.787356] radeon 0000:01:00.0: GRBM_SOFT_RESET=0x00007F6B [ 2160.787410] radeon 0000:01:00.0: SRBM_SOFT_RESET=0x00000100 [ 2160.788559] radeon 0000:01:00.0: GRBM_STATUS = 0x00003828 [ 2160.788561] radeon 0000:01:00.0: GRBM_STATUS_SE0 = 0x00000007 [ 2160.788563] radeon 0000:01:00.0: GRBM_STATUS_SE1 = 0x00000007 [ 2160.788565] radeon 0000:01:00.0: SRBM_STATUS = 0x200000C0 [ 2160.788568] radeon 0000:01:00.0: SRBM_STATUS2 = 0x00000000 [ 2160.788570] radeon 0000:01:00.0: R_008674_CP_STALLED_STAT1 = 0x00000000 [ 2160.788572] radeon 0000:01:00.0: R_008678_CP_STALLED_STAT2 = 0x00000000 [ 2160.788574] radeon 0000:01:00.0: R_00867C_CP_BUSY_STAT = 0x00000000 [ 2160.788576] radeon 0000:01:00.0: R_008680_CP_STAT = 0x00000000 [ 2160.788579] radeon 0000:01:00.0: R_00D034_DMA_STATUS_REG = 0x44C83D57 [ 2160.788589] radeon 0000:01:00.0: GPU reset succeeded, trying to resume [ 2160.793777] [drm] PCIE GART of 512M enabled (table at 0x0000000000040000). [ 2160.793895] radeon 0000:01:00.0: WB enabled [ 2160.793900] radeon 0000:01:00.0: fence driver on ring 0 use gpu addr 0x0000000040000c00 and cpu addr 0xffff8801fb519c00 [ 2160.793904] radeon 0000:01:00.0: fence driver on ring 3 use gpu addr 0x0000000040000c0c and cpu addr 0xffff8801fb519c0c [ 2160.796145] radeon 0000:01:00.0: fence driver on ring 5 use gpu addr 0x0000000000174118 and cpu addr 0xffffc900079b2118 [ 2160.812389] [drm] ring test on 0 succeeded in 2 usecs [ 2160.812457] [drm] ring test on 3 succeeded in 1 usecs [ 2160.987496] [drm] ring test on 5 succeeded in 1 usecs [ 2160.987512] [drm] UVD initialized successfully. [ 2161.219416] [drm] ib test on ring 0 succeeded in 0 usecs [ 2161.219497] [drm] ib test on ring 3 succeeded in 1 usecs [ 2161.370073] [drm:r600_uvd_ib_test] *ERROR* radeon: failed to get create msg (-22). [ 2161.370094] [drm:radeon_ib_ring_tests] *ERROR* radeon: failed testing IB on ring 5 (-22). ~$ lspci | grep VGA 00:01.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI BeaverCreek [Radeon HD 6620G] 01:00.0 VGA compatible controller: Advanced Micro Devices [AMD] nee ATI Whistler [Radeon HD 6600M/6700M/7600M Series] (DRI_PRIME is used to launch game.) Linux 3.10-rc7 libdrm 2.4.45+git20130607.a0178c00 Mesa 9.2.0~git20130627.15085b47 xserver-xorg-video-radeon 7.1.99+git20130531.bd2557ea Xserver 1.13.4~git20130508+server-1.13-branch.10c42f57 Kubuntu 13.04 x86_64 updated from Xorg Edgers PPA. -- You are receiving this mail because: You are the assignee for the bug.

1 4

[Bug 89521] New: Radeon driver fails to set dpm power state after resume from S3
by bugzilla-daemon＠bugzilla.kernel.org 19 Feb '16

19 Feb '16

https://bugzilla.kernel.org/show_bug.cgi?id=89521 Bug ID: 89521 Summary: Radeon driver fails to set dpm power state after resume from S3 Product: Drivers Version: 2.5 Kernel Version: 3.18.0 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: anhermann(a)gmx.net Regression: No Created attachment 160341 --> https://bugzilla.kernel.org/attachment.cgi?id=160341&action=edit dmesg output from 3 resume cycles Using a Radeon R9 270X and kernel 3.18.0 I get the following error message only after resume from S3 state: [drm:si_dpm_set_power_state] *ERROR* si_set_sw_state failed I would like to notice that this also happened with older kernel versions (3.17 and 3.16 with radeon.dpm=1) and other cards. My other PC has a HD 5450 with the same problem (slightly other ERROR string as its not SI). Besides the error message, I cannot see any strange behaviour, performance is good, no freezes etc. . But it sounds like performance level switching is not working correctly? I added the dmesg output showing three resume cycles with the mentioned error message as attachment. Thanks -- You are receiving this mail because: You are watching the assignee of the bug.

1 1

[PATCH v5 00/12] Enable GPU switching on pre-retina MacBook Pro
by Lukas Wunner 18 Feb '16

18 Feb '16

Enable GPU switching on the pre-retina MacBook Pro (2008 - 2013), v5. The main obstacle on these machines is that the panel mode in VBIOS is bogus. Fortunately gmux can switch DDC independently from the display, thereby allowing the inactive GPU to probe the panel's EDID. In short, vga_switcheroo and apple-gmux are amended with hooks to switch DDC, DRM core is amended with a drm_get_edid_switcheroo() helper, and relevant drivers are amended to call that for LVDS outputs. The retina MacBook Pro (2012 - present) uses eDP and cannot switch AUX independently from the main link. The main obstacle there is link training, I'm currently working on this, it will be addressed in a future patch set. This series is also reviewable on GitHub: https://github.com/l1k/linux/commits/mbp_switcheroo_v5 Changes: * New patch [01/12]: vga_switcheroo handler flags Alex Deucher asked if this series might regress on non-Apple laptops. To address this concern, I let handlers declare their capabilities in a bitmask. DRM drivers call drm_get_edid_switcheroo() only if the handler has set the VGA_SWITCHEROO_CAN_SWITCH_DDC flag. Currently just one other flag is defined which is used on retinas. * Changed patch [02/12]: vga_switcheroo DDC locking Rename ddc_lock to mux_hw_lock, suggested by Daniel Vetter. * New patch [03/12]: track switch state of apple-gmux Fixes a bug in previous versions of this series which occurred if the system was suspended while DDC was temporarily switched: On resume DDC was switched to the wrong GPU. * New patches [09/12 - 12/12]: deferred probing Previously I used connector reprobing if the inactive GPU's driver loaded before gmux. I've ditched that in favor of deferred driver probing, which is much simpler. Thanks to Daniel Vetter for the suggestion. Caution: Patch [09/12] depends on a new acpi_dev_present() API which will land in 4.5 via Rafael J. Wysocki's tree. I would particularly be interested in feedback on the handler flags patch [01/12]. I'm not 100% happy with the number of characters required to query the flags (e.g.: if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)), but failed to come up with something shorter. Thierry Reding used a struct of bools instead of a bitmask for his recent drm_dp_link_caps patches. Maybe use that instead? http://lists.freedesktop.org/archives/dri-devel/2015-December/097025.html Thanks, Lukas Lukas Wunner (12): vga_switcheroo: Add handler flags infrastructure vga_switcheroo: Add support for switching only the DDC apple-gmux: Track switch state apple-gmux: Add switch_ddc support drm/edid: Switch DDC when reading the EDID drm/i915: Switch DDC when reading the EDID drm/nouveau: Switch DDC when reading the EDID drm/radeon: Switch DDC when reading the EDID apple-gmux: Add helper for presence detect drm/i915: Defer probe if gmux is present but its driver isn't drm/nouveau: Defer probe if gmux is present but its driver isn't drm/radeon: Defer probe if gmux is present but its driver isn't Documentation/DocBook/gpu.tmpl | 5 + drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 3 +- drivers/gpu/drm/drm_edid.c | 26 +++++ drivers/gpu/drm/i915/i915_drv.c | 12 +++ drivers/gpu/drm/i915/intel_lvds.c | 8 +- drivers/gpu/drm/nouveau/nouveau_acpi.c | 2 +- drivers/gpu/drm/nouveau/nouveau_connector.c | 21 +++- drivers/gpu/drm/nouveau/nouveau_drm.c | 11 +++ drivers/gpu/drm/radeon/radeon_atpx_handler.c | 3 +- drivers/gpu/drm/radeon/radeon_connectors.c | 6 ++ drivers/gpu/drm/radeon/radeon_drv.c | 11 +++ drivers/gpu/vga/vga_switcheroo.c | 119 ++++++++++++++++++++++- drivers/platform/x86/apple-gmux.c | 111 ++++++++++++++++----- include/drm/drm_crtc.h | 2 + include/linux/apple-gmux.h | 39 ++++++++ include/linux/vga_switcheroo.h | 36 ++++++- 16 files changed, 382 insertions(+), 33 deletions(-) create mode 100644 include/linux/apple-gmux.h -- 1.8.5.2 (Apple Git-48)

6 29

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel January 2016