dri-devel March 2016

dri-devel@lists.freedesktop.org

206 participants
1222 discussions

[PATCH 1/2] drm: Add few more wrapper functions for drm panel
by Deepak M 02 Mar '16

02 Mar '16

Currently there are few pair of functions which are called during the panel enable/disable sequence. To improve the granularity, adding few more wrapper functions so that the functions are more specific on what they are doing. Cc: David Airlie <airlied(a)linux.ie> Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Cc: Daniel Vetter <daniel.vetter(a)intel.com> Cc: Jani Nikula <jani.nikula(a)intel.com> Signed-off-by: Deepak M <m.deepak(a)intel.com> Signed-off-by: Gaurav K Singh <gaurav.k.singh(a)intel.com> --- include/drm/drm_panel.h | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h index 13ff44b..c729f6d 100644 --- a/include/drm/drm_panel.h +++ b/include/drm/drm_panel.h @@ -73,6 +73,12 @@ struct drm_panel_funcs { int (*get_modes)(struct drm_panel *panel); int (*get_timings)(struct drm_panel *panel, unsigned int num_timings, struct display_timing *timings); + int (*power_on)(struct drm_panel *panel); + int (*power_off)(struct drm_panel *panel); + int (*backlight_on)(struct drm_panel *panel); + int (*backlight_off)(struct drm_panel *panel); + int (*get_info)(struct drm_panel *panel, + struct drm_connector *connector); }; struct drm_panel { @@ -117,6 +123,47 @@ static inline int drm_panel_enable(struct drm_panel *panel) return panel ? -ENOSYS : -EINVAL; } +static inline int drm_panel_power_on(struct drm_panel *panel) +{ + if (panel && panel->funcs && panel->funcs->power_on) + return panel->funcs->power_on(panel); + + return panel ? -ENOSYS : -EINVAL; +} + +static inline int drm_panel_power_off(struct drm_panel *panel) +{ + if (panel && panel->funcs && panel->funcs->power_off) + return panel->funcs->power_off(panel); + + return panel ? -ENOSYS : -EINVAL; +} + +static inline int drm_panel_backlight_on(struct drm_panel *panel) +{ + if (panel && panel->funcs && panel->funcs->backlight_on) + return panel->funcs->backlight_on(panel); + + return panel ? -ENOSYS : -EINVAL; +} + +static inline int drm_panel_backlight_off(struct drm_panel *panel) +{ + if (panel && panel->funcs && panel->funcs->backlight_off) + return panel->funcs->backlight_off(panel); + + return panel ? -ENOSYS : -EINVAL; +} + +static inline int drm_panel_get_info(struct drm_panel *panel, + struct drm_connector *connector) +{ + if (connector && panel && panel->funcs && panel->funcs->get_info) + return panel->funcs->get_info(panel, connector); + + return panel ? -ENOSYS : -EINVAL; +} + static inline int drm_panel_get_modes(struct drm_panel *panel) { if (panel && panel->funcs && panel->funcs->get_modes) -- 1.9.1

3 4

[PATCH 3/3] drm: panel-simple: implement URT UMSH-8596MD-xT panel support
by Maciej S. Szmigiero 02 Mar '16

02 Mar '16

This patch implements support for United Radiant Technology UMSH-8596MD-xT 7.0" WVGA TFT LCD panels in DRM panel-simple driver. Signed-off-by: Maciej Szmigiero <mail(a)maciej.szmigiero.name> --- This replaces "drm: panel-simple: add URT UMSH-8596MD-xT panel support" submission. drivers/gpu/drm/panel/panel-simple.c | 54 ++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index f97b73e..44d0deb9 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1096,6 +1096,42 @@ static const struct panel_desc shelly_sca07010_bfn_lnn = { .bus_format = MEDIA_BUS_FMT_RGB666_1X18, }; +static const struct display_timing urt_umsh_8596md_timing = { + .pixelclock = { 33260000, 33260000, 33260000 }, + .hactive = { 800, 800, 800 }, + .hfront_porch = { 41, 41, 41 }, + .hback_porch = { 216 - 128, 216 - 128, 216 - 128 }, + .hsync_len = { 71, 128, 128 }, + .vactive = { 480, 480, 480 }, + .vfront_porch = { 10, 10, 10 }, + .vback_porch = { 35 - 2, 35 - 2, 35 - 2 }, + .vsync_len = { 2, 2, 2 }, + .flags = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE | + DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW, +}; + +static const struct panel_desc urt_umsh_8596md_lvds = { + .timings = &urt_umsh_8596md_timing, + .num_timings = 1, + .bpc = 6, + .size = { + .width = 152, + .height = 91, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, +}; + +static const struct panel_desc urt_umsh_8596md_parallel = { + .timings = &urt_umsh_8596md_timing, + .num_timings = 1, + .bpc = 6, + .size = { + .width = 152, + .height = 91, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, +}; + static const struct of_device_id platform_of_match[] = { { .compatible = "ampire,am800480r3tmqwa1h", @@ -1191,6 +1227,24 @@ static const struct of_device_id platform_of_match[] = { .compatible = "shelly,sca07010-bfn-lnn", .data = &shelly_sca07010_bfn_lnn, }, { + .compatible = "urt,umsh-8596md-t", + .data = &urt_umsh_8596md_parallel, + }, { + .compatible = "urt,umsh-8596md-1t", + .data = &urt_umsh_8596md_parallel, + }, { + .compatible = "urt,umsh-8596md-7t", + .data = &urt_umsh_8596md_parallel, + }, { + .compatible = "urt,umsh-8596md-11t", + .data = &urt_umsh_8596md_lvds, + }, { + .compatible = "urt,umsh-8596md-19t", + .data = &urt_umsh_8596md_lvds, + }, { + .compatible = "urt,umsh-8596md-20t", + .data = &urt_umsh_8596md_parallel, + }, { /* sentinel */ } };

3 9

[PATCH v7 7/7] drm: add parameter-order checking to drm memory allocators
by Dave Gordon 02 Mar '16

02 Mar '16

After the recent addition of drm_malloc_gfp(), it was noticed that some callers of these functions has swapped the parameters in the call - it's supposed to be 'number of members' and 'sizeof(element)', but a few callers had got the size first and the count second. This isn't otherwise detected because they're both type 'size_t', and the implementation at present just multiplies them anyway, so the result is still right. But some future implementation might treat them differently (e.g. allowing 0 elements but not zero size), so let's add some compile-time checks and complain if the second (size) parameter isn't a sizeof() expression, or at least a compile-time constant. This patch also fixes those callers where the order was wrong. v6: removed duplicate BUILD_BUG_ON_MSG(); avoided renaming functions by shadowing them with #defines and then calling the function (non-recursively!) from inside the #define [Chris Wilson] Signed-off-by: Dave Gordon <david.s.gordon(a)intel.com> Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com>Cc: dri- Cc: dri-devel(a)lists.freedesktop.org --- drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 2 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 ++++---- include/drm/drm_mem_util.h | 27 ++++++++++++++++++++++++--- 3 files changed, 29 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c index 1aba01a..9ae4a71 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c @@ -340,7 +340,7 @@ int etnaviv_ioctl_gem_submit(struct drm_device *dev, void *data, */ bos = drm_malloc_ab(args->nr_bos, sizeof(*bos)); relocs = drm_malloc_ab(args->nr_relocs, sizeof(*relocs)); - stream = drm_malloc_ab(1, args->stream_size); + stream = drm_malloc_ab(args->stream_size, sizeof(*stream)); cmdbuf = etnaviv_gpu_cmdbuf_new(gpu, ALIGN(args->stream_size, 8) + 8, args->nr_bos); if (!bos || !relocs || !stream || !cmdbuf) { diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index f734b3c..1a136d9 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1686,8 +1686,8 @@ static bool only_mappable_for_reloc(unsigned int flags) } /* Copy in the exec list from userland */ - exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count); - exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count); + exec_list = drm_malloc_ab(args->buffer_count, sizeof(*exec_list)); + exec2_list = drm_malloc_ab(args->buffer_count, sizeof(*exec2_list)); if (exec_list == NULL || exec2_list == NULL) { DRM_DEBUG("Failed to allocate exec list for %d buffers\n", args->buffer_count); @@ -1775,8 +1775,8 @@ static bool only_mappable_for_reloc(unsigned int flags) return -EINVAL; } - exec2_list = drm_malloc_gfp(sizeof(*exec2_list), - args->buffer_count, + exec2_list = drm_malloc_gfp(args->buffer_count, + sizeof(*exec2_list), GFP_TEMPORARY); if (exec2_list == NULL) { DRM_DEBUG("Failed to allocate exec list for %d buffers\n", diff --git a/include/drm/drm_mem_util.h b/include/drm/drm_mem_util.h index 741ce75..5b0111c 100644 --- a/include/drm/drm_mem_util.h +++ b/include/drm/drm_mem_util.h @@ -29,7 +29,7 @@ #include <linux/vmalloc.h> -static __inline__ void *drm_calloc_large(size_t nmemb, size_t size) +static __inline__ void *drm_calloc_large(size_t nmemb, const size_t size) { if (size != 0 && nmemb > SIZE_MAX / size) return NULL; @@ -41,8 +41,15 @@ static __inline__ void *drm_calloc_large(size_t nmemb, size_t size) GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO, PAGE_KERNEL); } +#define drm_calloc_large(nmemb, size) \ +({ \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(size), \ + "Non-constant 'size' - check argument ordering?"); \ + (drm_calloc_large)(nmemb, size); \ +}) + /* Modeled after cairo's malloc_ab, it's like calloc but without the zeroing. */ -static __inline__ void *drm_malloc_ab(size_t nmemb, size_t size) +static __inline__ void *drm_malloc_ab(size_t nmemb, const size_t size) { if (size != 0 && nmemb > SIZE_MAX / size) return NULL; @@ -54,7 +61,14 @@ static __inline__ void *drm_malloc_ab(size_t nmemb, size_t size) GFP_KERNEL | __GFP_HIGHMEM, PAGE_KERNEL); } -static __inline__ void *drm_malloc_gfp(size_t nmemb, size_t size, gfp_t gfp) +#define drm_malloc_ab(nmemb, size) \ +({ \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(size), \ + "Non-constant 'size' - check argument ordering?"); \ + (drm_malloc_ab)(nmemb, size); \ +}) + +static __inline__ void *drm_malloc_gfp(size_t nmemb, const size_t size, gfp_t gfp) { if (size != 0 && nmemb > SIZE_MAX / size) return NULL; @@ -73,6 +87,13 @@ static __inline__ void *drm_malloc_gfp(size_t nmemb, size_t size, gfp_t gfp) gfp | __GFP_HIGHMEM, PAGE_KERNEL); } +#define drm_malloc_gfp(nmemb, size, gfp) \ +({ \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(size), \ + "Non-constant 'size' - check argument ordering?"); \ + (drm_malloc_gfp)(nmemb, size, gfp); \ +}) + static __inline void drm_free_large(void *ptr) { kvfree(ptr); -- 1.9.1

2 1

[PATCH v12 00/14] MT8173 DRM support
by Philipp Zabel 02 Mar '16

02 Mar '16

Hi, another round of the MT8173 DRM driver. I plan to send a pull request with this version soon, there are just some small changes to the main driver patch: Changes since v11: - Instead of disabling all planes initally, configure them according to their state. This way the plane doesn't stay disabled until the first flip (which may never happen). - Disable the pipe instead of crashing if any of its components are disabled or missing in the device tree. - Correct parameter type in the mtk_drm_gem_create() declaration regards Philipp CK Hu (5): dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding drm/mediatek: Add DRM Driver for Mediatek SoC MT8173. drm/mediatek: Add DSI sub driver arm64: dts: mt8173: Add display subsystem related nodes arm64: dts: mt8173: Add HDMI related nodes Jie Qiu (3): drm/mediatek: Add DPI sub driver drm/mediatek: Add HDMI support drm/mediatek: enable hdmi output control bit Philipp Zabel (6): dt-bindings: drm/mediatek: Add Mediatek HDMI dts binding clk: mediatek: make dpi0_sel propagate rate changes clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output dt-bindings: hdmi-connector: add DDC I2C bus phandle documentation clk: mediatek: remove hdmitx_dig_cts from TOP clocks arm64: dts: mt8173-evb: enable HDMI output .../bindings/display/connector/hdmi-connector.txt | 1 + .../bindings/display/mediatek/mediatek,disp.txt | 203 +++++ .../bindings/display/mediatek/mediatek,dpi.txt | 35 + .../bindings/display/mediatek/mediatek,dsi.txt | 60 ++ .../bindings/display/mediatek/mediatek,hdmi.txt | 148 ++++ arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 38 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 304 +++++++ drivers/clk/mediatek/clk-mt8173.c | 12 +- drivers/clk/mediatek/clk-mtk.h | 15 +- drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/mediatek/Kconfig | 21 + drivers/gpu/drm/mediatek/Makefile | 23 + drivers/gpu/drm/mediatek/mtk_cec.c | 245 ++++++ drivers/gpu/drm/mediatek/mtk_cec.h | 25 + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 302 +++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 240 ++++++ drivers/gpu/drm/mediatek/mtk_dpi.c | 757 +++++++++++++++++ drivers/gpu/drm/mediatek/mtk_dpi.h | 85 ++ drivers/gpu/drm/mediatek/mtk_dpi_regs.h | 228 +++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 582 +++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 32 + drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 355 ++++++++ drivers/gpu/drm/mediatek/mtk_drm_ddp.h | 41 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 225 +++++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 150 ++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 583 +++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 56 ++ drivers/gpu/drm/mediatek/mtk_drm_fb.c | 165 ++++ drivers/gpu/drm/mediatek/mtk_drm_fb.h | 23 + drivers/gpu/drm/mediatek/mtk_drm_gem.c | 266 ++++++ drivers/gpu/drm/mediatek/mtk_drm_gem.h | 59 ++ drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c | 579 +++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_plane.c | 240 ++++++ drivers/gpu/drm/mediatek/mtk_drm_plane.h | 59 ++ drivers/gpu/drm/mediatek/mtk_dsi.c | 942 +++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi.c | 479 +++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi.h | 221 +++++ drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c | 362 ++++++++ drivers/gpu/drm/mediatek/mtk_hdmi_hw.c | 664 +++++++++++++++ drivers/gpu/drm/mediatek/mtk_hdmi_hw.h | 73 ++ drivers/gpu/drm/mediatek/mtk_hdmi_regs.h | 222 +++++ drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 487 +++++++++++ drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 505 +++++++++++ include/dt-bindings/clock/mt8173-clk.h | 3 +- 45 files changed, 10113 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt create mode 100644 drivers/gpu/drm/mediatek/Kconfig create mode 100644 drivers/gpu/drm/mediatek/Makefile create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.c create mode 100644 drivers/gpu/drm/mediatek/mtk_cec.h create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl.c create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_rdma.c create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi.h create mode 100644 drivers/gpu/drm/mediatek/mtk_dpi_regs.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_crtc.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_drv.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_fb.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_gem.h create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_hdmi_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.c create mode 100644 drivers/gpu/drm/mediatek/mtk_drm_plane.h create mode 100644 drivers/gpu/drm/mediatek/mtk_dsi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_ddc_drv.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.c create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_hw.h create mode 100644 drivers/gpu/drm/mediatek/mtk_hdmi_regs.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mipi_tx.c create mode 100644 drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c -- 2.7.0

3 17

[PATCH 0/7] drm/cirrus: convert cirrus to atomic mode-setting
by John Hunter 02 Mar '16

02 Mar '16

From: Zhao Junwang <zhjwpku(a)gmail.com> This patch series aim to convert DRM_CIRRUS to atomic mode-setting. This mostly reference my previous patch series on DRM_BOCHS and Gustavo Padovan;s patch series on drm/exynos. Zhao Junwang (7): drm/cirrus: phase 1 - use the transitional helpers drm/cirrus: phase 2: wire up state reset, duplicate and destroy drm/cirrus: phase 3: atomic updates of planes drm/cirrus: add return 0 to make sure if (bo->pin_count) early_exit drm/cirrus: phase 3: use atomic .set_config helper drm/cirrus: atomic dpms support drm/cirrus: add DRIVER_ATOMIC to .driver_features drivers/gpu/drm/cirrus/cirrus_drv.c | 3 +- drivers/gpu/drm/cirrus/cirrus_drv.h | 3 +- drivers/gpu/drm/cirrus/cirrus_main.c | 5 +- drivers/gpu/drm/cirrus/cirrus_mode.c | 299 ++++++++++++++++++++-------------- drivers/gpu/drm/cirrus/cirrus_ttm.c | 2 + 5 files changed, 187 insertions(+), 125 deletions(-) -- 1.7.10.4

2 8

[PATCH] drm/ast: Fix incorrect register check for DRAM width
by Timothy Pearson 02 Mar '16

02 Mar '16

During DRAM initialization on certain ASpeed devices, an incorrect bit (bit 10) was checked in the "SDRAM Bus Width Status" register to determine DRAM width. Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05. Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- drivers/gpu/drm/ast/ast_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 9759009..b1480ac 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev) } while (ast_read32(ast, 0x10000) != 0x01); data = ast_read32(ast, 0x10004); - if (data & 0x400) + if (data & 0x40) ast->dram_bus_width = 16; else ast->dram_bus_width = 32; -- 1.7.9.5

2 2

[PATCH] drm/exynos/dsi: use core helper to create DSI packet
by Andrzej Hajda 02 Mar '16

02 Mar '16

Core provides generic helper to create DSI packet, use it instead of custom code. Signed-off-by: Andrzej Hajda <a.hajda(a)samsung.com> --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 69 +++++++++++---------------------- 1 file changed, 23 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 77e17ae..f17be93 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -10,6 +10,8 @@ * published by the Free Software Foundation. */ +#include <asm/unaligned.h> + #include <drm/drmP.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_mipi_dsi.h> @@ -222,12 +224,8 @@ struct exynos_dsi_transfer { struct list_head list; struct completion completed; int result; - u8 data_id; - u8 data[2]; + struct mipi_dsi_packet packet; u16 flags; - - const u8 *tx_payload; - u16 tx_len; u16 tx_done; u8 *rx_payload; @@ -322,6 +320,7 @@ enum reg_idx { static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, u32 val) { + writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); } @@ -983,13 +982,14 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, struct exynos_dsi_transfer *xfer) { struct device *dev = dsi->dev; - const u8 *payload = xfer->tx_payload + xfer->tx_done; - u16 length = xfer->tx_len - xfer->tx_done; + struct mipi_dsi_packet *pkt = &xfer->packet; + const u8 *payload = pkt->payload + xfer->tx_done; + u16 length = pkt->payload_length - xfer->tx_done; bool first = !xfer->tx_done; u32 reg; dev_dbg(dev, "< xfer %p: tx len %u, done %u, rx len %u, done %u\n", - xfer, xfer->tx_len, xfer->tx_done, xfer->rx_len, xfer->rx_done); + xfer, length, xfer->tx_done, xfer->rx_len, xfer->rx_done); if (length > DSI_TX_FIFO_SIZE) length = DSI_TX_FIFO_SIZE; @@ -998,8 +998,7 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, /* Send payload */ while (length >= 4) { - reg = (payload[3] << 24) | (payload[2] << 16) - | (payload[1] << 8) | payload[0]; + reg = get_unaligned_le32(payload); exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg); payload += 4; length -= 4; @@ -1017,16 +1016,13 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, reg |= payload[0]; exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg); break; - case 0: - /* Do nothing */ - break; } /* Send packet header */ if (!first) return; - reg = (xfer->data[1] << 16) | (xfer->data[0] << 8) | xfer->data_id; + reg = get_unaligned_le32(pkt->header); if (exynos_dsi_wait_for_hdr_fifo(dsi)) { dev_err(dev, "waiting for header FIFO timed out\n"); return; @@ -1147,13 +1143,14 @@ again: spin_unlock_irqrestore(&dsi->transfer_lock, flags); - if (xfer->tx_len && xfer->tx_done == xfer->tx_len) + if (xfer->packet.payload_length && + xfer->tx_done == xfer->packet.payload_length) /* waiting for RX */ return; exynos_dsi_send_to_fifo(dsi, xfer); - if (xfer->tx_len || xfer->rx_len) + if (xfer->packet.payload_length || xfer->rx_len) return; xfer->result = 0; @@ -1189,10 +1186,11 @@ static bool exynos_dsi_transfer_finish(struct exynos_dsi *dsi) spin_unlock_irqrestore(&dsi->transfer_lock, flags); dev_dbg(dsi->dev, - "> xfer %p, tx_len %u, tx_done %u, rx_len %u, rx_done %u\n", - xfer, xfer->tx_len, xfer->tx_done, xfer->rx_len, xfer->rx_done); + "> xfer %p, tx_len %lu, tx_done %u, rx_len %u, rx_done %u\n", + xfer, xfer->packet.payload_length, xfer->tx_done, xfer->rx_len, + xfer->rx_done); - if (xfer->tx_done != xfer->tx_len) + if (xfer->tx_done != xfer->packet.payload_length) return true; if (xfer->rx_done != xfer->rx_len) @@ -1263,9 +1261,10 @@ static int exynos_dsi_transfer(struct exynos_dsi *dsi, wait_for_completion_timeout(&xfer->completed, msecs_to_jiffies(DSI_XFER_TIMEOUT_MS)); if (xfer->result == -ETIMEDOUT) { + struct mipi_dsi_packet *pkt = &xfer->packet; exynos_dsi_remove_transfer(dsi, xfer); - dev_err(dsi->dev, "xfer timed out: %*ph %*ph\n", 2, xfer->data, - xfer->tx_len, xfer->tx_payload); + dev_err(dsi->dev, "xfer timed out: %*ph %*ph\n", 4, pkt->header, + (int)pkt->payload_length, pkt->payload); return -ETIMEDOUT; } @@ -1438,12 +1437,6 @@ static int exynos_dsi_host_detach(struct mipi_dsi_host *host, return 0; } -/* distinguish between short and long DSI packet types */ -static bool exynos_dsi_is_short_dsi_type(u8 type) -{ - return (type & 0x0f) <= 8; -} - static ssize_t exynos_dsi_host_transfer(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { @@ -1461,25 +1454,9 @@ static ssize_t exynos_dsi_host_transfer(struct mipi_dsi_host *host, dsi->state |= DSIM_STATE_INITIALIZED; } - if (msg->tx_len == 0) - return -EINVAL; - - xfer.data_id = msg->type | (msg->channel << 6); - - if (exynos_dsi_is_short_dsi_type(msg->type)) { - const char *tx_buf = msg->tx_buf; - - if (msg->tx_len > 2) - return -EINVAL; - xfer.tx_len = 0; - xfer.data[0] = tx_buf[0]; - xfer.data[1] = (msg->tx_len == 2) ? tx_buf[1] : 0; - } else { - xfer.tx_len = msg->tx_len; - xfer.data[0] = msg->tx_len & 0xff; - xfer.data[1] = msg->tx_len >> 8; - xfer.tx_payload = msg->tx_buf; - } + ret = mipi_dsi_create_packet(&xfer.packet, msg); + if (ret < 0) + return ret; xfer.rx_len = msg->rx_len; xfer.rx_payload = msg->rx_buf; -- 1.9.1

3 3

Reminder: 2016 X.Org Board of Directors Elections Nomination period is NOW
by Peter Hutterer 02 Mar '16

02 Mar '16

We are seeking nominations for candidates for election to the X.Org Foundation Board of Directors. All X.Org Foundation members are eligible for election to the board. Nominations for the 2016 election are now open and will remain open until 23:59 UTC on 15 March 2016. The Board consists of directors elected from the membership. Each year, an election is held to bring the total number of directors to eight. The four members receiving the highest vote totals will serve as directors for two year terms. The directors who received two year terms starting in 2015 were Peter Hutterer, Martin Peres, Rob Clark and Daniel Vetter, They will continue to serve until their term ends in 2017. Current directors whose term expires in 2016 are Alex Deucher, Matt Dew, Egbert Eich and Keith Packard. A director is expected to participate in the fortnightly IRC meeting to discuss current business and to attend the annual meeting of the X.Org Foundation, which will be held at a location determined in advance by the Board of Directors. A member may nominate themselves or any other member they feel is qualified. Nominations should be sent to the Election Committee at elections(a)x.org. Nominees shall be required to be current members of the X.Org Foundation, and submit a personal statement of up to 200 words that will be provided to prospective voters. The collected statements, along with the statement of contribution to the X.Org Foundation in the members account page on http://members.x.org, will be made available to all voters to help them make their voting decisions. Nominations, membership applications or renewals and completed personal statements must be received no later than 23:59 UTC on 15 March 2016. The slate of candidates will be published 17 March 2016 and candidate Q&A will begin then. The deadline for Xorg membership applications and renewals is 17 March 2016. Cheers, Peter, on behalf of the X.Org BoD

1 0

[PATCH] dma-buf/fence: fix fence_is_later v2
by Alex Deucher 02 Mar '16

02 Mar '16

From: Christian König <christian.koenig(a)amd.com> A fence is never later than itself. This caused a bunch of overhead for AMDGPU. v2: simplify check as suggested by Michel. Signed-off-by: Christian König <christian.koenig(a)amd.com> Reviewed-by: Michel Dänzer <michel.daenzer(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- include/linux/fence.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/fence.h b/include/linux/fence.h index bb52201..5aa95eb 100644 --- a/include/linux/fence.h +++ b/include/linux/fence.h @@ -292,7 +292,7 @@ static inline bool fence_is_later(struct fence *f1, struct fence *f2) if (WARN_ON(f1->context != f2->context)) return false; - return f1->seqno - f2->seqno < INT_MAX; + return (int)(f1->seqno - f2->seqno) > 0; } /** -- 2.5.0

4 3

[PATCH 4.4 230/342] drm: Prevent vblank counter bumps > 1 with active vblank clients. (v2)
by Greg Kroah-Hartman 01 Mar '16

01 Mar '16

4.4-stable review patch. If anyone has any objections, please let me know. ------------------ From: Mario Kleiner <mario.kleiner.de(a)gmail.com> commit 99b8e71597fadd6b2ac85e6e10f221f79dd9c1c1 upstream. This fixes a regression introduced by the new drm_update_vblank_count() implementation in Linux 4.4: Restrict the bump of the software vblank counter in drm_update_vblank_count() to a safe maximum value of +1 whenever there is the possibility that concurrent readers of vblank timestamps could be active at the moment, as the current implementation of the timestamp caching and updating is not safe against concurrent readers for calls to store_vblank() with a bump of anything but +1. A bump != 1 would very likely return corrupted timestamps to userspace, because the same slot in the cache could be concurrently written by store_vblank() and read by one of those readers in a non-atomic fashion and without the read-retry logic detecting this collision. Concurrent readers can exist while drm_update_vblank_count() is called from the drm_vblank_off() or drm_vblank_on() functions or other non-vblank- irq callers. However, all those calls are happening with the vbl_lock locked thereby preventing a drm_vblank_get(), so the vblank refcount can't increase while drm_update_vblank_count() is executing. Therefore a zero vblank refcount during execution of that function signals that is safe for arbitrary counter bumps if called from outside vblank irq, whereas a non-zero count is not safe. Whenever the function is called from vblank irq, we have to assume concurrent readers could show up any time during its execution, even if the refcount is currently zero, as vblank irqs are usually only enabled due to the presence of readers, and because when it is called from vblank irq it can't hold the vbl_lock to protect it from sudden bumps in vblank refcount. Therefore also restrict bumps to +1 when the function is called from vblank irq. Such bumps of more than +1 can happen at other times than reenabling vblank irqs, e.g., when regular vblank interrupts get delayed by more than 1 frame due to long held locks, long irq off periods, realtime preemption on RT kernels, or system management interrupts. A better solution would be to rewrite the timestamp caching to use full seqlocks to allow concurrent writes and reads for arbitrary vblank counter increments. v2: Add code comment that this is essentially a hack and should be replaced by a full seqlock implementation for caching of timestamps. Signed-off-by: Mario Kleiner <mario.kleiner.de(a)gmail.com> Reviewed-by: Daniel Vetter <daniel.vetter(a)ffwll.ch> Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: michel(a)daenzer.net Cc: vbabka(a)suse.cz Cc: ville.syrjala(a)linux.intel.com Cc: daniel.vetter(a)ffwll.ch Cc: dri-devel(a)lists.freedesktop.org Cc: alexander.deucher(a)amd.com Cc: christian.koenig(a)amd.com Signed-off-by: Dave Airlie <airlied(a)redhat.com> --- drivers/gpu/drm/drm_irq.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c @@ -221,6 +221,49 @@ static void drm_update_vblank_count(stru diff = (flags & DRM_CALLED_FROM_VBLIRQ) != 0; } + /* + * FIMXE: Need to replace this hack with proper seqlocks. + * + * Restrict the bump of the software vblank counter to a safe maximum + * value of +1 whenever there is the possibility that concurrent readers + * of vblank timestamps could be active at the moment, as the current + * implementation of the timestamp caching and updating is not safe + * against concurrent readers for calls to store_vblank() with a bump + * of anything but +1. A bump != 1 would very likely return corrupted + * timestamps to userspace, because the same slot in the cache could + * be concurrently written by store_vblank() and read by one of those + * readers without the read-retry logic detecting the collision. + * + * Concurrent readers can exist when we are called from the + * drm_vblank_off() or drm_vblank_on() functions and other non-vblank- + * irq callers. However, all those calls to us are happening with the + * vbl_lock locked to prevent drm_vblank_get(), so the vblank refcount + * can't increase while we are executing. Therefore a zero refcount at + * this point is safe for arbitrary counter bumps if we are called + * outside vblank irq, a non-zero count is not 100% safe. Unfortunately + * we must also accept a refcount of 1, as whenever we are called from + * drm_vblank_get() -> drm_vblank_enable() the refcount will be 1 and + * we must let that one pass through in order to not lose vblank counts + * during vblank irq off - which would completely defeat the whole + * point of this routine. + * + * Whenever we are called from vblank irq, we have to assume concurrent + * readers exist or can show up any time during our execution, even if + * the refcount is currently zero, as vblank irqs are usually only + * enabled due to the presence of readers, and because when we are called + * from vblank irq we can't hold the vbl_lock to protect us from sudden + * bumps in vblank refcount. Therefore also restrict bumps to +1 when + * called from vblank irq. + */ + if ((diff > 1) && (atomic_read(&vblank->refcount) > 1 || + (flags & DRM_CALLED_FROM_VBLIRQ))) { + DRM_DEBUG_VBL("clamping vblank bump to 1 on crtc %u: diffr=%u " + "refcount %u, vblirq %u\n", pipe, diff, + atomic_read(&vblank->refcount), + (flags & DRM_CALLED_FROM_VBLIRQ) != 0); + diff = 1; + } + DRM_DEBUG_VBL("updating vblank count on crtc %u:" " current=%u, diff=%u, hw=%u hw_last=%u\n", pipe, vblank->count, diff, cur_vblank, vblank->last);

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel March 2016