dri-devel June 2016

dri-devel@lists.freedesktop.org

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1446 discussions

[PATCH v3 06/33] drm: Minimally initialise drm_dp_aux
by Chris Wilson 10 Jun '16

10 Jun '16

When trying to split up the initialisation phase and the registration phase, one immediate problem encountered is trying to use our own i2c devices before registration with userspace (to read EDID during device discovery). drm_dp_aux in particular only offers an interface for setting up the device *after* we have exposed the connector via sysfs. In order to break the chicken-and-egg problem, export drm_dp_aux_init() to minimally prepare the i2c device for internal use before drm_connector_register(). Signed-off-by: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Dave Airlie <airlied(a)redhat.com> Cc: Rafael Antognolli <rafael.antognolli(a)intel.com> Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Cc: dri-devel(a)lists.freedesktop.org --- drivers/gpu/drm/drm_dp_helper.c | 26 +++++++++++++++++++++----- include/drm/drm_dp_helper.h | 1 + 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 4b088afa21b2..9b4ec65e1de6 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -791,15 +791,16 @@ static void unlock_bus(struct i2c_adapter *i2c, unsigned int flags) } /** - * drm_dp_aux_register() - initialise and register aux channel + * drm_dp_aux_init() - minimally initialise an aux channel * @aux: DisplayPort AUX channel * - * Returns 0 on success or a negative error code on failure. + * If you need to use the drm_dp_aux's i2c adapter prior to registering it + * with the outside world, call drm_dp_aux_init() first. You must still + * call drm_dp_aux_register() once the connector has been registered to + * allow userspace access to the auxiliary DP channel. */ -int drm_dp_aux_register(struct drm_dp_aux *aux) +void drm_dp_aux_init(struct drm_dp_aux *aux) { - int ret; - mutex_init(&aux->hw_mutex); aux->ddc.algo = &drm_dp_i2c_algo; @@ -809,6 +810,21 @@ int drm_dp_aux_register(struct drm_dp_aux *aux) aux->ddc.lock_bus = lock_bus; aux->ddc.trylock_bus = trylock_bus; aux->ddc.unlock_bus = unlock_bus; +} +EXPORT_SYMBOL(drm_dp_aux_init); + +/** + * drm_dp_aux_register() - initialise and register aux channel + * @aux: DisplayPort AUX channel + * + * Returns 0 on success or a negative error code on failure. + */ +int drm_dp_aux_register(struct drm_dp_aux *aux) +{ + int ret; + + if (!aux->ddc.algo) + drm_dp_aux_init(aux); aux->ddc.class = I2C_CLASS_DDC; aux->ddc.owner = THIS_MODULE; diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 5a848e734422..4d85cf2874af 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -805,6 +805,7 @@ int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link); int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link); +void drm_dp_aux_init(struct drm_dp_aux *aux); int drm_dp_aux_register(struct drm_dp_aux *aux); void drm_dp_aux_unregister(struct drm_dp_aux *aux); -- 2.8.1

2 4

[PATCH v2] drm: msm: Add ASoC generic hdmi audio codec support.
by Srinivas Kandagatla 10 Jun '16

10 Jun '16

This patch adds support to generic audio codec via ASoC hdmi-codec infrastucture which is merged recently. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla(a)linaro.org> --- Changes since v1: -Fixed typo for 44.1Kz case spotted by Jyri Sarha drivers/gpu/drm/msm/Kconfig | 1 + drivers/gpu/drm/msm/hdmi/hdmi.c | 120 +++++++++++++++++++++++++++++++++++++++- drivers/gpu/drm/msm/hdmi/hdmi.h | 14 +++++ 3 files changed, 134 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 167a497..7c7a031 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -10,6 +10,7 @@ config DRM_MSM select SHMEM select TMPFS select QCOM_SCM + select SND_SOC_HDMI_CODEC if SND_SOC default y help DRM/KMS driver for MSM/snapdragon. diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c index 51b9ea5..aada355 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c @@ -19,6 +19,7 @@ #include <linux/of_irq.h> #include <linux/of_gpio.h> +#include <sound/hdmi-codec.h> #include "hdmi.h" void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) @@ -434,6 +435,114 @@ static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name) return gpio; } +/* + * HDMI audio codec callbacks + */ +static int msm_hdmi_audio_hw_params(struct device *dev, + struct hdmi_codec_daifmt *daifmt, + struct hdmi_codec_params *params) +{ + struct hdmi *hdmi = dev_get_drvdata(dev); + unsigned int chan; + unsigned int channel_allocation = 0; + unsigned int rate; + unsigned int level_shift = 0; /* 0dB */ + bool down_mix = false; + + dev_dbg(dev, "%u Hz, %d bit, %d channels\n", params->sample_rate, + params->sample_width, params->cea.channels); + + switch (params->cea.channels) { + case 2: + /* FR and FL speakers */ + channel_allocation = 0; + chan = MSM_HDMI_AUDIO_CHANNEL_2; + break; + case 4: + /* FC, LFE, FR and FL speakers */ + channel_allocation = 0x3; + chan = MSM_HDMI_AUDIO_CHANNEL_4; + break; + case 6: + /* RR, RL, FC, LFE, FR and FL speakers */ + channel_allocation = 0x0B; + chan = MSM_HDMI_AUDIO_CHANNEL_6; + break; + case 8: + /* FRC, FLC, RR, RL, FC, LFE, FR and FL speakers */ + channel_allocation = 0x1F; + chan = MSM_HDMI_AUDIO_CHANNEL_8; + break; + default: + return -EINVAL; + } + + switch (params->sample_rate) { + case 32000: + rate = HDMI_SAMPLE_RATE_32KHZ; + break; + case 44100: + rate = HDMI_SAMPLE_RATE_44_1KHZ; + break; + case 48000: + rate = HDMI_SAMPLE_RATE_48KHZ; + break; + case 88200: + rate = HDMI_SAMPLE_RATE_88_2KHZ; + break; + case 96000: + rate = HDMI_SAMPLE_RATE_96KHZ; + break; + case 176400: + rate = HDMI_SAMPLE_RATE_176_4KHZ; + break; + case 192000: + rate = HDMI_SAMPLE_RATE_192KHZ; + break; + default: + dev_err(dev, "rate[%d] not supported!\n", + params->sample_rate); + return -EINVAL; + } + + msm_hdmi_audio_set_sample_rate(hdmi, rate); + msm_hdmi_audio_info_setup(hdmi, 1, chan, channel_allocation, + level_shift, down_mix); + + return 0; +} + +static void msm_hdmi_audio_shutdown(struct device *dev) +{ + struct hdmi *hdmi = dev_get_drvdata(dev); + + msm_hdmi_audio_info_setup(hdmi, 0, 0, 0, 0, 0); +} + +static const struct hdmi_codec_ops msm_hdmi_audio_codec_ops = { + .hw_params = msm_hdmi_audio_hw_params, + .audio_shutdown = msm_hdmi_audio_shutdown, +}; + +static struct hdmi_codec_pdata codec_data = { + .ops = &msm_hdmi_audio_codec_ops, + .max_i2s_channels = 8, + .i2s = 1, +}; + +static int msm_hdmi_register_audio_driver(struct hdmi *hdmi, struct device *dev) +{ + hdmi->audio_pdev = platform_device_register_data(dev, + HDMI_CODEC_DRV_NAME, + PLATFORM_DEVID_AUTO, + &codec_data, + sizeof(codec_data)); + if (IS_ERR(hdmi->audio_pdev)) + return PTR_ERR(hdmi->audio_pdev); + + return 0; +} + static int msm_hdmi_bind(struct device *dev, struct device *master, void *data) { struct drm_device *drm = dev_get_drvdata(master); @@ -441,7 +550,7 @@ static int msm_hdmi_bind(struct device *dev, struct device *master, void *data) static struct hdmi_platform_config *hdmi_cfg; struct hdmi *hdmi; struct device_node *of_node = dev->of_node; - int i; + int i, err; hdmi_cfg = (struct hdmi_platform_config *) of_device_get_match_data(dev); @@ -468,6 +577,12 @@ static int msm_hdmi_bind(struct device *dev, struct device *master, void *data) return PTR_ERR(hdmi); priv->hdmi = hdmi; + err = msm_hdmi_register_audio_driver(hdmi, dev); + if (err) { + DRM_ERROR("Failed to attach an audio codec %d\n", err); + hdmi->audio_pdev = NULL; + } + return 0; } @@ -477,6 +592,9 @@ static void msm_hdmi_unbind(struct device *dev, struct device *master, struct drm_device *drm = dev_get_drvdata(master); struct msm_drm_private *priv = drm->dev_private; if (priv->hdmi) { + if (priv->hdmi->audio_pdev) + platform_device_unregister(priv->hdmi->audio_pdev); + msm_hdmi_destroy(priv->hdmi); priv->hdmi = NULL; } diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h index bc7ba0b..accc9a6 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.h +++ b/drivers/gpu/drm/msm/hdmi/hdmi.h @@ -50,6 +50,7 @@ struct hdmi_hdcp_ctrl; struct hdmi { struct drm_device *dev; struct platform_device *pdev; + struct platform_device *audio_pdev; const struct hdmi_platform_config *config; @@ -210,6 +211,19 @@ static inline int msm_hdmi_pll_8996_init(struct platform_device *pdev) /* * audio: */ +/* Supported HDMI Audio channels and rates */ +#define MSM_HDMI_AUDIO_CHANNEL_2 0 +#define MSM_HDMI_AUDIO_CHANNEL_4 1 +#define MSM_HDMI_AUDIO_CHANNEL_6 2 +#define MSM_HDMI_AUDIO_CHANNEL_8 3 + +#define HDMI_SAMPLE_RATE_32KHZ 0 +#define HDMI_SAMPLE_RATE_44_1KHZ 1 +#define HDMI_SAMPLE_RATE_48KHZ 2 +#define HDMI_SAMPLE_RATE_88_2KHZ 3 +#define HDMI_SAMPLE_RATE_96KHZ 4 +#define HDMI_SAMPLE_RATE_176_4KHZ 5 +#define HDMI_SAMPLE_RATE_192KHZ 6 int msm_hdmi_audio_update(struct hdmi *hdmi); int msm_hdmi_audio_info_setup(struct hdmi *hdmi, bool enabled, -- 2.8.3

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[git pull] drm fixes for v4.7-rc3
by Dave Airlie 10 Jun '16

10 Jun '16

Hi Linus, This weeks instalment of fixes: amdgpu: Lots of memory leak and firmware leak fixes. nouveau: Collection of display fixes, KASAN fixes. vc4: vblank/pageflipping fixes fsl-dcu: Regmap cache fix omap: Unused variable warning fix. Nothing too surprising so far. Dave. The following changes since commit af8c34ce6ae32addda3788d54a7e340cad22516b: Linux 4.7-rc2 (2016-06-05 14:31:26 -0700) are available in the git repository at: git://people.freedesktop.org/~airlied/linux tags/drm-fixes-for-v4.7-rc3 for you to fetch changes up to 7ff6977be8e3c7e6f5ae1ee56bc1535c5ca653b1: Merge branch 'fixes-for-v4.7-rc3' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes (2016-06-10 12:17:46 +1000) ---------------------------------------------------------------- Alex Deucher (1): drm/amdgpu: fix fw leak in non-powerplay dpm code Ben Skeggs (7): drm/nouveau/bios/disp: fix handling of "match any protocol" entries drm/nouveau/ltc/gm107-: fix typo in the address of NV_PLTCG_LTC0_LTS0_INTR drm/nouveau/gr/gf100-: update sm error decoding from gk20a nvgpu headers drm/nouveau/fbcon: fix out-of-bounds memory accesses drm/nouveau/core: swap the order of imem/fb drm/nouveau/disp/sor/gf119: both links use the same training register drm/nouveau/disp/sor/gm107: training pattern registers are like gm200 Chunming Zhou (1): drm/amdgpu: add pipeline sync while vmid switch in same ctx Dave Airlie (6): Merge branch 'linux-4.7' of git://github.com/skeggsb/linux into drm-fixes Merge tag 'drm-vc4-fixes-2016-06-06' of github.com:anholt/linux into drm-fixes Merge branch 'msm-fixes-4.7-rc3' of git://people.freedesktop.org/~robclark/linux into drm-fixes Merge branch 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-fixes drm/amdgpu: fix warning with powerplay disabled. Merge branch 'fixes-for-v4.7-rc3' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes Herve Jourdain (1): drm/vc4: Fix ioctl permissions for render nodes. Ken Wang (1): drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB enabled Mario Kleiner (3): drm/vc4: Fix get_vblank_counter with proper no-op for Linux 4.4+ drm/vc4: Fix drm_vblank_put/get imbalance in page flip path. drm/vc4: Make pageflip completion handling more robust. Monk Liu (22): drm/amdgpu: add late_fini for ip_funcs drm/amdgpu: impl late_fini for amdgpu_pp_ip drm/amdgpu: fix pplib finish bug drm/amdgpu: clear SA bo when created drm/amdgpu: init more register for sdma drm/amdgpu: modify sdma start sequence drm/amdgpu: vBIOS post only call when mem_size zero drm/amdgpu: fix mem leak in smumgr drm/amdgpu: fix mem leak in pplib/hwmgr drm/amdgpu: fix mem leak in atombios drm/amdgpu: fix memleak in pptable_init drm/amdgpu: fix missing free wb for cond_exec drm/amdgpu: fix gfx8 ucode mem leak drm/amdgpu: fix gfx 7 ucode mem leak drm/amdgpu: fix uvd fini mem leak drm/amdgpu: fix sdma3 ucode mem leak drm/amdgpu: fix sdma24 ucode mem leak drm/amdgpu: fix cik sdma ucode memleak drm/amdgpu: fix fiji smu fini mem leak drm/amdgpu: fix tonga smu_fini mem leak drm/amdgpu: add release firmware for cgs drm/amdgpu: fix smu ucode memleak (v2) Rex Zhu (3): drm/admgpu/powerplay/polaris: fix powertune table upload drm/amd/powerplay: fix bug visit array out of bounds drm/amd/powerplay: delete useless code as pptable changed in vbios. Rob Clark (3): drm/msm: deal with exhausted vmap space better drm/msm: fix some crashes in submit fail path drm/msm: fix potential submit error path issue Robert Foss (1): drm/vc4: Return -EBUSY if there's already a pending flip event. Stefan Agner (1): drm/fsl-dcu: use flat regmap cache Tomi Valkeinen (1): drm/omap: fix unused variable warning in dsi & hdmi drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 12 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 9 +++- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 24 +++++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 19 ++++---- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +-- drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 3 ++ drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 22 ++++++++- drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 5 ++ drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 17 +++++++ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 28 ++++++++++- drivers/gpu/drm/amd/amdgpu/iceland_dpm.c | 5 ++ drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 20 +++++++- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 +++++++++-- drivers/gpu/drm/amd/amdgpu/tonga_dpm.c | 5 ++ drivers/gpu/drm/amd/include/amd_shared.h | 1 + drivers/gpu/drm/amd/include/cgs_common.h | 6 +++ drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8 +++- drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c | 3 -- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 9 +++- .../drm/amd/powerplay/hwmgr/polaris10_powertune.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 21 --------- .../amd/powerplay/hwmgr/tonga_processpptables.c | 54 ++++++++++------------ drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 +++ .../drm/amd/powerplay/smumgr/polaris10_smumgr.c | 1 + drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 1 + .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 7 +++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 3 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/msm_fbdev.c | 4 ++ drivers/gpu/drm/msm/msm_gem.c | 2 + drivers/gpu/drm/msm/msm_gem_submit.c | 7 +++ drivers/gpu/drm/msm/msm_rd.c | 3 ++ drivers/gpu/drm/msm/msm_ringbuffer.c | 4 ++ drivers/gpu/drm/nouveau/include/nvkm/core/device.h | 2 +- .../drm/nouveau/include/nvkm/subdev/bios/disp.h | 5 +- drivers/gpu/drm/nouveau/nouveau_fbcon.c | 1 + drivers/gpu/drm/nouveau/nv04_fbcon.c | 7 +-- drivers/gpu/drm/nouveau/nv50_fbcon.c | 6 +-- drivers/gpu/drm/nouveau/nvc0_fbcon.c | 6 +-- drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild | 1 + drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c | 13 ++---- drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c | 2 +- drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c | 12 ++--- drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h | 9 +++- .../gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 5 +- .../gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c | 53 +++++++++++++++++++++ .../gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c | 15 +----- drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 37 +++++++++++---- drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c | 8 ++-- drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c | 6 +-- drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c | 2 +- drivers/gpu/drm/omapdrm/dss/dsi.c | 1 - drivers/gpu/drm/omapdrm/dss/hdmi5.c | 1 - drivers/gpu/drm/vc4/vc4_crtc.c | 32 +++++++++---- drivers/gpu/drm/vc4/vc4_drv.c | 14 +++--- drivers/gpu/drm/vc4/vc4_kms.c | 16 +++++-- drivers/gpu/drm/vc4/vc4_regs.h | 4 ++ 62 files changed, 439 insertions(+), 185 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c

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[PATCH v2 0/9] drm/fb-helper: Deferred setup support
by Thierry Reding 09 Jun '16

09 Jun '16

From: Thierry Reding <treding(a)nvidia.com> This set of patches adds support for deferring FB helper setup, which is useful to obtain a sane configuration even when no outputs are available during probe. One example is HDMI, where fbdev will currently fallback to a 1024x786 resolution if no monitor is connected, and will then forever stay that way. With these patches, the FB helpers will take note that it doesn't make sense to setup fbdev yet and will defer until a monitor is connected, at which point the preferred mode will be selected. Thierry Changes in v2: - now with locking Thierry Reding (9): drm/fb-helper: Cleanup checkpatch warnings drm/fb-helper: Reshuffle code for subsequent patches drm/fb-helper: Improve code readability drm/fb-helper: Push down modeset lock into FB helpers drm/fb-helper: Add top-level lock drm/fb-helper: Support deferred setup drm/atmel-hlcdc: Remove custom FB helper deferred setup drm/exynos: Remove custom FB helper deferred setup drm/hisilicon: Remove custom FB helper deferred setup drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 26 +-- drivers/gpu/drm/drm_fb_helper.c | 217 +++++++++++++++++------- drivers/gpu/drm/exynos/exynos_drm_drv.c | 8 +- drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 2 - drivers/gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 22 +-- drivers/gpu/drm/i915/intel_dp_mst.c | 4 - drivers/gpu/drm/radeon/radeon_dp_mst.c | 7 - include/drm/drm_fb_helper.h | 26 +++ 8 files changed, 217 insertions(+), 95 deletions(-) -- 2.8.3

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[pull] drm/msm: fixes for 4.7
by Rob Clark 09 Jun '16

09 Jun '16

The following changes since commit ab3ab68493aaac6fea4ad1bb597def9f48f41c71: drm/omap: fix unused variable warning. (2016-06-03 14:39:41 +1000) are available in the git repository at: git://people.freedesktop.org/~robclark/linux msm-fixes-4.7-rc3 for you to fetch changes up to a9e26cab40ecfd4a0d718f22fa30db4dd1edbf60: drm/msm: fix potential submit error path issue (2016-06-04 14:45:50 -0400) ---------------------------------------------------------------- Rob Clark (3): drm/msm: deal with exhausted vmap space better drm/msm: fix some crashes in submit fail path drm/msm: fix potential submit error path issue drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/msm_fbdev.c | 4 ++++ drivers/gpu/drm/msm/msm_gem.c | 2 ++ drivers/gpu/drm/msm/msm_gem_submit.c | 7 +++++++ drivers/gpu/drm/msm/msm_rd.c | 3 +++ drivers/gpu/drm/msm/msm_ringbuffer.c | 4 ++++ 6 files changed, 21 insertions(+), 1 deletion(-)

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274ad65c9d02 ("drm/radeon: hard reset r600 and newer GPU when hibernating.")
by Borislav Petkov 09 Jun '16

09 Jun '16

Hi, commit in $Subject breaks suspend to disk on my box here. Reverting it ontop of 4.7-rc2 fixes the problem. DRM-specific messages in dmesg are: [ 6.837698] [drm] radeon kernel modesetting enabled. [ 6.871372] [drm] initializing kernel modesetting (RV635 0x1002:0x9598 0x1043:0x01DA 0x00). [ 6.871387] [drm] register mmio base: 0xFEA20000 [ 6.871388] [drm] register mmio size: 65536 [ 6.871497] [drm] Detected VRAM RAM=512M, BAR=256M [ 6.871498] [drm] RAM width 128bits DDR [ 6.875602] [drm] radeon: 512M of VRAM memory ready [ 6.875603] [drm] radeon: 512M of GTT memory ready. [ 6.875619] [drm] Loading RV635 Microcode [ 6.888041] [drm] Internal thermal controller without fan control [ 6.888100] [drm] radeon: power management initialized [ 6.892400] [drm] GART: num cpu pages 131072, num gpu pages 131072 [ 6.893273] [drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 [ 6.920032] [drm] PCIE GART of 512M enabled (table at 0x0000000000142000). [ 6.920232] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 6.920232] [drm] Driver supports precise vblank timestamp query. [ 6.920290] [drm] radeon: irq initialized. [ 6.951284] [drm] ring test on 0 succeeded in 0 usecs [ 7.125955] [drm] ring test on 5 succeeded in 1 usecs [ 7.131079] [drm] UVD initialized successfully. [ 7.135817] [drm] ib test on ring 0 succeeded in 0 usecs [ 7.789092] [drm] ib test on ring 5 succeeded [ 7.794502] [drm] Radeon Display Connectors [ 7.798817] [drm] Connector 0: [ 7.801963] [drm] DVI-I-1 [ 7.804825] [drm] HPD1 [ 7.807430] [drm] DDC: 0x7e50 0x7e50 0x7e54 0x7e54 0x7e58 0x7e58 0x7e5c 0x7e5c [ 7.814942] [drm] Encoders: [ 7.817985] [drm] DFP1: INTERNAL_UNIPHY [ 7.822230] [drm] CRT2: INTERNAL_KLDSCP_DAC2 [ 7.826913] [drm] Connector 1: [ 7.830033] [drm] DIN-1 [ 7.832715] [drm] Encoders: [ 7.835751] [drm] TV1: INTERNAL_KLDSCP_DAC2 [ 7.840349] [drm] Connector 2: [ 7.843466] [drm] DVI-I-2 [ 7.846326] [drm] HPD2 [ 7.848926] [drm] DDC: 0x7e40 0x7e40 0x7e44 0x7e44 0x7e48 0x7e48 0x7e4c 0x7e4c [ 7.856437] [drm] Encoders: [ 7.859479] [drm] CRT1: INTERNAL_KLDSCP_DAC1 [ 7.864162] [drm] DFP2: INTERNAL_KLDSCP_LVTMA [ 7.941480] [drm] fb mappable at 0xC0243000 [ 7.945733] [drm] vram apper at 0xC0000000 [ 7.949897] [drm] size 9216000 [ 7.953019] [drm] fb depth is 24 [ 7.956327] [drm] pitch is 7680 [ 7.959930] fbcon: radeondrmfb (fb0) is primary device [ 8.028816] radeon 0000:01:00.0: fb0: radeondrmfb frame buffer device [ 8.045087] [drm] Initialized radeon 2.45.0 20080528 for 0000:01:00.0 on minor 0 [ 28.158851] [drm] enabling PCIE gen 2 link speeds, disable with radeon.pcie_gen2=0 [ 28.160612] [drm] PCIE GART of 512M enabled (table at 0x0000000000142000). [ 28.191669] [drm] ring test on 0 succeeded in 1 usecs [ 28.366319] [drm] ring test on 5 succeeded in 1 usecs [ 28.366323] [drm] UVD initialized successfully. [ 28.366338] [drm] ib test on ring 0 succeeded in 0 usecs [ 28.604362] ata1.00: supports DRM functions and may not be fully accessible [ 28.604405] ata2.00: supports DRM functions and may not be fully accessible [ 28.609305] ata1.00: supports DRM functions and may not be fully accessible [ 28.609410] ata2.00: supports DRM functions and may not be fully accessible [ 29.014440] [drm] ib test on ring 5 succeeded -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply.

5 17

[pull] amdgpu drm-fixes-4.7
by Alex Deucher 09 Jun '16

09 Jun '16

Hi Dave, Mostly memory leak and firmware leak fixes for amdgpu. A bit bigger than usual since this is several weeks worth of fixes. The following changes since commit 170fba306af798bc1249b6ba925cf9031f3b3806: Merge tag 'drm-vc4-fixes-2016-06-06' of github.com:anholt/linux into drm-fixes (2016-06-09 12:32:09 +1000) are available in the git repository at: git://people.freedesktop.org/~agd5f/linux drm-fixes-4.7 for you to fetch changes up to 5f96ddb4607382528ef2eb23b49ce1856fdb316d: drm/amd/powerplay: delete useless code as pptable changed in vbios. (2016-06-09 10:49:16 -0400) ---------------------------------------------------------------- Alex Deucher (1): drm/amdgpu: fix fw leak in non-powerplay dpm code Chunming Zhou (1): drm/amdgpu: add pipeline sync while vmid switch in same ctx Ken Wang (1): drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB enabled Monk Liu (22): drm/amdgpu: add late_fini for ip_funcs drm/amdgpu: impl late_fini for amdgpu_pp_ip drm/amdgpu: fix pplib finish bug drm/amdgpu: clear SA bo when created drm/amdgpu: init more register for sdma drm/amdgpu: modify sdma start sequence drm/amdgpu: vBIOS post only call when mem_size zero drm/amdgpu: fix mem leak in smumgr drm/amdgpu: fix mem leak in pplib/hwmgr drm/amdgpu: fix mem leak in atombios drm/amdgpu: fix memleak in pptable_init drm/amdgpu: fix missing free wb for cond_exec drm/amdgpu: fix gfx8 ucode mem leak drm/amdgpu: fix gfx 7 ucode mem leak drm/amdgpu: fix uvd fini mem leak drm/amdgpu: fix sdma3 ucode mem leak drm/amdgpu: fix sdma24 ucode mem leak drm/amdgpu: fix cik sdma ucode memleak drm/amdgpu: fix fiji smu fini mem leak drm/amdgpu: fix tonga smu_fini mem leak drm/amdgpu: add release firmware for cgs drm/amdgpu: fix smu ucode memleak (v2) Rex Zhu (3): drm/admgpu/powerplay/polaris: fix powertune table upload drm/amd/powerplay: fix bug visit array out of bounds drm/amd/powerplay: delete useless code as pptable changed in vbios. drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 12 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 9 +++- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 24 +++++++--- drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 19 ++++---- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +-- drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 3 ++ drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 22 ++++++++- drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 5 ++ drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 17 +++++++ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 28 ++++++++++- drivers/gpu/drm/amd/amdgpu/iceland_dpm.c | 5 ++ drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 20 +++++++- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 27 +++++++++-- drivers/gpu/drm/amd/amdgpu/tonga_dpm.c | 5 ++ drivers/gpu/drm/amd/include/amd_shared.h | 1 + drivers/gpu/drm/amd/include/cgs_common.h | 6 +++ drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8 +++- drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c | 3 -- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 9 +++- .../drm/amd/powerplay/hwmgr/polaris10_powertune.c | 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c | 21 --------- .../amd/powerplay/hwmgr/tonga_processpptables.c | 54 ++++++++++------------ drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 +++ .../drm/amd/powerplay/smumgr/polaris10_smumgr.c | 1 + drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 1 + .../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 7 +++ 31 files changed, 249 insertions(+), 92 deletions(-)

1 0

[PATCH 1/2] drm/amd/amdgpu : Refine tracepoints to track more information
by Alex Deucher 09 Jun '16

09 Jun '16

From: David Mao <david.mao(a)amd.com> - adding memory type, prefered heap, allowed heap, and host visible information to the amdgpu_bo_create tracepoint. - adding bo size to the amdgpu_bo_list_set tracepoint. Signed-off-by: David Mao <David.Mao(a)amd.com> Reviewed-by: Christian König <christian.koenig(a)amd.com> Reviewed-by: Chunming Zhou <david1.zhou(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h index ecd08f8..e499221 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h @@ -55,13 +55,24 @@ TRACE_EVENT(amdgpu_bo_create, TP_STRUCT__entry( __field(struct amdgpu_bo *, bo) __field(u32, pages) + __field(u32, type) + __field(u32, prefer) + __field(u32, allow) + __field(u32, visible) ), TP_fast_assign( __entry->bo = bo; __entry->pages = bo->tbo.num_pages; + __entry->type = bo->tbo.mem.mem_type; + __entry->prefer = bo->prefered_domains; + __entry->allow = bo->allowed_domains; + __entry->visible = bo->flags; ), - TP_printk("bo=%p, pages=%u", __entry->bo, __entry->pages) + + TP_printk("bo=%p,pages=%u,type=%d,prefered=%d,allowed=%d,visible=%d", + __entry->bo, __entry->pages, __entry->type, + __entry->prefer, __entry->allow, __entry->visible) ); TRACE_EVENT(amdgpu_cs, @@ -282,13 +293,18 @@ TRACE_EVENT(amdgpu_bo_list_set, TP_STRUCT__entry( __field(struct amdgpu_bo_list *, list) __field(struct amdgpu_bo *, bo) + __field(u64, bo_size) ), TP_fast_assign( __entry->list = list; __entry->bo = bo; + __entry->bo_size = amdgpu_bo_size(bo); ), - TP_printk("list=%p, bo=%p", __entry->list, __entry->bo) + TP_printk("list=%p, bo=%p, bo_size = %Ld", + __entry->list, + __entry->bo, + __entry->bo_size) ); #endif -- 2.5.5

1 1

[PATCH] drm/amdgpu/uvd6: De-numberify startup
by Alex Deucher 09 Jun '16

09 Jun '16

From: Tom St Denis <tom.stdenis(a)amd.com> To make the code more legible various numerical constants have been changed to their #define'ed MASKs. Signed-off-by: Tom St Denis <tom.stdenis(a)amd.com> Reviewed-by: Alex Deucher <alexander.deucher(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 39 ++++++++++++++++++++++------------- 1 file changed, 25 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index c9929d6..670413f 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c @@ -385,8 +385,8 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) uint32_t mp_swap_cntl; int i, j, r; - /*disable DPG */ - WREG32_P(mmUVD_POWER_STATUS, 0, ~(1 << 2)); + /* disable DPG */ + WREG32_P(mmUVD_POWER_STATUS, 0, ~UVD_POWER_STATUS__UVD_PG_MODE_MASK); /* disable byte swapping */ lmi_swap_cntl = 0; @@ -405,17 +405,21 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) } /* disable interupt */ - WREG32_P(mmUVD_MASTINT_EN, 0, ~(1 << 1)); + WREG32_P(mmUVD_MASTINT_EN, 0, ~UVD_MASTINT_EN__VCPU_EN_MASK); /* stall UMC and register bus before resetting VCPU */ - WREG32_P(mmUVD_LMI_CTRL2, 1 << 8, ~(1 << 8)); + WREG32_P(mmUVD_LMI_CTRL2, UVD_LMI_CTRL2__STALL_ARB_UMC_MASK, ~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK); mdelay(1); /* put LMI, VCPU, RBC etc... into reset */ - WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__LMI_SOFT_RESET_MASK | - UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK | UVD_SOFT_RESET__LBSI_SOFT_RESET_MASK | - UVD_SOFT_RESET__RBC_SOFT_RESET_MASK | UVD_SOFT_RESET__CSM_SOFT_RESET_MASK | - UVD_SOFT_RESET__CXW_SOFT_RESET_MASK | UVD_SOFT_RESET__TAP_SOFT_RESET_MASK | + WREG32(mmUVD_SOFT_RESET, + UVD_SOFT_RESET__LMI_SOFT_RESET_MASK | + UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK | + UVD_SOFT_RESET__LBSI_SOFT_RESET_MASK | + UVD_SOFT_RESET__RBC_SOFT_RESET_MASK | + UVD_SOFT_RESET__CSM_SOFT_RESET_MASK | + UVD_SOFT_RESET__CXW_SOFT_RESET_MASK | + UVD_SOFT_RESET__TAP_SOFT_RESET_MASK | UVD_SOFT_RESET__LMI_UMC_SOFT_RESET_MASK); mdelay(5); @@ -424,8 +428,13 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) mdelay(5); /* initialize UVD memory controller */ - WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) | - (1 << 21) | (1 << 9) | (1 << 20)); + WREG32(mmUVD_LMI_CTRL, + (0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) | + UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK | + UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | + UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK | + UVD_LMI_CTRL__REQ_MODE_MASK | + UVD_LMI_CTRL__DISABLE_ON_FWV_FAIL_MASK); #ifdef __BIG_ENDIAN /* swap (8 in 32) RB and IB */ @@ -447,10 +456,10 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) mdelay(5); /* enable VCPU clock */ - WREG32(mmUVD_VCPU_CNTL, 1 << 9); + WREG32(mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); /* enable UMC */ - WREG32_P(mmUVD_LMI_CTRL2, 0, ~(1 << 8)); + WREG32_P(mmUVD_LMI_CTRL2, 0, ~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK); /* boot up the VCPU */ WREG32(mmUVD_SOFT_RESET, 0); @@ -484,10 +493,12 @@ static int uvd_v6_0_start(struct amdgpu_device *adev) return r; } /* enable master interrupt */ - WREG32_P(mmUVD_MASTINT_EN, 3 << 1, ~(3 << 1)); + WREG32_P(mmUVD_MASTINT_EN, + (UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK), + ~(UVD_MASTINT_EN__VCPU_EN_MASK|UVD_MASTINT_EN__SYS_EN_MASK)); /* clear the bit 4 of UVD_STATUS */ - WREG32_P(mmUVD_STATUS, 0, ~(2 << 1)); + WREG32_P(mmUVD_STATUS, 0, ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); rb_bufsz = order_base_2(ring->ring_size); tmp = 0; -- 2.5.5

1 0

[PATCH 1/3] drm/amdgpu: Change some variable names to make code easier understood
by Alex Deucher 09 Jun '16

09 Jun '16

From: Alex Xie <AlexBin.Xie(a)amd.com> Add comment to describe some variables otherwise. Signed-off-by: Alex Xie <AlexBin.Xie(a)amd.com> Reviewed-by: Christian König <christian.koenig(a)amd.com> Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index 48d5ad18..22fa4f8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -748,7 +748,7 @@ static void amdgpu_vm_frag_ptes(struct amdgpu_device *adev, * @vm: requested vm * @start: start of GPU address range * @end: end of GPU address range - * @dst: destination address to map to + * @dst: destination address to map to, the next dst inside the function * @flags: mapping flags * * Update the page tables in the range @start - @end. @@ -762,43 +762,43 @@ static void amdgpu_vm_update_ptes(struct amdgpu_device *adev, { const uint64_t mask = AMDGPU_VM_PTE_COUNT - 1; - uint64_t last_pe_start = ~0, last_pe_end = ~0, last_dst = ~0; - uint64_t addr; + uint64_t cur_pe_start = ~0, cur_pe_end = ~0, cur_dst = ~0; + uint64_t addr; /* next GPU address to be updated */ /* walk over the address space and update the page tables */ for (addr = start; addr < end; ) { uint64_t pt_idx = addr >> amdgpu_vm_block_size; struct amdgpu_bo *pt = vm->page_tables[pt_idx].entry.robj; - unsigned nptes; - uint64_t pe_start; + unsigned nptes; /* next number of ptes to be updated */ + uint64_t next_pe_start; if ((addr & ~mask) == (end & ~mask)) nptes = end - addr; else nptes = AMDGPU_VM_PTE_COUNT - (addr & mask); - pe_start = amdgpu_bo_gpu_offset(pt); - pe_start += (addr & mask) * 8; + next_pe_start = amdgpu_bo_gpu_offset(pt); + next_pe_start += (addr & mask) * 8; - if (last_pe_end != pe_start) { + if (cur_pe_end != next_pe_start) { amdgpu_vm_frag_ptes(adev, vm_update_params, - last_pe_start, last_pe_end, - last_dst, flags); + cur_pe_start, cur_pe_end, + cur_dst, flags); - last_pe_start = pe_start; - last_pe_end = pe_start + 8 * nptes; - last_dst = dst; + cur_pe_start = next_pe_start; + cur_pe_end = next_pe_start + 8 * nptes; + cur_dst = dst; } else { - last_pe_end += 8 * nptes; + cur_pe_end += 8 * nptes; } addr += nptes; dst += nptes * AMDGPU_GPU_PAGE_SIZE; } - amdgpu_vm_frag_ptes(adev, vm_update_params, last_pe_start, - last_pe_end, last_dst, flags); + amdgpu_vm_frag_ptes(adev, vm_update_params, cur_pe_start, + cur_pe_end, cur_dst, flags); } /** -- 2.5.5

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dri-devel June 2016