dri-devel January 2017

dri-devel@lists.freedesktop.org

240 participants
1484 discussions

linux-next: manual merge of the drm-misc tree with the drm-intel tree
by Stephen Rothwell 03 Jan '17

03 Jan '17

Hi all, Today's linux-next merge of the drm-misc tree got a conflict in: drivers/gpu/drm/i915/i915_vma.c between commit: 7d1d9aea3ee0 ("drm/i915: Tidy i915_gem_valid_gtt_space()") from the drm-intel tree and commit: 3f85fb3462dc ("drm: Wrap drm_mm_node.hole_follows") from the drm-misc tree. I fixed it up (see below) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be mentioned to your upstream maintainer … [View More]

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linux-next: manual merge of the drm-misc tree with the drm-intel tree
by Stephen Rothwell 03 Jan '17

03 Jan '17

Hi all, Today's linux-next merge of the drm-misc tree got a conflict in: drivers/gpu/drm/i915/i915_gem_evict.c between commit: 49d73912cbfc ("drm/i915: Convert vm->dev backpointer to vm->i915") from the drm-intel tree and commit: 9a71e277888b ("drm: Extract struct drm_mm_scan from struct drm_mm") from the drm-misc tree. I fixed it up (see below) and can carry the fix as necessary. This is now fixed as far as linux-next is concerned, but any non trivial conflicts should be … [View More]

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[PATCH] drm/armada: Fix compile fail
by Daniel Vetter 02 Jan '17

02 Jan '17

I reported the include issue for tracepoints a while ago, but nothing seems to have happened. Now it bit us, since the drm_mm_print conversion was broken for armada. Fix them both. Reported-by: kbuild test robot <fengguang.wu(a)intel.com> Fixes: b5c3714fe878 ("drm/mm: Convert to drm_printer") Cc: Russell King <rmk+kernel(a)armlinux.org.uk> Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> --- drivers/gpu/drm/armada/… [View More]

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[Bug 89447] [bisected] [radeonsi+wine_d3dadapter+Bioshock] GPU lockup 8 minutes after start
by bugzilla-daemon＠freedesktop.org 02 Jan '17

02 Jan '17

https://bugs.freedesktop.org/show_bug.cgi?id=89447 Bug ID: 89447 Summary: [bisected] [radeonsi+wine_d3dadapter+Bioshock] GPU lockup 8 minutes after start Product: Mesa Version: git Hardware: x86 (IA32) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org … [View More]

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[Bug 98761] [regression][radeonsi][polaris]"radeonsi: set IF_THRESHOLD to 3" breaks Wither2's ground
by bugzilla-daemon＠freedesktop.org 02 Jan '17

02 Jan '17

https://bugs.freedesktop.org/show_bug.cgi?id=98761 Bug ID: 98761 Summary: [regression][radeonsi][polaris]"radeonsi: set IF_THRESHOLD to 3" breaks Wither2's ground Product: Mesa Version: git Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org … [View More]Reporter: arek.rusi(a)gmail.com QA Contact: dri-devel(a)lists.freedesktop.org Created attachment 128044 --> https://bugs.freedesktop.org/attachment.cgi?id=128044&action=edit ground looks weird mesa/llvm git/trunk kernel 4.8.x & drm-next-4.10-wip this is happend on polaris(rx470) verde works corectly (for radeon drv, amdgpu not tested yet) bisected: 74e39de9324d2d2333cda6adca50ae2a3fc36de2 is the first bad commit commit 74e39de9324d2d2333cda6adca50ae2a3fc36de2 Author: Marek Olšák <marek.olsak(a)amd.com> Date: Fri Oct 28 23:08:50 2016 +0200 radeonsi: set IF_THRESHOLD to 3 Piglit regressions (radeonsi or LLVM bugs, they pass on softpipe): - glsl-1.10/execution/variable-indexing/vs-output-array-vec3-index-wr - glsl-1.10/execution/variable-indexing/vs-output-array-vec4-index-wr - glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-col-row-wr - glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-row-wr Totals: SGPRS: 1132185 -> 1168801 (3.23 %) VGPRS: 907856 -> 906204 (-0.18 %) Spilled SGPRs: 2011 -> 2425 (20.59 %) Spilled VGPRs: 368 -> 96 (-73.91 %) Scratch VGPRs: 1344 -> 1060 (-21.13 %) dwords per thread Code Size: 35916164 -> 35705372 (-0.59 %) bytes LDS: 767 -> 767 (0.00 %) blocks Max Waves: 194010 -> 194921 (0.47 %) Wait states: 0 -> 0 (0.00 %) Before: VGPR SPILLING APPS Shaders SpillVGPR ScratchVGPR alien_isolation 2938 38 40 bioshock-infinite 1769 245 732 dirt-showdown 548 85 72 f1-2015 776 0 320 ue4_lightroom_inter.. 74 0 180 After: VGPR SPILLING APPS Shaders SpillVGPR ScratchVGPR alien_isolation 2938 38 40 bioshock-infinite 1769 0 480 dirt-showdown 548 58 40 f1-2015 776 0 320 ue4_lightroom_inter.. 74 0 180 Bioshock and DiRT benefit. If I set IF_THRESHOLD=4, tesseract starts spilling VGPRs Reviewed-by: Nicolai Hähnle <nicolai.haehnle(a)amd.com> :040000 040000 2c773601e2956578e8da4a6031cb02837255b953 7d5f7c3faebe4a11631e70bde258d78fa7357008 M src -- You are receiving this mail because: You are the assignee for the bug. [View Less]

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HDMI Audio screwed up w/ recent kernels
by James Cloos 02 Jan '17

02 Jan '17

I haven't paid as close attention to Xorg issues sine the stroke last year, and I hadn't needed to reboot the box in the living room in several months. When I did need to, I found that hdmi audio was unlistenable. It sounded like it was mixed witht white noise. If I boot vmlinuz-3.19.0 is works fine. I had compiled 4.1.0 and 4.5.0, as well as its current default kernel, 4.9.0 (all from Linus' git). All of those 4. kernels show the crappy audio. In 4.9 I then tried switching to amdgpu. … [View More]

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[PATCH] drm/edid: constify edid quirk list
by Jani Nikula 02 Jan '17

02 Jan '17

No reason not to be const. Signed-off-by: Jani Nikula <jani.nikula(a)intel.com> --- drivers/gpu/drm/drm_edid.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 67d6a73731d8..4ff04aa84dd0 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -91,7 +91,7 @@ struct detailed_mode_closure { #define LEVEL_GTF2 2 #define LEVEL_CVT 3 -static struct edid_quirk { +static const struct … [View More]

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[PATCH v3 0/2] Add support for the S6E3HA2 panel on TM2 board
by Hoegeun Kwon 02 Jan '17

02 Jan '17

Purpose of this patch is add support for S6E3HA2 AMOLED panel on the TM2 board. The first patch adds support for S6E3HA2 panel device tree document and driver, the second patch add support for S6E3HA2 panel device tree. Changes for V3: - In the DT binding document, made it clearly that the panel is a child node of dsi. - Fix reset-gpio active from high to low. - Is the OF graph saying related to [1]? Althogh the panel is a child of dsi, I think OF graph necessary. because if a remote-… [View More]

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[RFC v2] drm: Parse HDMI 2.0 YCbCr 4:2:0 VDB and VCB
by Jose Abreu 02 Jan '17

02 Jan '17

HDMI 2.0 introduces a new sampling mode called YCbCr 4:2:0. According to the spec the EDID may contain two blocks that signal this sampling mode: - YCbCr 4:2:0 Video Data Block - YCbCr 4:2:0 Video Capability Map Data Block The video data block contains the list of vic's were only YCbCr 4:2:0 sampling mode shall be used while the video capability map data block contains a mask were YCbCr 4:2:0 sampling mode may be used. This RFC patch adds support for parsing these two new blocks and … [View More]introduces new flags to signal the drivers if the mode is 4:2:0'only or 4:2:0'able. The reason this is still a RFC is because there is no reference in kernel for this new sampling mode (specially in AVI infoframe part), so, I was hoping to hear some feedback first. Tested in a HDMI 2.0 compliance scenario. Signed-off-by: Jose Abreu <joabreu(a)synopsys.com> Cc: Carlos Palminha <palminha(a)synopsys.com> Cc: Daniel Vetter <daniel.vetter(a)intel.com> Cc: Jani Nikula <jani.nikula(a)linux.intel.com> Cc: Sean Paul <seanpaul(a)chromium.org> Cc: David Airlie <airlied(a)linux.ie> Cc: dri-devel(a)lists.freedesktop.org Cc: linux-kernel(a)vger.kernel.org --- v2: - Correct checkpatch errors drivers/gpu/drm/drm_edid.c | 138 +++++++++++++++++++++++++++++++++++++++++++- drivers/gpu/drm/drm_modes.c | 10 +++- include/uapi/drm/drm_mode.h | 6 ++ 3 files changed, 150 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 67d6a73..caa796c 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -2549,6 +2549,8 @@ static int drm_cvt_modes(struct drm_connector *connector, #define VENDOR_BLOCK 0x03 #define SPEAKER_BLOCK 0x04 #define VIDEO_CAPABILITY_BLOCK 0x07 +#define VIDEO_DATA_BLOCK_420 0x0E +#define VIDEO_CAP_BLOCK_420 0x0F #define EDID_BASIC_AUDIO (1 << 6) #define EDID_CEA_YCRCB444 (1 << 5) #define EDID_CEA_YCRCB422 (1 << 4) @@ -3050,6 +3052,99 @@ static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, return modes; } +static int add_420_mode(struct drm_connector *connector, u8 vic) +{ + struct drm_device *dev = connector->dev; + struct drm_display_mode *newmode; + + if (!drm_valid_cea_vic(vic)) + return 0; + + newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]); + if (!newmode) + return 0; + + newmode->flags |= DRM_MODE_FLAG_420_ONLY; + drm_mode_probed_add(connector, newmode); + + return 1; +} + +static int add_420_vdb_modes(struct drm_connector *connector, const u8 *svds, + u8 svds_len) +{ + int modes = 0, i; + + for (i = 0; i < svds_len; i++) + modes += add_420_mode(connector, svds[i]); + + return modes; +} + +static int add_420_vcb_modes(struct drm_connector *connector, const u8 *svds, + u8 svds_len, const u8 *video_db, u8 video_len) +{ + struct drm_display_mode *newmode = NULL; + int modes = 0, i, j; + + for (i = 0; i < svds_len; i++) { + u8 mask = svds[i]; + + for (j = 0; j < 8; j++) { + if (mask & (1 << j)) { + newmode = drm_display_mode_from_vic_index( + connector, video_db, video_len, + i * 8 + j); + if (newmode) { + newmode->flags |= DRM_MODE_FLAG_420; + drm_mode_probed_add(connector, newmode); + modes++; + } + } + } + } + + return modes; +} + +static int add_420_vcb_modes_all(struct drm_connector *connector, + const u8 *video_db, u8 video_len) +{ + struct drm_display_mode *newmode = NULL; + int modes = 0, i; + + for (i = 0; i < video_len; i++) { + newmode = drm_display_mode_from_vic_index(connector, video_db, + video_len, i); + if (newmode) { + newmode->flags |= DRM_MODE_FLAG_420; + drm_mode_probed_add(connector, newmode); + modes++; + } + } + + return modes; +} + +static int do_hdmi_420_modes(struct drm_connector *connector, const u8 *vdb, + u8 vdb_len, const u8 *vcb, u8 vcb_len, const u8 *video_db, + u8 video_len) +{ + int modes = 0; + + if (vdb && (vdb_len > 1)) /* Add 4:2:0 modes present in EDID */ + modes += add_420_vdb_modes(connector, &vdb[2], vdb_len - 1); + + if (vcb && (vcb_len > 1)) /* Parse bit mask of supported modes */ + modes += add_420_vcb_modes(connector, &vcb[2], vcb_len - 1, + video_db, video_len); + else if (vcb) /* All modes support 4:2:0 mode */ + modes += add_420_vcb_modes_all(connector, video_db, video_len); + + DRM_DEBUG("added %d 4:2:0 modes\n", modes); + return modes; +} + /* * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block * @connector: connector corresponding to the HDMI sink @@ -3206,6 +3301,12 @@ static int add_3d_struct_modes(struct drm_connector *connector, u16 structure, } static int +cea_db_extended_tag(const u8 *db) +{ + return db[1]; +} + +static int cea_revision(const u8 *cea) { return cea[1]; @@ -3239,6 +3340,28 @@ static bool cea_db_is_hdmi_vsdb(const u8 *db) return hdmi_id == HDMI_IEEE_OUI; } +static bool cea_db_is_hdmi_vdb420(const u8 *db) +{ + if (cea_db_tag(db) != VIDEO_CAPABILITY_BLOCK) + return false; + + if (cea_db_extended_tag(db) != VIDEO_DATA_BLOCK_420) + return false; + + return true; +} + +static bool cea_db_is_hdmi_vcb420(const u8 *db) +{ + if (cea_db_tag(db) != VIDEO_CAPABILITY_BLOCK) + return false; + + if (cea_db_extended_tag(db) != VIDEO_CAP_BLOCK_420) + return false; + + return true; +} + #define for_each_cea_db(cea, i, start, end) \ for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) @@ -3246,8 +3369,9 @@ static bool cea_db_is_hdmi_vsdb(const u8 *db) add_cea_modes(struct drm_connector *connector, struct edid *edid) { const u8 *cea = drm_find_cea_extension(edid); - const u8 *db, *hdmi = NULL, *video = NULL; - u8 dbl, hdmi_len, video_len = 0; + const u8 *db, *hdmi = NULL, *video = NULL, *vdb420 = NULL, + *vcb420 = NULL; + u8 dbl, hdmi_len, video_len = 0, vdb420_len = 0, vcb420_len = 0; int modes = 0; if (cea && cea_revision(cea) >= 3) { @@ -3268,6 +3392,12 @@ static bool cea_db_is_hdmi_vsdb(const u8 *db) else if (cea_db_is_hdmi_vsdb(db)) { hdmi = db; hdmi_len = dbl; + } else if (cea_db_is_hdmi_vdb420(db)) { + vdb420 = db; + vdb420_len = dbl; + } else if (cea_db_is_hdmi_vcb420(db)) { + vcb420 = db; + vcb420_len = dbl; } } } @@ -3280,6 +3410,10 @@ static bool cea_db_is_hdmi_vsdb(const u8 *db) modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video, video_len); + if (vdb420 || vcb420) + modes += do_hdmi_420_modes(connector, vdb420, vdb420_len, + vcb420, vcb420_len, video, video_len); + return modes; } diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index ac6a352..53c65f6 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -967,6 +967,10 @@ bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct (mode2->flags & DRM_MODE_FLAG_3D_MASK)) return false; + if ((mode1->flags & DRM_MODE_FLAG_420_MASK) != + (mode2->flags & DRM_MODE_FLAG_420_MASK)) + return false; + return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); } EXPORT_SYMBOL(drm_mode_equal_no_clocks); @@ -985,6 +989,9 @@ bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) { + unsigned int flags_mask = + ~(DRM_MODE_FLAG_3D_MASK | DRM_MODE_FLAG_420_MASK); + if (mode1->hdisplay == mode2->hdisplay && mode1->hsync_start == mode2->hsync_start && mode1->hsync_end == mode2->hsync_end && @@ -995,8 +1002,7 @@ bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, mode1->vsync_end == mode2->vsync_end && mode1->vtotal == mode2->vtotal && mode1->vscan == mode2->vscan && - (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == - (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) + (mode1->flags & flags_mask) == (mode2->flags & flags_mask)) return true; return false; diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index ce7efe2..dc8e285 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h @@ -84,6 +84,12 @@ #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) +/* + * HDMI 2.0 + */ +#define DRM_MODE_FLAG_420_MASK (0x03<<19) +#define DRM_MODE_FLAG_420 (1<<19) +#define DRM_MODE_FLAG_420_ONLY (1<<20) /* Picture aspect ratio options */ #define DRM_MODE_PICTURE_ASPECT_NONE 0 -- 1.9.1 [View Less]

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[PATCH 1/1] drm/amd/amdgpu: get maximum and used UVD handles (v3)
by arindam.nath＠amd.com 02 Jan '17

02 Jan '17

From: Arindam Nath <arindam.nath(a)amd.com> Change History -------------- v3: changes suggested by Christian - Add a check for UVD IP block using AMDGPU_HW_IP_UVD query type. - Add a check for asic_type to be less than CHIP_POLARIS10 since starting Polaris, we support unlimited UVD instances. - Add kerneldoc style comment for amdgpu_uvd_used_handles(). v2: as suggested by Christian - Add a new query AMDGPU_INFO_NUM_HANDLES - Create a helper function to return the number of … [View More]currently used UVD handles. - Modify the logic to count the number of used UVD handles since handles can be freed in non-linear fashion. v1: - User might want to query the maximum number of UVD instances supported by firmware. In addition to that, if there are multiple applications using UVD handles at the same time, he might also want to query the currently used number of handles. For this we add two variables max_handles and used_handles inside drm_amdgpu_info_hw_ip. So now an application (or libdrm) can use AMDGPU_INFO IOCTL with AMDGPU_INFO_HW_IP_INFO query type to get these values. Signed-off-by: Arindam Nath <arindam.nath(a)amd.com> Reviewed-by: Christian König <christian.koenig(a)amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 21 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 25 +++++++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 + include/uapi/drm/amdgpu_drm.h | 9 +++++++++ 4 files changed, 56 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 174eb59..3273d8c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -570,6 +570,27 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file return -EINVAL; } } + case AMDGPU_INFO_NUM_HANDLES: { + struct drm_amdgpu_info_num_handles handle; + + switch (info->query_hw_ip.type) { + case AMDGPU_HW_IP_UVD: + /* Starting Polaris, we support unlimited UVD handles */ + if (adev->asic_type < CHIP_POLARIS10) { + handle.uvd_max_handles = adev->uvd.max_handles; + handle.uvd_used_handles = amdgpu_uvd_used_handles(adev); + + return copy_to_user(out, &handle, + min((size_t)size, sizeof(handle))) ? -EFAULT : 0; + } else { + return -EINVAL; + } + + break; + default: + return -EINVAL; + } + } default: DRM_DEBUG_KMS("Invalid request %d\n", info->query); return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index a8816ba..02187fd 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c @@ -1173,3 +1173,28 @@ int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout) error: return r; } + +/** + * amdgpu_uvd_used_handles - returns used UVD handles + * + * @adev: amdgpu_device pointer + * + * Returns the number of UVD handles in use + */ +uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev) +{ + unsigned i; + uint32_t used_handles = 0; + + for (i = 0; i < adev->uvd.max_handles; ++i) { + /* + * Handles can be freed in any order, and not + * necessarily linear. So we need to count + * all non-zero handles. + */ + if (atomic_read(&adev->uvd.handles[i])) + used_handles++; + } + + return used_handles; +} diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h index c850009..0fee861 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h @@ -38,5 +38,6 @@ int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx); void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring); void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring); int amdgpu_uvd_ring_test_ib(struct amdgpu_ring *ring, long timeout); +uint32_t amdgpu_uvd_used_handles(struct amdgpu_device *adev); #endif diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index bea9875..2cf8df8 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -530,6 +530,8 @@ struct drm_amdgpu_cs_chunk_data { #define AMDGPU_INFO_VBIOS_SIZE 0x1 /* Subquery id: Query vbios image */ #define AMDGPU_INFO_VBIOS_IMAGE 0x2 +/* Query UVD handles */ +#define AMDGPU_INFO_NUM_HANDLES 0x1C #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff @@ -721,6 +723,13 @@ struct drm_amdgpu_info_hw_ip { __u32 _pad; }; +struct drm_amdgpu_info_num_handles { + /** Max handles as supported by firmware for UVD */ + __u32 uvd_max_handles; + /** Handles currently in use for UVD */ + __u32 uvd_used_handles; +}; + #define AMDGPU_VCE_CLOCK_TABLE_ENTRIES 6 struct drm_amdgpu_info_vce_clock_table_entry { -- 1.9.1 [View Less]

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dri-devel January 2017