dri-devel September 2018

dri-devel@lists.freedesktop.org

276 participants
1899 discussions

[PATCH v2 0/5] Add Mali DP non-compressed pixel formats
by Alexandru Gheorghe 03 Sep '18

03 Sep '18

Change since v1 [1]: - Droped changes that add special handling of the tile formats X0L0/X0L2 in the driver and extend drm_core, by adding tile_h and tile_w in drm_format_info, suggested by Daniel Vetter here [2], see patches 2 to 4. - Use a differnt fourcc code for DRM_FORMAT_XVYU2101010, as suggested by Brian Starkey here [3]. Mali DP supports a bunch of pixel formats that don't have a fourcc code defined in drm_fourcc.h, so this patchset adds the definition for those formats and enables them in mali-dp driver. The following new formats will be added: Packed YCbCr444 * DRM_FORMAT_XYUV8888 * DRM_FORMAT_XVYU2101010 Two plane 10 bits format. * DRM_FORMAT_P010 Packed YCbCr420 2x2 tiled formats * DRM_FORMAT_Y0L0 * DRM_FORMAT_X0L0 * DRM_FORMAT_Y0L2 * DRM_FORMAT_X0L2 The difference between X0L0/X0L2 vs Y0L0/Y0L2 is that the later group have two alpha bits per pixel. This group is a bit special because we are dealing with a tiled format where the first 64 bits in memory represent the pixels for a 2x2 tile, so it needs a bit of special handling when it comes to: - pitch: needs to cover both rows that are in the same tile. - min allocation size: since a pitch cover both rows the formulas defined in drm_gem_fb_create don't work anymore. - handling of src_x and src_y offset: same as above since we are dealing with a tiled format drm_fb_cma_get_gem_obj doesn't return the correct address offset. [1] https://lists.freedesktop.org/archives/dri-devel/2018-July/184597.html [2] https://lists.freedesktop.org/archives/dri-devel/2018-August/186465.html [3] https://lists.freedesktop.org/archives/dri-devel/2018-August/186057.html Alexandru Gheorghe (5): drm/fourcc: Add new fourcc for malidp uncompressed formats drm/fourcc: Add tile width and height to drm_format_info drm/i915: Set tile sizes in drm_format_info drm: Add support for handling linear tile formats drm: mali-dp: Enable mali specific buffer formats drivers/gpu/drm/arm/malidp_hw.c | 7 +- drivers/gpu/drm/drm_atomic.c | 8 + drivers/gpu/drm/drm_fb_cma_helper.c | 11 +- drivers/gpu/drm/drm_fourcc.c | 397 +++++++++++++++---- drivers/gpu/drm/drm_framebuffer.c | 19 +- drivers/gpu/drm/drm_gem_framebuffer_helper.c | 10 +- drivers/gpu/drm/i915/intel_display.c | 12 +- include/drm/drm_fourcc.h | 6 + include/uapi/drm/drm_fourcc.h | 27 +- 9 files changed, 415 insertions(+), 82 deletions(-) -- 2.18.0

7 31

Question on 640x480 @ 72fps
by abhinavk＠codeaurora.org 03 Sep '18

03 Sep '18

Hello During one of our internal tests, we ran into an issue where the calculated refresh rate for the mode using the drm_mode_vrefresh() API doesnt match the theoretical value due to rounding. 552 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 553 704, 832, 0, 480, 489, 492, 520, 0, 554 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ int drm_mode_vrefresh(const struct drm_display_mode *mode) { int refresh = 0; if (mode->vrefresh > 0) refresh = mode->vrefresh; else if (mode->htotal > 0 && mode->vtotal > 0) { unsigned int num, den; num = mode->clock * 1000; den = mode->htotal * mode->vtotal; if (mode->flags & DRM_MODE_FLAG_INTERLACE) num *= 2; if (mode->flags & DRM_MODE_FLAG_DBLSCAN) den *= 2; if (mode->vscan > 1) den *= mode->vscan; refresh = DIV_ROUND_CLOSEST(num, den); } return refresh; } EXPORT_SYMBOL(drm_mode_vrefresh); As per the math of this API, the vrefresh comes up to 72.8 fps ( 31500 * 1000 ) / (832 * 520) . Hence this gets rounded to 73fps. However as per the spec, this mode should have the vrefresh as 72fps. So to satisfy that, we must round-down in this function. That might break other modes though. Do you have any suggestions on how to fix-up this mode ? Shall we just directly specify the vrefresh in the edid_est_modes[] and drm_dmt_modes[] static array? I can submit a PATCH based on the approach we agree on here. Thanks Abhinav

5 4

[PATCH 0/4] drm/dp_mst: Add DP MST debugfs nodes for all drivers
by Lyude Paul 03 Sep '18

03 Sep '18

This is the next version of my patch series for teaching DRM how to automatically create debugfs nodes for drivers with MST topologies. This was originally intended just for nouveau, but has since been expanded to all DRM drivers. Cc: Maarten Lankhorst <maarten.lankhorst(a)linux.intel.com> Cc: Daniel Stone <daniel(a)fooishbar.org> Lyude Paul (4): drm/debugfs: Add support for dynamic debugfs initialization drm/dp_mst: Pass entire connector to drm_dp_mst_topology_mgr_init() drm/dp_mst: Add dp_mst_status debugfs node for all drivers drm/i915: Remove i915_drm_dp_mst_status .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +- drivers/gpu/drm/drm_debugfs.c | 173 +++++++++++++++++- drivers/gpu/drm/drm_dp_mst_topology.c | 114 +++++++++++- drivers/gpu/drm/drm_drv.c | 3 + drivers/gpu/drm/drm_internal.h | 5 + drivers/gpu/drm/i915/i915_debugfs.c | 32 ---- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_dp_mst.c | 6 +- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/nouveau/dispnv50/disp.c | 6 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- include/drm/drm_debugfs.h | 27 +++ include/drm/drm_dp_mst_helper.h | 17 +- include/drm/drm_file.h | 4 + 14 files changed, 342 insertions(+), 54 deletions(-) -- 2.17.1

3 9

[PATCH] drm/vkms: Fix race condition around accessing frame number
by Haneen Mohammed 03 Sep '18

03 Sep '18

crtc_state is accessed by both vblank_handle() and the ordered work_struct handle vkms_crc_work_handle() to retrieve and or update the frame number for computed CRC. Since work_struct can fail, add frame_end to account for missing frame numbers. use atomic_t witth appropriate flags for synchronization between hrtimer callback and ordered work_struct handle since spinlock can't be used with work_struct handle and mutex can't be used with hrtimer callback. This patch passes the following subtests from igt kms_pipe_crc_basic test: bad-source, read-crc-pipe-A, read-crc-pipe-A-frame-sequence, nonblocking-crc-pipe-A, nonblocking-crc-pipe-A-frame-sequence Signed-off-by: Haneen Mohammed <hamohammed.sa(a)gmail.com> --- drivers/gpu/drm/vkms/vkms_crc.c | 33 ++++++++++++++++++++++++++++++-- drivers/gpu/drm/vkms/vkms_crtc.c | 13 +++++++++++-- drivers/gpu/drm/vkms/vkms_drv.h | 6 ++++-- 3 files changed, 46 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/vkms/vkms_crc.c b/drivers/gpu/drm/vkms/vkms_crc.c index ed47d67cecd6..4a1ba5b7886a 100644 --- a/drivers/gpu/drm/vkms/vkms_crc.c +++ b/drivers/gpu/drm/vkms/vkms_crc.c @@ -34,6 +34,15 @@ static uint32_t _vkms_get_crc(struct vkms_crc_data *crc_data) return crc; } +/** + * vkms_crc_work_handle - ordered work_struct to compute CRC + * + * @work: work_struct + * + * Work handler for computing CRCs. work_struct scheduled in + * an ordered workqueue that's periodically scheduled to run by + * _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state(). + */ void vkms_crc_work_handle(struct work_struct *work) { struct vkms_crtc_state *crtc_state = container_of(work, @@ -45,8 +54,18 @@ void vkms_crc_work_handle(struct work_struct *work) output); struct vkms_crc_data *primary_crc = NULL; struct drm_plane *plane; - u32 crc32 = 0; + u32 frame_start, frame_end; + + frame_start = atomic_read(&crtc_state->frame_start); + frame_end = atomic_read(&crtc_state->frame_end); + /* _vblank_handle() hasn't updated frame_start yet */ + if (!frame_start) { + return; + } else if (frame_start == frame_end) { + atomic_set(&crtc_state->frame_start, 0); + return; + } drm_for_each_plane(plane, &vdev->drm) { struct vkms_plane_state *vplane_state; @@ -67,7 +86,17 @@ void vkms_crc_work_handle(struct work_struct *work) if (primary_crc) crc32 = _vkms_get_crc(primary_crc); - drm_crtc_add_crc_entry(crtc, true, crtc_state->n_frame, &crc32); + frame_end = drm_crtc_accurate_vblank_count(crtc); + + /* queue_work can fail to schedule crc_work; add crc for + * missing frames + */ + while (frame_start <= frame_end) + drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32); + + /* to avoid using the same value again */ + atomic_set(&crtc_state->frame_end, frame_end); + atomic_set(&crtc_state->frame_start, 0); } static int vkms_crc_parse_source(const char *src_name, bool *enabled) diff --git a/drivers/gpu/drm/vkms/vkms_crtc.c b/drivers/gpu/drm/vkms/vkms_crtc.c index 9d0b1a325a78..a170677acd46 100644 --- a/drivers/gpu/drm/vkms/vkms_crtc.c +++ b/drivers/gpu/drm/vkms/vkms_crtc.c @@ -22,8 +22,17 @@ static void _vblank_handle(struct vkms_output *output) DRM_ERROR("vkms failure on handling vblank"); if (state && output->crc_enabled) { - state->n_frame = drm_crtc_accurate_vblank_count(crtc); - queue_work(output->crc_workq, &state->crc_work); + u32 frame = drm_crtc_accurate_vblank_count(crtc); + + /* update frame_start only if a queued vkms_crc_work_handle has + * read the data + */ + if (!atomic_read(&state->frame_start)) + atomic_set(&state->frame_start, frame); + + ret = queue_work(output->crc_workq, &state->crc_work); + if (!ret) + DRM_WARN("failed to queue vkms_crc_work_handle"); } spin_unlock(&output->lock); diff --git a/drivers/gpu/drm/vkms/vkms_drv.h b/drivers/gpu/drm/vkms/vkms_drv.h index 2017a2ccc43d..4a3956a0549e 100644 --- a/drivers/gpu/drm/vkms/vkms_drv.h +++ b/drivers/gpu/drm/vkms/vkms_drv.h @@ -39,12 +39,14 @@ struct vkms_plane_state { * vkms_crtc_state - Driver specific CRTC state * @base: base CRTC state * @crc_work: work struct to compute and add CRC entries - * @n_frame: frame number for computed CRC + * @n_frame_start: start frame number for computed CRC + * @n_frame_end: end frame number for computed CRC */ struct vkms_crtc_state { struct drm_crtc_state base; struct work_struct crc_work; - unsigned int n_frame; + atomic_t frame_start; + atomic_t frame_end; }; struct vkms_output { -- 2.17.1

2 3

[PATCH v2 1/2] backlight: Remove s6e63m0 driver
by Krzysztof Kozlowski 02 Sep '18

02 Sep '18

The driver for S6E63M0 AMOLED LCD panel is not used. It does not support DeviceTree and respective possible users (S5Pv210 Aquila and Goni boards) are DeviceTree-only. Suggested-by: Marek Szyprowski <m.szyprowski(a)samsung.com> Cc: Marek Szyprowski <m.szyprowski(a)samsung.com> Cc: Inki Dae <inki.dae(a)samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk(a)kernel.org> Acked-by: Jingoo Han <jingoohan1(a)gmail.com> Acked-by: Daniel Thompson <daniel.thompson(a)linaro.org> --- Changes since v1: 1. Remove sysfs ABI documentation file. 2. Add Jingoo's and Daniel's acks. --- Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 | 27 - drivers/video/backlight/Kconfig | 8 - drivers/video/backlight/Makefile | 1 - drivers/video/backlight/s6e63m0.c | 857 ---------------------- drivers/video/backlight/s6e63m0_gamma.h | 266 ------- 5 files changed, 1159 deletions(-) delete mode 100644 Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 delete mode 100644 drivers/video/backlight/s6e63m0.c delete mode 100644 drivers/video/backlight/s6e63m0_gamma.h diff --git a/Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 b/Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 deleted file mode 100644 index ae0a2d3dcc07..000000000000 --- a/Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 +++ /dev/null @@ -1,27 +0,0 @@ -sysfs interface for the S6E63M0 AMOLED LCD panel driver -------------------------------------------------------- - -What: /sys/class/lcd/<lcd>/gamma_mode -Date: May, 2010 -KernelVersion: v2.6.35 -Contact: dri-devel(a)lists.freedesktop.org -Description: - (RW) Read or write the gamma mode. Following three modes are - supported: - 0 - gamma value 2.2, - 1 - gamma value 1.9 and - 2 - gamma value 1.7. - - -What: /sys/class/lcd/<lcd>/gamma_table -Date: May, 2010 -KernelVersion: v2.6.35 -Contact: dri-devel(a)lists.freedesktop.org -Description: - (RO) Displays the size of the gamma table i.e. the number of - gamma modes available. - -This is a backlight lcd driver. These interfaces are an extension to the API -documented in Documentation/ABI/testing/sysfs-class-lcd and in -Documentation/ABI/stable/sysfs-class-backlight (under -/sys/class/backlight/<backlight>/). diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index 2919e2334052..2373c3cec0c3 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -111,14 +111,6 @@ config LCD_HP700 If you have an HP Jornada 700 series handheld (710/720/728) say Y to enable LCD control driver. -config LCD_S6E63M0 - tristate "S6E63M0 AMOLED LCD Driver" - depends on SPI && BACKLIGHT_CLASS_DEVICE - default n - help - If you have an S6E63M0 LCD Panel, say Y to enable its - LCD control driver. - config LCD_LD9040 tristate "LD9040 AMOLED LCD Driver" depends on SPI && BACKLIGHT_CLASS_DEVICE diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index 0dcc2c745c03..c7a46392a76f 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_LCD_LMS501KF03) += lms501kf03.o obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o obj-$(CONFIG_LCD_OTM3225A) += otm3225a.o obj-$(CONFIG_LCD_PLATFORM) += platform_lcd.o -obj-$(CONFIG_LCD_S6E63M0) += s6e63m0.o obj-$(CONFIG_LCD_TDO24M) += tdo24m.o obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o diff --git a/drivers/video/backlight/s6e63m0.c b/drivers/video/backlight/s6e63m0.c deleted file mode 100644 index 3c4a22a3063a..000000000000 --- a/drivers/video/backlight/s6e63m0.c +++ /dev/null @@ -1,857 +0,0 @@ -/* - * S6E63M0 AMOLED LCD panel driver. - * - * Author: InKi Dae <inki.dae(a)samsung.com> - * - * Derived from drivers/video/omap/lcd-apollon.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include <linux/backlight.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/kernel.h> -#include <linux/lcd.h> -#include <linux/module.h> -#include <linux/spi/spi.h> -#include <linux/wait.h> - -#include "s6e63m0_gamma.h" - -#define SLEEPMSEC 0x1000 -#define ENDDEF 0x2000 -#define DEFMASK 0xFF00 -#define COMMAND_ONLY 0xFE -#define DATA_ONLY 0xFF - -#define MIN_BRIGHTNESS 0 -#define MAX_BRIGHTNESS 10 - -struct s6e63m0 { - struct device *dev; - struct spi_device *spi; - unsigned int power; - unsigned int current_brightness; - unsigned int gamma_mode; - unsigned int gamma_table_count; - struct lcd_device *ld; - struct backlight_device *bd; - struct lcd_platform_data *lcd_pd; -}; - -static const unsigned short seq_panel_condition_set[] = { - 0xF8, 0x01, - DATA_ONLY, 0x27, - DATA_ONLY, 0x27, - DATA_ONLY, 0x07, - DATA_ONLY, 0x07, - DATA_ONLY, 0x54, - DATA_ONLY, 0x9f, - DATA_ONLY, 0x63, - DATA_ONLY, 0x86, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x33, - DATA_ONLY, 0x0d, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_display_condition_set[] = { - 0xf2, 0x02, - DATA_ONLY, 0x03, - DATA_ONLY, 0x1c, - DATA_ONLY, 0x10, - DATA_ONLY, 0x10, - - 0xf7, 0x03, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_gamma_setting[] = { - 0xfa, 0x00, - DATA_ONLY, 0x18, - DATA_ONLY, 0x08, - DATA_ONLY, 0x24, - DATA_ONLY, 0x64, - DATA_ONLY, 0x56, - DATA_ONLY, 0x33, - DATA_ONLY, 0xb6, - DATA_ONLY, 0xba, - DATA_ONLY, 0xa8, - DATA_ONLY, 0xac, - DATA_ONLY, 0xb1, - DATA_ONLY, 0x9d, - DATA_ONLY, 0xc1, - DATA_ONLY, 0xc1, - DATA_ONLY, 0xb7, - DATA_ONLY, 0x00, - DATA_ONLY, 0x9c, - DATA_ONLY, 0x00, - DATA_ONLY, 0x9f, - DATA_ONLY, 0x00, - DATA_ONLY, 0xd6, - - 0xfa, 0x01, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_etc_condition_set[] = { - 0xf6, 0x00, - DATA_ONLY, 0x8c, - DATA_ONLY, 0x07, - - 0xb3, 0xc, - - 0xb5, 0x2c, - DATA_ONLY, 0x12, - DATA_ONLY, 0x0c, - DATA_ONLY, 0x0a, - DATA_ONLY, 0x10, - DATA_ONLY, 0x0e, - DATA_ONLY, 0x17, - DATA_ONLY, 0x13, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x2a, - DATA_ONLY, 0x24, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x1b, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x17, - - DATA_ONLY, 0x2b, - DATA_ONLY, 0x26, - DATA_ONLY, 0x22, - DATA_ONLY, 0x20, - DATA_ONLY, 0x3a, - DATA_ONLY, 0x34, - DATA_ONLY, 0x30, - DATA_ONLY, 0x2c, - DATA_ONLY, 0x29, - DATA_ONLY, 0x26, - DATA_ONLY, 0x25, - DATA_ONLY, 0x23, - DATA_ONLY, 0x21, - DATA_ONLY, 0x20, - DATA_ONLY, 0x1e, - DATA_ONLY, 0x1e, - - 0xb6, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x11, - DATA_ONLY, 0x22, - DATA_ONLY, 0x33, - DATA_ONLY, 0x44, - DATA_ONLY, 0x44, - DATA_ONLY, 0x44, - - DATA_ONLY, 0x55, - DATA_ONLY, 0x55, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - - 0xb7, 0x2c, - DATA_ONLY, 0x12, - DATA_ONLY, 0x0c, - DATA_ONLY, 0x0a, - DATA_ONLY, 0x10, - DATA_ONLY, 0x0e, - DATA_ONLY, 0x17, - DATA_ONLY, 0x13, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x2a, - DATA_ONLY, 0x24, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x1b, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x17, - - DATA_ONLY, 0x2b, - DATA_ONLY, 0x26, - DATA_ONLY, 0x22, - DATA_ONLY, 0x20, - DATA_ONLY, 0x3a, - DATA_ONLY, 0x34, - DATA_ONLY, 0x30, - DATA_ONLY, 0x2c, - DATA_ONLY, 0x29, - DATA_ONLY, 0x26, - DATA_ONLY, 0x25, - DATA_ONLY, 0x23, - DATA_ONLY, 0x21, - DATA_ONLY, 0x20, - DATA_ONLY, 0x1e, - DATA_ONLY, 0x1e, - - 0xb8, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x11, - DATA_ONLY, 0x22, - DATA_ONLY, 0x33, - DATA_ONLY, 0x44, - DATA_ONLY, 0x44, - DATA_ONLY, 0x44, - - DATA_ONLY, 0x55, - DATA_ONLY, 0x55, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - - 0xb9, 0x2c, - DATA_ONLY, 0x12, - DATA_ONLY, 0x0c, - DATA_ONLY, 0x0a, - DATA_ONLY, 0x10, - DATA_ONLY, 0x0e, - DATA_ONLY, 0x17, - DATA_ONLY, 0x13, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x2a, - DATA_ONLY, 0x24, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x1b, - DATA_ONLY, 0x1a, - DATA_ONLY, 0x17, - - DATA_ONLY, 0x2b, - DATA_ONLY, 0x26, - DATA_ONLY, 0x22, - DATA_ONLY, 0x20, - DATA_ONLY, 0x3a, - DATA_ONLY, 0x34, - DATA_ONLY, 0x30, - DATA_ONLY, 0x2c, - DATA_ONLY, 0x29, - DATA_ONLY, 0x26, - DATA_ONLY, 0x25, - DATA_ONLY, 0x23, - DATA_ONLY, 0x21, - DATA_ONLY, 0x20, - DATA_ONLY, 0x1e, - DATA_ONLY, 0x1e, - - 0xba, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x11, - DATA_ONLY, 0x22, - DATA_ONLY, 0x33, - DATA_ONLY, 0x44, - DATA_ONLY, 0x44, - DATA_ONLY, 0x44, - - DATA_ONLY, 0x55, - DATA_ONLY, 0x55, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - DATA_ONLY, 0x66, - - 0xc1, 0x4d, - DATA_ONLY, 0x96, - DATA_ONLY, 0x1d, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x01, - DATA_ONLY, 0xdf, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x03, - DATA_ONLY, 0x1f, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x00, - DATA_ONLY, 0x03, - DATA_ONLY, 0x06, - DATA_ONLY, 0x09, - DATA_ONLY, 0x0d, - DATA_ONLY, 0x0f, - DATA_ONLY, 0x12, - DATA_ONLY, 0x15, - DATA_ONLY, 0x18, - - 0xb2, 0x10, - DATA_ONLY, 0x10, - DATA_ONLY, 0x0b, - DATA_ONLY, 0x05, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_acl_on[] = { - /* ACL on */ - 0xc0, 0x01, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_acl_off[] = { - /* ACL off */ - 0xc0, 0x00, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_elvss_on[] = { - /* ELVSS on */ - 0xb1, 0x0b, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_elvss_off[] = { - /* ELVSS off */ - 0xb1, 0x0a, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_stand_by_off[] = { - 0x11, COMMAND_ONLY, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_stand_by_on[] = { - 0x10, COMMAND_ONLY, - - ENDDEF, 0x0000 -}; - -static const unsigned short seq_display_on[] = { - 0x29, COMMAND_ONLY, - - ENDDEF, 0x0000 -}; - - -static int s6e63m0_spi_write_byte(struct s6e63m0 *lcd, int addr, int data) -{ - u16 buf[1]; - struct spi_message msg; - - struct spi_transfer xfer = { - .len = 2, - .tx_buf = buf, - }; - - buf[0] = (addr << 8) | data; - - spi_message_init(&msg); - spi_message_add_tail(&xfer, &msg); - - return spi_sync(lcd->spi, &msg); -} - -static int s6e63m0_spi_write(struct s6e63m0 *lcd, unsigned char address, - unsigned char command) -{ - int ret = 0; - - if (address != DATA_ONLY) - ret = s6e63m0_spi_write_byte(lcd, 0x0, address); - if (command != COMMAND_ONLY) - ret = s6e63m0_spi_write_byte(lcd, 0x1, command); - - return ret; -} - -static int s6e63m0_panel_send_sequence(struct s6e63m0 *lcd, - const unsigned short *wbuf) -{ - int ret = 0, i = 0; - - while ((wbuf[i] & DEFMASK) != ENDDEF) { - if ((wbuf[i] & DEFMASK) != SLEEPMSEC) { - ret = s6e63m0_spi_write(lcd, wbuf[i], wbuf[i+1]); - if (ret) - break; - } else { - msleep(wbuf[i+1]); - } - i += 2; - } - - return ret; -} - -static int _s6e63m0_gamma_ctl(struct s6e63m0 *lcd, const unsigned int *gamma) -{ - unsigned int i = 0; - int ret = 0; - - /* disable gamma table updating. */ - ret = s6e63m0_spi_write(lcd, 0xfa, 0x00); - if (ret) { - dev_err(lcd->dev, "failed to disable gamma table updating.\n"); - goto gamma_err; - } - - for (i = 0 ; i < GAMMA_TABLE_COUNT; i++) { - ret = s6e63m0_spi_write(lcd, DATA_ONLY, gamma[i]); - if (ret) { - dev_err(lcd->dev, "failed to set gamma table.\n"); - goto gamma_err; - } - } - - /* update gamma table. */ - ret = s6e63m0_spi_write(lcd, 0xfa, 0x01); - if (ret) - dev_err(lcd->dev, "failed to update gamma table.\n"); - -gamma_err: - return ret; -} - -static int s6e63m0_gamma_ctl(struct s6e63m0 *lcd, int gamma) -{ - int ret = 0; - - ret = _s6e63m0_gamma_ctl(lcd, gamma_table.gamma_22_table[gamma]); - - return ret; -} - - -static int s6e63m0_ldi_init(struct s6e63m0 *lcd) -{ - int ret, i; - const unsigned short *init_seq[] = { - seq_panel_condition_set, - seq_display_condition_set, - seq_gamma_setting, - seq_etc_condition_set, - seq_acl_on, - seq_elvss_on, - }; - - for (i = 0; i < ARRAY_SIZE(init_seq); i++) { - ret = s6e63m0_panel_send_sequence(lcd, init_seq[i]); - if (ret) - break; - } - - return ret; -} - -static int s6e63m0_ldi_enable(struct s6e63m0 *lcd) -{ - int ret = 0, i; - const unsigned short *enable_seq[] = { - seq_stand_by_off, - seq_display_on, - }; - - for (i = 0; i < ARRAY_SIZE(enable_seq); i++) { - ret = s6e63m0_panel_send_sequence(lcd, enable_seq[i]); - if (ret) - break; - } - - return ret; -} - -static int s6e63m0_ldi_disable(struct s6e63m0 *lcd) -{ - int ret; - - ret = s6e63m0_panel_send_sequence(lcd, seq_stand_by_on); - - return ret; -} - -static int s6e63m0_power_is_on(int power) -{ - return power <= FB_BLANK_NORMAL; -} - -static int s6e63m0_power_on(struct s6e63m0 *lcd) -{ - int ret = 0; - struct lcd_platform_data *pd; - struct backlight_device *bd; - - pd = lcd->lcd_pd; - bd = lcd->bd; - - if (!pd->power_on) { - dev_err(lcd->dev, "power_on is NULL.\n"); - return -EINVAL; - } - - pd->power_on(lcd->ld, 1); - msleep(pd->power_on_delay); - - if (!pd->reset) { - dev_err(lcd->dev, "reset is NULL.\n"); - return -EINVAL; - } - - pd->reset(lcd->ld); - msleep(pd->reset_delay); - - ret = s6e63m0_ldi_init(lcd); - if (ret) { - dev_err(lcd->dev, "failed to initialize ldi.\n"); - return ret; - } - - ret = s6e63m0_ldi_enable(lcd); - if (ret) { - dev_err(lcd->dev, "failed to enable ldi.\n"); - return ret; - } - - /* set brightness to current value after power on or resume. */ - ret = s6e63m0_gamma_ctl(lcd, bd->props.brightness); - if (ret) { - dev_err(lcd->dev, "lcd gamma setting failed.\n"); - return ret; - } - - return 0; -} - -static int s6e63m0_power_off(struct s6e63m0 *lcd) -{ - int ret; - struct lcd_platform_data *pd; - - pd = lcd->lcd_pd; - - ret = s6e63m0_ldi_disable(lcd); - if (ret) { - dev_err(lcd->dev, "lcd setting failed.\n"); - return -EIO; - } - - msleep(pd->power_off_delay); - - pd->power_on(lcd->ld, 0); - - return 0; -} - -static int s6e63m0_power(struct s6e63m0 *lcd, int power) -{ - int ret = 0; - - if (s6e63m0_power_is_on(power) && !s6e63m0_power_is_on(lcd->power)) - ret = s6e63m0_power_on(lcd); - else if (!s6e63m0_power_is_on(power) && s6e63m0_power_is_on(lcd->power)) - ret = s6e63m0_power_off(lcd); - - if (!ret) - lcd->power = power; - - return ret; -} - -static int s6e63m0_set_power(struct lcd_device *ld, int power) -{ - struct s6e63m0 *lcd = lcd_get_data(ld); - - if (power != FB_BLANK_UNBLANK && power != FB_BLANK_POWERDOWN && - power != FB_BLANK_NORMAL) { - dev_err(lcd->dev, "power value should be 0, 1 or 4.\n"); - return -EINVAL; - } - - return s6e63m0_power(lcd, power); -} - -static int s6e63m0_get_power(struct lcd_device *ld) -{ - struct s6e63m0 *lcd = lcd_get_data(ld); - - return lcd->power; -} - -static int s6e63m0_set_brightness(struct backlight_device *bd) -{ - int ret = 0, brightness = bd->props.brightness; - struct s6e63m0 *lcd = bl_get_data(bd); - - if (brightness < MIN_BRIGHTNESS || - brightness > bd->props.max_brightness) { - dev_err(&bd->dev, "lcd brightness should be %d to %d.\n", - MIN_BRIGHTNESS, MAX_BRIGHTNESS); - return -EINVAL; - } - - ret = s6e63m0_gamma_ctl(lcd, bd->props.brightness); - if (ret) { - dev_err(&bd->dev, "lcd brightness setting failed.\n"); - return -EIO; - } - - return ret; -} - -static struct lcd_ops s6e63m0_lcd_ops = { - .set_power = s6e63m0_set_power, - .get_power = s6e63m0_get_power, -}; - -static const struct backlight_ops s6e63m0_backlight_ops = { - .update_status = s6e63m0_set_brightness, -}; - -static ssize_t s6e63m0_sysfs_show_gamma_mode(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct s6e63m0 *lcd = dev_get_drvdata(dev); - char temp[10]; - - switch (lcd->gamma_mode) { - case 0: - sprintf(temp, "2.2 mode\n"); - strcat(buf, temp); - break; - case 1: - sprintf(temp, "1.9 mode\n"); - strcat(buf, temp); - break; - case 2: - sprintf(temp, "1.7 mode\n"); - strcat(buf, temp); - break; - default: - dev_info(dev, "gamma mode could be 0:2.2, 1:1.9 or 2:1.7)n"); - break; - } - - return strlen(buf); -} - -static ssize_t s6e63m0_sysfs_store_gamma_mode(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct s6e63m0 *lcd = dev_get_drvdata(dev); - struct backlight_device *bd = NULL; - int brightness, rc; - - rc = kstrtouint(buf, 0, &lcd->gamma_mode); - if (rc < 0) - return rc; - - bd = lcd->bd; - - brightness = bd->props.brightness; - - switch (lcd->gamma_mode) { - case 0: - _s6e63m0_gamma_ctl(lcd, gamma_table.gamma_22_table[brightness]); - break; - case 1: - _s6e63m0_gamma_ctl(lcd, gamma_table.gamma_19_table[brightness]); - break; - case 2: - _s6e63m0_gamma_ctl(lcd, gamma_table.gamma_17_table[brightness]); - break; - default: - dev_info(dev, "gamma mode could be 0:2.2, 1:1.9 or 2:1.7\n"); - _s6e63m0_gamma_ctl(lcd, gamma_table.gamma_22_table[brightness]); - break; - } - return len; -} - -static DEVICE_ATTR(gamma_mode, 0644, - s6e63m0_sysfs_show_gamma_mode, s6e63m0_sysfs_store_gamma_mode); - -static ssize_t s6e63m0_sysfs_show_gamma_table(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct s6e63m0 *lcd = dev_get_drvdata(dev); - char temp[3]; - - sprintf(temp, "%u\n", lcd->gamma_table_count); - strcpy(buf, temp); - - return strlen(buf); -} -static DEVICE_ATTR(gamma_table, 0444, - s6e63m0_sysfs_show_gamma_table, NULL); - -static int s6e63m0_probe(struct spi_device *spi) -{ - int ret = 0; - struct s6e63m0 *lcd = NULL; - struct lcd_device *ld = NULL; - struct backlight_device *bd = NULL; - struct backlight_properties props; - - lcd = devm_kzalloc(&spi->dev, sizeof(struct s6e63m0), GFP_KERNEL); - if (!lcd) - return -ENOMEM; - - /* s6e63m0 lcd panel uses 3-wire 9bits SPI Mode. */ - spi->bits_per_word = 9; - - ret = spi_setup(spi); - if (ret < 0) { - dev_err(&spi->dev, "spi setup failed.\n"); - return ret; - } - - lcd->spi = spi; - lcd->dev = &spi->dev; - - lcd->lcd_pd = dev_get_platdata(&spi->dev); - if (!lcd->lcd_pd) { - dev_err(&spi->dev, "platform data is NULL.\n"); - return -EINVAL; - } - - ld = devm_lcd_device_register(&spi->dev, "s6e63m0", &spi->dev, lcd, - &s6e63m0_lcd_ops); - if (IS_ERR(ld)) - return PTR_ERR(ld); - - lcd->ld = ld; - - memset(&props, 0, sizeof(struct backlight_properties)); - props.type = BACKLIGHT_RAW; - props.max_brightness = MAX_BRIGHTNESS; - - bd = devm_backlight_device_register(&spi->dev, "s6e63m0bl-bl", - &spi->dev, lcd, &s6e63m0_backlight_ops, - &props); - if (IS_ERR(bd)) - return PTR_ERR(bd); - - bd->props.brightness = MAX_BRIGHTNESS; - lcd->bd = bd; - - /* - * it gets gamma table count available so it gets user - * know that. - */ - lcd->gamma_table_count = - sizeof(gamma_table) / (MAX_GAMMA_LEVEL * sizeof(int *)); - - ret = device_create_file(&(spi->dev), &dev_attr_gamma_mode); - if (ret < 0) - dev_err(&(spi->dev), "failed to add sysfs entries\n"); - - ret = device_create_file(&(spi->dev), &dev_attr_gamma_table); - if (ret < 0) - dev_err(&(spi->dev), "failed to add sysfs entries\n"); - - /* - * if lcd panel was on from bootloader like u-boot then - * do not lcd on. - */ - if (!lcd->lcd_pd->lcd_enabled) { - /* - * if lcd panel was off from bootloader then - * current lcd status is powerdown and then - * it enables lcd panel. - */ - lcd->power = FB_BLANK_POWERDOWN; - - s6e63m0_power(lcd, FB_BLANK_UNBLANK); - } else { - lcd->power = FB_BLANK_UNBLANK; - } - - spi_set_drvdata(spi, lcd); - - dev_info(&spi->dev, "s6e63m0 panel driver has been probed.\n"); - - return 0; -} - -static int s6e63m0_remove(struct spi_device *spi) -{ - struct s6e63m0 *lcd = spi_get_drvdata(spi); - - s6e63m0_power(lcd, FB_BLANK_POWERDOWN); - device_remove_file(&spi->dev, &dev_attr_gamma_table); - device_remove_file(&spi->dev, &dev_attr_gamma_mode); - - return 0; -} - -#ifdef CONFIG_PM_SLEEP -static int s6e63m0_suspend(struct device *dev) -{ - struct s6e63m0 *lcd = dev_get_drvdata(dev); - - dev_dbg(dev, "lcd->power = %d\n", lcd->power); - - /* - * when lcd panel is suspend, lcd panel becomes off - * regardless of status. - */ - return s6e63m0_power(lcd, FB_BLANK_POWERDOWN); -} - -static int s6e63m0_resume(struct device *dev) -{ - struct s6e63m0 *lcd = dev_get_drvdata(dev); - - lcd->power = FB_BLANK_POWERDOWN; - - return s6e63m0_power(lcd, FB_BLANK_UNBLANK); -} -#endif - -static SIMPLE_DEV_PM_OPS(s6e63m0_pm_ops, s6e63m0_suspend, s6e63m0_resume); - -/* Power down all displays on reboot, poweroff or halt. */ -static void s6e63m0_shutdown(struct spi_device *spi) -{ - struct s6e63m0 *lcd = spi_get_drvdata(spi); - - s6e63m0_power(lcd, FB_BLANK_POWERDOWN); -} - -static struct spi_driver s6e63m0_driver = { - .driver = { - .name = "s6e63m0", - .pm = &s6e63m0_pm_ops, - }, - .probe = s6e63m0_probe, - .remove = s6e63m0_remove, - .shutdown = s6e63m0_shutdown, -}; - -module_spi_driver(s6e63m0_driver); - -MODULE_AUTHOR("InKi Dae <inki.dae(a)samsung.com>"); -MODULE_DESCRIPTION("S6E63M0 LCD Driver"); -MODULE_LICENSE("GPL"); - diff --git a/drivers/video/backlight/s6e63m0_gamma.h b/drivers/video/backlight/s6e63m0_gamma.h deleted file mode 100644 index 2c44bdb0696b..000000000000 --- a/drivers/video/backlight/s6e63m0_gamma.h +++ /dev/null @@ -1,266 +0,0 @@ -/* linux/drivers/video/samsung/s6e63m0_brightness.h - * - * Gamma level definitions. - * - * Copyright (c) 2009 Samsung Electronics - * InKi Dae <inki.dae(a)samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef _S6E63M0_BRIGHTNESS_H -#define _S6E63M0_BRIGHTNESS_H - -#define MAX_GAMMA_LEVEL 11 -#define GAMMA_TABLE_COUNT 21 - -/* gamma value: 2.2 */ -static const unsigned int s6e63m0_22_300[] = { - 0x18, 0x08, 0x24, 0x5f, 0x50, 0x2d, 0xB6, - 0xB9, 0xA7, 0xAd, 0xB1, 0x9f, 0xbe, 0xC0, - 0xB5, 0x00, 0xa0, 0x00, 0xa4, 0x00, 0xdb -}; - -static const unsigned int s6e63m0_22_280[] = { - 0x18, 0x08, 0x24, 0x64, 0x56, 0x33, 0xB6, - 0xBA, 0xA8, 0xAC, 0xB1, 0x9D, 0xC1, 0xC1, - 0xB7, 0x00, 0x9C, 0x00, 0x9F, 0x00, 0xD6 -}; - -static const unsigned int s6e63m0_22_260[] = { - 0x18, 0x08, 0x24, 0x66, 0x58, 0x34, 0xB6, - 0xBA, 0xA7, 0xAF, 0xB3, 0xA0, 0xC1, 0xC2, - 0xB7, 0x00, 0x97, 0x00, 0x9A, 0x00, 0xD1 - -}; - -static const unsigned int s6e63m0_22_240[] = { - 0x18, 0x08, 0x24, 0x62, 0x54, 0x30, 0xB9, - 0xBB, 0xA9, 0xB0, 0xB3, 0xA1, 0xC1, 0xC3, - 0xB7, 0x00, 0x91, 0x00, 0x95, 0x00, 0xDA - -}; -static const unsigned int s6e63m0_22_220[] = { - 0x18, 0x08, 0x24, 0x63, 0x53, 0x31, 0xB8, - 0xBC, 0xA9, 0xB0, 0xB5, 0xA2, 0xC4, 0xC4, - 0xB8, 0x00, 0x8B, 0x00, 0x8E, 0x00, 0xC2 -}; - -static const unsigned int s6e63m0_22_200[] = { - 0x18, 0x08, 0x24, 0x66, 0x55, 0x34, 0xBA, - 0xBD, 0xAB, 0xB1, 0xB5, 0xA3, 0xC5, 0xC6, - 0xB9, 0x00, 0x85, 0x00, 0x88, 0x00, 0xBA -}; - -static const unsigned int s6e63m0_22_170[] = { - 0x18, 0x08, 0x24, 0x69, 0x54, 0x37, 0xBB, - 0xBE, 0xAC, 0xB4, 0xB7, 0xA6, 0xC7, 0xC8, - 0xBC, 0x00, 0x7B, 0x00, 0x7E, 0x00, 0xAB -}; - -static const unsigned int s6e63m0_22_140[] = { - 0x18, 0x08, 0x24, 0x6C, 0x54, 0x3A, 0xBC, - 0xBF, 0xAC, 0xB7, 0xBB, 0xA9, 0xC9, 0xC9, - 0xBE, 0x00, 0x71, 0x00, 0x73, 0x00, 0x9E -}; - -static const unsigned int s6e63m0_22_110[] = { - 0x18, 0x08, 0x24, 0x70, 0x51, 0x3E, 0xBF, - 0xC1, 0xAF, 0xB9, 0xBC, 0xAB, 0xCC, 0xCC, - 0xC2, 0x00, 0x65, 0x00, 0x67, 0x00, 0x8D -}; - -static const unsigned int s6e63m0_22_90[] = { - 0x18, 0x08, 0x24, 0x73, 0x4A, 0x3D, 0xC0, - 0xC2, 0xB1, 0xBB, 0xBE, 0xAC, 0xCE, 0xCF, - 0xC5, 0x00, 0x5D, 0x00, 0x5E, 0x00, 0x82 -}; - -static const unsigned int s6e63m0_22_30[] = { - 0x18, 0x08, 0x24, 0x78, 0xEC, 0x3D, 0xC8, - 0xC2, 0xB6, 0xC4, 0xC7, 0xB6, 0xD5, 0xD7, - 0xCC, 0x00, 0x39, 0x00, 0x36, 0x00, 0x51 -}; - -/* gamma value: 1.9 */ -static const unsigned int s6e63m0_19_300[] = { - 0x18, 0x08, 0x24, 0x61, 0x5F, 0x39, 0xBA, - 0xBD, 0xAD, 0xB1, 0xB6, 0xA5, 0xC4, 0xC5, - 0xBC, 0x00, 0xA0, 0x00, 0xA4, 0x00, 0xDB -}; - -static const unsigned int s6e63m0_19_280[] = { - 0x18, 0x08, 0x24, 0x61, 0x60, 0x39, 0xBB, - 0xBE, 0xAD, 0xB2, 0xB6, 0xA6, 0xC5, 0xC7, - 0xBD, 0x00, 0x9B, 0x00, 0x9E, 0x00, 0xD5 -}; - -static const unsigned int s6e63m0_19_260[] = { - 0x18, 0x08, 0x24, 0x63, 0x61, 0x3B, 0xBA, - 0xBE, 0xAC, 0xB3, 0xB8, 0xA7, 0xC6, 0xC8, - 0xBD, 0x00, 0x96, 0x00, 0x98, 0x00, 0xCF -}; - -static const unsigned int s6e63m0_19_240[] = { - 0x18, 0x08, 0x24, 0x67, 0x64, 0x3F, 0xBB, - 0xBE, 0xAD, 0xB3, 0xB9, 0xA7, 0xC8, 0xC9, - 0xBE, 0x00, 0x90, 0x00, 0x92, 0x00, 0xC8 -}; - -static const unsigned int s6e63m0_19_220[] = { - 0x18, 0x08, 0x24, 0x68, 0x64, 0x40, 0xBC, - 0xBF, 0xAF, 0xB4, 0xBA, 0xA9, 0xC8, 0xCA, - 0xBE, 0x00, 0x8B, 0x00, 0x8C, 0x00, 0xC0 -}; - -static const unsigned int s6e63m0_19_200[] = { - 0x18, 0x08, 0x24, 0x68, 0x64, 0x3F, 0xBE, - 0xC0, 0xB0, 0xB6, 0xBB, 0xAB, 0xC8, 0xCB, - 0xBF, 0x00, 0x85, 0x00, 0x86, 0x00, 0xB8 -}; - -static const unsigned int s6e63m0_19_170[] = { - 0x18, 0x08, 0x24, 0x69, 0x64, 0x40, 0xBF, - 0xC1, 0xB0, 0xB9, 0xBE, 0xAD, 0xCB, 0xCD, - 0xC2, 0x00, 0x7A, 0x00, 0x7B, 0x00, 0xAA -}; - -static const unsigned int s6e63m0_19_140[] = { - 0x18, 0x08, 0x24, 0x6E, 0x65, 0x45, 0xC0, - 0xC3, 0xB2, 0xBA, 0xBE, 0xAE, 0xCD, 0xD0, - 0xC4, 0x00, 0x70, 0x00, 0x70, 0x00, 0x9C -}; - -static const unsigned int s6e63m0_19_110[] = { - 0x18, 0x08, 0x24, 0x6F, 0x65, 0x46, 0xC2, - 0xC4, 0xB3, 0xBF, 0xC2, 0xB2, 0xCF, 0xD1, - 0xC6, 0x00, 0x64, 0x00, 0x64, 0x00, 0x8D -}; - -static const unsigned int s6e63m0_19_90[] = { - 0x18, 0x08, 0x24, 0x74, 0x60, 0x4A, 0xC3, - 0xC6, 0xB5, 0xBF, 0xC3, 0xB2, 0xD2, 0xD3, - 0xC8, 0x00, 0x5B, 0x00, 0x5B, 0x00, 0x81 -}; - -static const unsigned int s6e63m0_19_30[] = { - 0x18, 0x08, 0x24, 0x84, 0x45, 0x4F, 0xCA, - 0xCB, 0xBC, 0xC9, 0xCB, 0xBC, 0xDA, 0xDA, - 0xD0, 0x00, 0x35, 0x00, 0x34, 0x00, 0x4E -}; - -/* gamma value: 1.7 */ -static const unsigned int s6e63m0_17_300[] = { - 0x18, 0x08, 0x24, 0x70, 0x70, 0x4F, 0xBF, - 0xC2, 0xB2, 0xB8, 0xBC, 0xAC, 0xCB, 0xCD, - 0xC3, 0x00, 0xA0, 0x00, 0xA4, 0x00, 0xDB -}; - -static const unsigned int s6e63m0_17_280[] = { - 0x18, 0x08, 0x24, 0x71, 0x71, 0x50, 0xBF, - 0xC2, 0xB2, 0xBA, 0xBE, 0xAE, 0xCB, 0xCD, - 0xC3, 0x00, 0x9C, 0x00, 0x9F, 0x00, 0xD6 -}; - -static const unsigned int s6e63m0_17_260[] = { - 0x18, 0x08, 0x24, 0x72, 0x72, 0x50, 0xC0, - 0xC3, 0xB4, 0xB9, 0xBE, 0xAE, 0xCC, 0xCF, - 0xC4, 0x00, 0x97, 0x00, 0x9A, 0x00, 0xD1 -}; - -static const unsigned int s6e63m0_17_240[] = { - 0x18, 0x08, 0x24, 0x71, 0x72, 0x4F, 0xC2, - 0xC4, 0xB5, 0xBB, 0xBF, 0xB0, 0xCC, 0xCF, - 0xC3, 0x00, 0x91, 0x00, 0x95, 0x00, 0xCA -}; - -static const unsigned int s6e63m0_17_220[] = { - 0x18, 0x08, 0x24, 0x71, 0x73, 0x4F, 0xC2, - 0xC5, 0xB5, 0xBD, 0xC0, 0xB2, 0xCD, 0xD1, - 0xC5, 0x00, 0x8B, 0x00, 0x8E, 0x00, 0xC2 -}; - -static const unsigned int s6e63m0_17_200[] = { - 0x18, 0x08, 0x24, 0x72, 0x75, 0x51, 0xC2, - 0xC6, 0xB5, 0xBF, 0xC1, 0xB3, 0xCE, 0xD1, - 0xC6, 0x00, 0x85, 0x00, 0x88, 0x00, 0xBA -}; - -static const unsigned int s6e63m0_17_170[] = { - 0x18, 0x08, 0x24, 0x75, 0x77, 0x54, 0xC3, - 0xC7, 0xB7, 0xC0, 0xC3, 0xB4, 0xD1, 0xD3, - 0xC9, 0x00, 0x7B, 0x00, 0x7E, 0x00, 0xAB -}; - -static const unsigned int s6e63m0_17_140[] = { - 0x18, 0x08, 0x24, 0x7B, 0x77, 0x58, 0xC3, - 0xC8, 0xB8, 0xC2, 0xC6, 0xB6, 0xD3, 0xD4, - 0xCA, 0x00, 0x71, 0x00, 0x73, 0x00, 0x9E -}; - -static const unsigned int s6e63m0_17_110[] = { - 0x18, 0x08, 0x24, 0x81, 0x7B, 0x5D, 0xC6, - 0xCA, 0xBB, 0xC3, 0xC7, 0xB8, 0xD6, 0xD8, - 0xCD, 0x00, 0x65, 0x00, 0x67, 0x00, 0x8D -}; - -static const unsigned int s6e63m0_17_90[] = { - 0x18, 0x08, 0x24, 0x82, 0x7A, 0x5B, 0xC8, - 0xCB, 0xBD, 0xC5, 0xCA, 0xBA, 0xD6, 0xD8, - 0xCE, 0x00, 0x5D, 0x00, 0x5E, 0x00, 0x82 -}; - -static const unsigned int s6e63m0_17_30[] = { - 0x18, 0x08, 0x24, 0x8F, 0x73, 0x63, 0xD1, - 0xD0, 0xC5, 0xCC, 0xD1, 0xC2, 0xDE, 0xE0, - 0xD6, 0x00, 0x39, 0x00, 0x36, 0x00, 0x51 -}; - -struct s6e63m0_gamma { - unsigned int *gamma_22_table[MAX_GAMMA_LEVEL]; - unsigned int *gamma_19_table[MAX_GAMMA_LEVEL]; - unsigned int *gamma_17_table[MAX_GAMMA_LEVEL]; -}; - -static struct s6e63m0_gamma gamma_table = { - .gamma_22_table[0] = (unsigned int *)&s6e63m0_22_30, - .gamma_22_table[1] = (unsigned int *)&s6e63m0_22_90, - .gamma_22_table[2] = (unsigned int *)&s6e63m0_22_110, - .gamma_22_table[3] = (unsigned int *)&s6e63m0_22_140, - .gamma_22_table[4] = (unsigned int *)&s6e63m0_22_170, - .gamma_22_table[5] = (unsigned int *)&s6e63m0_22_200, - .gamma_22_table[6] = (unsigned int *)&s6e63m0_22_220, - .gamma_22_table[7] = (unsigned int *)&s6e63m0_22_240, - .gamma_22_table[8] = (unsigned int *)&s6e63m0_22_260, - .gamma_22_table[9] = (unsigned int *)&s6e63m0_22_280, - .gamma_22_table[10] = (unsigned int *)&s6e63m0_22_300, - - .gamma_19_table[0] = (unsigned int *)&s6e63m0_19_30, - .gamma_19_table[1] = (unsigned int *)&s6e63m0_19_90, - .gamma_19_table[2] = (unsigned int *)&s6e63m0_19_110, - .gamma_19_table[3] = (unsigned int *)&s6e63m0_19_140, - .gamma_19_table[4] = (unsigned int *)&s6e63m0_19_170, - .gamma_19_table[5] = (unsigned int *)&s6e63m0_19_200, - .gamma_19_table[6] = (unsigned int *)&s6e63m0_19_220, - .gamma_19_table[7] = (unsigned int *)&s6e63m0_19_240, - .gamma_19_table[8] = (unsigned int *)&s6e63m0_19_260, - .gamma_19_table[9] = (unsigned int *)&s6e63m0_19_280, - .gamma_19_table[10] = (unsigned int *)&s6e63m0_19_300, - - .gamma_17_table[0] = (unsigned int *)&s6e63m0_17_30, - .gamma_17_table[1] = (unsigned int *)&s6e63m0_17_90, - .gamma_17_table[2] = (unsigned int *)&s6e63m0_17_110, - .gamma_17_table[3] = (unsigned int *)&s6e63m0_17_140, - .gamma_17_table[4] = (unsigned int *)&s6e63m0_17_170, - .gamma_17_table[5] = (unsigned int *)&s6e63m0_17_200, - .gamma_17_table[6] = (unsigned int *)&s6e63m0_17_220, - .gamma_17_table[7] = (unsigned int *)&s6e63m0_17_240, - .gamma_17_table[8] = (unsigned int *)&s6e63m0_17_260, - .gamma_17_table[9] = (unsigned int *)&s6e63m0_17_280, - .gamma_17_table[10] = (unsigned int *)&s6e63m0_17_300, -}; - -#endif - -- 2.14.1

1 1

[PATCH v5 0/5] drm/ttm,amdgpu: Introduce LRU bulk move functionality
by Huang Rui 02 Sep '18

02 Sep '18

The idea and proposal is originally from Christian, and I continue to work to deliver it. Background: amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move all of them on the end of LRU list one by one. Thus, that cause so many BOs moved to the end of the LRU, and impact performance seriously. Then Christian provided a workaround to not move PD/PT BOs on LRU with below patch: Commit 0bbf32026cf5ba41e9922b30e26e1bed1ecd38ae ("drm/amdgpu: band aid validating VM PTs") However, the final solution should bulk move all PD/PT and PerVM BOs on the LRU instead of one by one. Whenever amdgpu_vm_validate_pt_bos() is called and we have BOs which need to be validated we move all BOs together to the end of the LRU without dropping the lock for the LRU. While doing so we note the beginning and end of this block in the LRU list. Now when amdgpu_vm_validate_pt_bos() is called and we don't have anything to do, we don't move every BO one by one, but instead cut the LRU list into pieces so that we bulk move everything to the end in just one operation. Test data: +--------------+-----------------+-----------+---------------------------------------+ | |The Talos |Clpeak(OCL)|BusSpeedReadback(OCL) | | |Principle(Vulkan)| | | +------------------------------------------------------------------------------------+ | | | |0.319 ms(1k) 0.314 ms(2K) 0.308 ms(4K) | | Original | 147.7 FPS | 76.86 us |0.307 ms(8K) 0.310 ms(16K) | +------------------------------------------------------------------------------------+ | Orignial + WA| | |0.254 ms(1K) 0.241 ms(2K) | |(don't move | 162.1 FPS | 42.15 us |0.230 ms(4K) 0.223 ms(8K) 0.204 ms(16K)| |PT BOs on LRU)| | | | +------------------------------------------------------------------------------------+ | Bulk move | 163.1 FPS | 40.52 us |0.244 ms(1K) 0.252 ms(2K) 0.213 ms(4K) | | | | |0.214 ms(8K) 0.225 ms(16K) | +--------------+-----------------+-----------+---------------------------------------+ After test them with above three benchmarks include vulkan and opencl. We can see the visible improvement than original, and even better than original with workaround. Changes from V1 -> V2: - Fix to missed the BOs in relocated/moved that should be also moved to the end of LRU. Changes from V2 -> V3: - Remove unused parameter and use list_for_each_entry instead of the one with save entry. Changes from V3 -> V4: - Move the amdgpu_vm_move_to_lru_tail after command submission, at that time, all bo will be back on idle list. Changes from V4 -> V5: - Remove amdgpu_vm_move_to_lru_tail_by_list(), use bulk_moveable instread of validated, and move ttm_bo_bulk_move_lru_tail() also into amdgpu_vm_move_to_lru_tail(). Thanks, Ray Christian König (2): drm/ttm: add helper structures for bulk moves on lru list drm/ttm: revise ttm_bo_move_to_lru_tail to support bulk moves Huang Rui (3): drm/ttm: add bulk move function on LRU drm/amdgpu: use bulk moves for efficient VM LRU handling (v5) drm/amdgpu: move PD/PT bos on LRU again drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 10 +++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 68 +++++++++++++++++++---------- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 11 ++++- drivers/gpu/drm/ttm/ttm_bo.c | 78 +++++++++++++++++++++++++++++++++- include/drm/ttm/ttm_bo_api.h | 16 ++++++- include/drm/ttm/ttm_bo_driver.h | 28 ++++++++++++ 6 files changed, 186 insertions(+), 25 deletions(-) -- 2.7.4

5 15

[Bug 105425] 3D & games produce periodic GPU crashes (Radeon R7 370)
by bugzilla-daemon＠freedesktop.org 01 Sep '18

01 Sep '18

https://bugs.freedesktop.org/show_bug.cgi?id=105425 --- Comment #77 from ptrampau(a)gmail.com --- I had the same problem with Xubuntu 17.10 and maybe 18.04 (can't remember). I GPU would hang when watching Videos with mpv or even in Firefox. When I tested gnome-shell this would also sporadically hang. What it solved it for me was to switch from Radeonsi to Amdgpu. (add radeon.si_support=0 radeon.cik_support=0 amdgpu.si_support=1 amdgpu.cik_support=1 to your grub.cfg kernel boot parameters) Now I've upgraded to 18.10 and decided to give radensi another try (mainly because VLC refuses to deinterlace mpeg2 under amdgpu for some reason) and it works without problems for about ~2 weeks daily use. MSI R7 370 4G FX 8320 Gigabyte GA-970A-DS3P FX -- You are receiving this mail because: You are the assignee for the bug.

1 0

[Bug 107687] [wine] Brink compatible pixel format not found
by bugzilla-daemon＠freedesktop.org 01 Sep '18

01 Sep '18

https://bugs.freedesktop.org/show_bug.cgi?id=107687 Bug ID: 107687 Summary: [wine] Brink compatible pixel format not found Product: Mesa Version: 18.2 Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/Gallium/radeonsi Assignee: dri-devel(a)lists.freedesktop.org Reporter: sa(a)whiz.se QA Contact: dri-devel(a)lists.freedesktop.org Created attachment 141278 --> https://bugs.freedesktop.org/attachment.cgi?id=141278&action=edit wine log with +wgl The game Brink (running with Steam Proton/Wine) fails to start with the following error: wglChoosePixelFormatARB failed to find a suitable format. Resetting r_multiSamples to allow rendering context to be created. wglChoosePixelFormatARB failed to find a suitable format. The error from Wine is: 0029:warn:wgl:X11DRV_wglChoosePixelFormatARB Compatible Pixel Format not found a full log from Wine with +wgl is attached. This is an old idTech 4 game requiring a compatibility context. I haven't tried it before, but it does have a platinum rating in Wine. The game is available free of charge on Steam. There was a previous issue with pixel formats that was resolved. I'm not sure if this is a similar problem. See bug #47478 and https://bugs.winehq.org/show_bug.cgi?id=26763 Using 18.2.0~rc4 on TONGA. -- You are receiving this mail because: You are the assignee for the bug.

1 5

[Bug 107153] 4.18-rc3 crash on hdmi (0010:dm_update_crtcs_state+0x41e/0x4a0)
by bugzilla-daemon＠freedesktop.org 01 Sep '18

01 Sep '18

https://bugs.freedesktop.org/show_bug.cgi?id=107153 Bug ID: 107153 Summary: 4.18-rc3 crash on hdmi (0010:dm_update_crtcs_state+0x41e/0x4a0) Product: DRI Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: blocker Priority: medium Component: DRM/AMDgpu Assignee: dri-devel(a)lists.freedesktop.org Reporter: patrik.kullman(a)gmail.com Just installed Ubuntu 18.04 on my Hades Canyon Intel NUC with Vega M graphics. To get it to work I have installed the latest BIOS (44), a 4.18-rc3 kernel from http://kernel.ubuntu.com/~kernel-ppa/mainline/v4.18-rc3/, the Vega M firmware from https://people.freedesktop.org/~agd5f/radeon_ucode/vegam/ and mesa 18.1 from https://launchpad.net/~ubuntu-x-swat/+archive/ubuntu/updates?field.series_f…. Now, when booting it with HDMI connected to an Onkyo TX-NR555 receiver through HDMI, it hangs on boot. If I disconnect the HDMI while booting and reconnect it after boot, I get the following crash: [ 268.434749] [drm] fb mappable at 0x2000A28000 [ 268.434750] [drm] vram apper at 0x2000000000 [ 268.434750] [drm] size 35389440 [ 268.434751] [drm] fb depth is 24 [ 268.434751] [drm] pitch is 16384 [ 268.434811] fbcon: amdgpudrmfb (fb0) is primary device [ 268.643348] Console: switching to colour frame buffer device 512x135 [ 268.659459] amdgpu 0000:01:00.0: fb0: amdgpudrmfb frame buffer device [ 268.676523] ------------[ cut here ]------------ [ 268.676523] kernel BUG at /home/kernel/COD/linux/drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:4784! [ 268.676527] invalid opcode: 0000 [#1] SMP PTI [ 268.676528] CPU: 6 PID: 898 Comm: Xorg Tainted: G W 4.18.0-041800rc3-generic #201807012030 [ 268.676529] Hardware name: Intel Corporation NUC8i7HVK/NUC8i7HVB, BIOS HNKBLi70.86A.0044.2018.0615.1726 06/15/2018 [ 268.676567] RIP: 0010:dm_update_crtcs_state+0x41e/0x4a0 [amdgpu] [ 268.676567] Code: e9 8f fd ff ff 8b 45 c0 48 8d 65 d8 5b 41 5c 41 5d 41 5e 41 5f 5d c3 48 83 bb 08 0d 00 00 00 0f 85 08 ff ff ff e9 fc fe ff ff <0f> 0b b8 ea ff ff ff e9 ca fc ff ff 41 8b 4e 60 48 c7 c2 30 eb 57 [ 268.676579] RSP: 0018:ffffb43642be7a18 EFLAGS: 00010246 [ 268.676580] RAX: ffff9014665e0001 RBX: 0000000000000000 RCX: 00000000000010b8 [ 268.676581] RDX: 00000000000010b7 RSI: ffff90147eda7160 RDI: ffff90146e002f00 [ 268.676581] RBP: ffffb43642be7a78 R08: 0000000000027160 R09: ffffffffc0534386 [ 268.676582] R10: fffffc7211997800 R11: 00000000f0000080 R12: ffff901464f30f80 [ 268.676582] R13: 0000000000000000 R14: ffff901460322800 R15: ffff9014665e0c00 [ 268.676583] FS: 00007fde55c2c600(0000) GS:ffff90147ed80000(0000) knlGS:0000000000000000 [ 268.676583] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 268.676584] CR2: 0000555b891b2670 CR3: 000000046307c005 CR4: 00000000003606e0 [ 268.676584] Call Trace: [ 268.676612] amdgpu_dm_atomic_check+0x18e/0x3d0 [amdgpu] [ 268.676614] ? radix_tree_lookup+0xd/0x10 [ 268.676626] drm_atomic_check_only+0x33b/0x510 [drm] [ 268.676631] drm_atomic_commit+0x18/0x50 [drm] [ 268.676637] drm_atomic_helper_set_config+0x7c/0x90 [drm_kms_helper] [ 268.676642] __drm_mode_set_config_internal+0x6b/0x120 [drm] [ 268.676647] drm_mode_setcrtc+0x4b0/0x6a0 [drm] [ 268.676652] ? drm_mode_getcrtc+0x1a0/0x1a0 [drm] [ 268.676656] drm_ioctl_kernel+0xa4/0xf0 [drm] [ 268.676660] drm_ioctl+0x37b/0x440 [drm] [ 268.676664] ? drm_mode_getcrtc+0x1a0/0x1a0 [drm] [ 268.676680] amdgpu_drm_ioctl+0x4f/0x90 [amdgpu] [ 268.676682] do_vfs_ioctl+0xa8/0x630 [ 268.676683] ? recalc_sigpending+0x1b/0x50 [ 268.676685] ? _copy_from_user+0x3e/0x60 [ 268.676686] ksys_ioctl+0x75/0x80 [ 268.676687] __x64_sys_ioctl+0x1a/0x20 [ 268.676688] do_syscall_64+0x5a/0x120 [ 268.676690] entry_SYSCALL_64_after_hwframe+0x44/0xa9 [ 268.676690] RIP: 0033:0x7fde530215d7 [ 268.676691] Code: b3 66 90 48 8b 05 b1 48 2d 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 81 48 2d 00 f7 d8 64 89 01 48 [ 268.676703] RSP: 002b:00007ffff62d35d8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 268.676704] RAX: ffffffffffffffda RBX: 00007ffff62d3610 RCX: 00007fde530215d7 [ 268.676704] RDX: 00007ffff62d3610 RSI: 00000000c06864a2 RDI: 000000000000000c [ 268.676705] RBP: 00007ffff62d3610 R08: 0000000000000000 R09: 0000555b891a3690 [ 268.676705] R10: 00007ffff62d36d0 R11: 0000000000000246 R12: 00000000c06864a2 [ 268.676706] R13: 000000000000000c R14: 0000000000000000 R15: 0000555b891a3690 [ 268.676706] Modules linked in: ccm thunderbolt rfcomm cmac bnep arc4 nls_iso8859_1 8250_dw intel_rapl x86_pkg_temp_thermal intel_powerclamp snd_hda_codec_realtek snd_hda_codec_generic coretemp snd_hda_codec_hdmi kvm_intel snd_hda_intel kvm snd_hda_codec irqbypass snd_hda_core morus1280_avx2 morus1280_sse2 morus1280_glue snd_hwdep morus640_sse2 morus640_glue snd_pcm iwlmvm aegis256_aesni aegis128l_aesni mac80211 aegis128_aesni crct10dif_pclmul crc32_pclmul ghash_clmulni_intel pcbc snd_seq_midi snd_seq_midi_event snd_rawmidi aesni_intel aes_x86_64 snd_seq crypto_simd cryptd glue_helper iwlwifi intel_cstate intel_rapl_perf idma64 btusb virt_dma snd_seq_device btrtl snd_timer btbcm btintel bluetooth snd ir_rc6_decoder wmi_bmof intel_wmi_thunderbolt mei_me input_leds cfg80211 serio_raw intel_lpss_pci [ 268.676724] ecdh_generic tps6598x mei intel_lpss intel_pch_thermal soundcore typec rc_rc6_mce ite_cir rc_core acpi_pad mac_hid sch_fq_codel parport_pc ppdev lp parport ip_tables x_tables hid_generic usbhid hid amdkfd amd_iommu_v2 amdgpu chash gpu_sched ttm drm_kms_helper syscopyarea psmouse sysfillrect sysimgblt fb_sys_fops igb e1000e drm sdhci_pci dca cqhci i2c_algo_bit sdhci wmi pinctrl_sunrisepoint video pinctrl_intel [ 268.676737] ---[ end trace e2c9200fd11b91c9 ]--- [ 268.676763] RIP: 0010:dm_update_crtcs_state+0x41e/0x4a0 [amdgpu] [ 268.676763] Code: e9 8f fd ff ff 8b 45 c0 48 8d 65 d8 5b 41 5c 41 5d 41 5e 41 5f 5d c3 48 83 bb 08 0d 00 00 00 0f 85 08 ff ff ff e9 fc fe ff ff <0f> 0b b8 ea ff ff ff e9 ca fc ff ff 41 8b 4e 60 48 c7 c2 30 eb 57 [ 268.676777] RSP: 0018:ffffb43642be7a18 EFLAGS: 00010246 [ 268.676778] RAX: ffff9014665e0001 RBX: 0000000000000000 RCX: 00000000000010b8 [ 268.676778] RDX: 00000000000010b7 RSI: ffff90147eda7160 RDI: ffff90146e002f00 [ 268.676779] RBP: ffffb43642be7a78 R08: 0000000000027160 R09: ffffffffc0534386 [ 268.676779] R10: fffffc7211997800 R11: 00000000f0000080 R12: ffff901464f30f80 [ 268.676780] R13: 0000000000000000 R14: ffff901460322800 R15: ffff9014665e0c00 [ 268.676780] FS: 00007fde55c2c600(0000) GS:ffff90147ed80000(0000) knlGS:0000000000000000 [ 268.676781] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 268.676781] CR2: 0000555b891b2670 CR3: 000000046307c005 CR4: 00000000003606e0 I assume that this is what happens and hangs it when the cable is connected on boot as well. -- You are receiving this mail because: You are the assignee for the bug.

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dri-devel September 2018