dri-devel March 2019

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2102 discussions

[PATCH] [v4,2/2] drm/panel: Add Boe Himax8279d MIPI-DSI LCD panel
by Jerry Han 04 Mar '19

04 Mar '19

Support Boe Himax8279d 8.0" 1200x1920 TFT LCD panel, it is a MIPI DSI panel. Signed-off-by: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> Cc: Jitao Shi <jitao.shi(a)mediatek.com> Cc: Nick Sanders <nsanders(a)google.com> Cc: YH Lin <yueherngl(a)chromium.org> Cc: Rock wang <rock_wang(a)himax.com.cn> --- MAINTAINERS | 6 + drivers/gpu/drm/panel/Kconfig | 22 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-boe-himax8279d.c | 1070 ++++++++++++++++++++++++++ 4 files changed, 1099 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-boe-himax8279d.c diff --git a/MAINTAINERS b/MAINTAINERS index b2f710e..095fbbe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4624,6 +4624,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc S: Maintained F: drivers/gpu/drm/bochs/ +DRM DRIVER FOR BOE HIMAX8279D PANELS +M: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> +S: Maintained +F: drivers/gpu/drm/panel/panel-boe-himax8279d.c +F: Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt + DRM DRIVER FOR FARADAY TVE200 TV ENCODER M: Linus Walleij <linus.walleij(a)linaro.org> T: git git://anongit.freedesktop.org/drm/drm-misc diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 6020c30..d611424 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -17,6 +17,17 @@ config DRM_PANEL_ARM_VERSATILE reference designs. The panel is detected using special registers in the Versatile family syscon registers. +config DRM_PANEL_BOE_HIMAX8279D + tristate "Boe Himax8279d panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Boe Himax8279d + TFT-LCD modules. The panel has a 1200x1920 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + config DRM_PANEL_LVDS tristate "Generic LVDS panel driver" depends on OF @@ -186,4 +197,15 @@ config DRM_PANEL_SITRONIX_ST7789V Say Y here if you want to enable support for the Sitronix ST7789V controller for 240x320 LCD panels +config DRM_PANEL_BOE_HIMAX8279D + tristate "Boe Himax8279d panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Same type + TFT-LCD modules. The panel has a 1200x1920 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + endmenu diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 5ccaaa9..7285539 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o +obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c new file mode 100644 index 0000000..aa7d912 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c @@ -0,0 +1,1070 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019, Huaqin Telecom Technology Co., Ltd + * + * Author: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> + * + */ + +#include <linux/backlight.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> + +#include <linux/gpio/consumer.h> +#include <linux/regulator/consumer.h> + +#include <drm/drm_device.h> +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> +#include <drm/drm_print.h> + +#include <video/mipi_display.h> + +struct panel_cmd { + size_t len; + const char *data; +}; + +#define _INIT_CMD(...) { \ + .len = sizeof((char[]){__VA_ARGS__}), \ + .data = (char[]){__VA_ARGS__} } + +struct panel_desc { + const struct drm_display_mode *display_mode; + unsigned int bpc; + unsigned int width_mm; + unsigned int height_mm; + + unsigned int delay_t1; + unsigned int reset_delay_t2; + unsigned int reset_delay_t3; + unsigned int reset_delay_t4; + unsigned int reset_delay_t5; + + unsigned long mode_flags; + enum mipi_dsi_pixel_format format; + unsigned int lanes; + const struct panel_cmd *on_cmds; + const struct panel_cmd *off_cmds; +}; + +struct panel_info { + struct drm_panel base; + struct mipi_dsi_device *link; + const struct panel_desc *desc; + + struct backlight_device *backlight; + struct gpio_desc *enable_gpio; + struct gpio_desc *pp33_gpio; + struct gpio_desc *pp18_gpio; + + bool prepared; + bool enabled; +}; + +static inline struct panel_info *to_panel_info(struct drm_panel *panel) +{ + return container_of(panel, struct panel_info, base); +} + +void set_gpios(struct panel_info *pinfo, int enable) +{ + gpiod_set_value(pinfo->enable_gpio, enable); + gpiod_set_value(pinfo->pp33_gpio, enable); + gpiod_set_value(pinfo->pp18_gpio, enable); +} + +static int send_mipi_cmds(struct drm_panel *panel, const struct panel_cmd *cmds) +{ + struct panel_info *pinfo = to_panel_info(panel); + unsigned int i = 0; + int err; + + if (!cmds) + return -EFAULT; + + for (i = 0; cmds[i].len != 0; i++) { + const struct panel_cmd *cmd = &cmds[i]; + + if (cmd->len == 2) + err = mipi_dsi_dcs_write(pinfo->link, + cmd->data[1], NULL, 0); + else + err = mipi_dsi_dcs_write(pinfo->link, + cmd->data[1], cmd->data + 2, + cmd->len - 2); + + if (err < 0) + return err; + + usleep_range((cmd->data[0]) * 1000, + (1 + cmd->data[0]) * 1000); + } + + return 0; +} + +static int boe_panel_disable(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + + backlight_disable(pinfo->backlight); + + pinfo->enabled = false; + + return 0; +} + +static int boe_panel_unprepare(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + int err; + + if (!pinfo->prepared) + return 0; + + /* send off code */ + err = send_mipi_cmds(panel, pinfo->desc->off_cmds); + if (err < 0) { + dev_err(panel->dev, + "failed to send DCS Off Code: %d\n", + err); + goto poweroff; + } + + set_gpios(pinfo, 0); + + pinfo->prepared = false; + + return 0; + +poweroff: + set_gpios(pinfo, 0); + return err; +} + +static int boe_panel_prepare(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + const struct panel_desc *desc = pinfo->desc; + int err; + + if (pinfo->prepared) + return 0; + + gpiod_set_value(pinfo->pp18_gpio, 1); + /* T1 (> 5ms) */ + usleep_range(desc->delay_t1, 1000 + desc->delay_t1); + gpiod_set_value(pinfo->pp33_gpio, 1); + + /* reset sequence */ + usleep_range(desc->reset_delay_t2, 1000 + desc->reset_delay_t2); + + if (desc->reset_delay_t3) { + gpiod_set_value(pinfo->enable_gpio, 1); + usleep_range(desc->reset_delay_t3, 1000 + desc->reset_delay_t3); + gpiod_set_value(pinfo->enable_gpio, 0); + } + + usleep_range(desc->reset_delay_t4, 1000 + desc->reset_delay_t4); + gpiod_set_value(pinfo->enable_gpio, 1); + + if (desc->reset_delay_t5) + usleep_range(desc->reset_delay_t5, 1000 + desc->reset_delay_t5); + + /* send init code */ + err = send_mipi_cmds(panel, pinfo->desc->on_cmds); + if (err < 0) { + dev_err(panel->dev, + "failed to send DCS Init Code: %d\n", + err); + goto poweroff; + } + + pinfo->prepared = true; + + return 0; + +poweroff: + set_gpios(pinfo, 0); + return err; +} + +static int boe_panel_enable(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + int ret; + + if (pinfo->enabled) + return 0; + + ret = backlight_enable(pinfo->backlight); + if (ret) { + DRM_DEV_ERROR(panel->drm->dev, + "Failed to enable backlight %d\n", ret); + return ret; + } + + pinfo->enabled = true; + + return 0; +} + +static int boe_panel_get_modes(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + const struct drm_display_mode *m = pinfo->desc->display_mode; + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(panel->drm, m); + if (!mode) { + DRM_DEV_ERROR(panel->drm->dev, "failed to add mode %ux%u@%u\n", + m->hdisplay, m->vdisplay, m->vrefresh); + return -ENOMEM; + } + + drm_mode_set_name(mode); + + drm_mode_probed_add(panel->connector, mode); + + panel->connector->display_info.width_mm = pinfo->desc->width_mm; + panel->connector->display_info.height_mm = pinfo->desc->height_mm; + panel->connector->display_info.bpc = pinfo->desc->bpc; + + return 1; +} + +static const struct drm_panel_funcs panel_funcs = { + .disable = boe_panel_disable, + .unprepare = boe_panel_unprepare, + .prepare = boe_panel_prepare, + .enable = boe_panel_enable, + .get_modes = boe_panel_get_modes, +}; + +/* 8 inch */ +static const struct drm_display_mode boe_himax8279d8p_display_mode = { + .clock = 159420, + .hdisplay = 1200, + .hsync_start = 1200 + 80, + .hsync_end = 1200 + 80 + 60, + .htotal = 1200 + 80 + 60 + 24, + .vdisplay = 1920, + .vsync_start = 1920 + 10, + .vsync_end = 1920 + 10 + 14, + .vtotal = 1920 + 10 + 14 + 4, + .vrefresh = 60, +}; + +static const struct panel_cmd boe_himax8279d8p_on_cmds[] = { + _INIT_CMD(0x22, 0x10), + _INIT_CMD(0x00, 0xB0, 0x05), + _INIT_CMD(0x00, 0xB1, 0xE5), + _INIT_CMD(0x00, 0xB3, 0x52), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x88), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB2, 0x50), + _INIT_CMD(0x00, 0xB6, 0x03), + _INIT_CMD(0x00, 0xBA, 0x8B), + _INIT_CMD(0x00, 0xBF, 0x15), + _INIT_CMD(0x00, 0xC0, 0x0F), + _INIT_CMD(0x00, 0xC2, 0x0C), + _INIT_CMD(0x00, 0xC3, 0x02), + _INIT_CMD(0x00, 0xC4, 0x0C), + _INIT_CMD(0x00, 0xC5, 0x02), + _INIT_CMD(0x00, 0xB0, 0x01), + _INIT_CMD(0x00, 0xE0, 0x26), + _INIT_CMD(0x00, 0xE1, 0x26), + _INIT_CMD(0x00, 0xDC, 0x00), + _INIT_CMD(0x00, 0xDD, 0x00), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x26), + _INIT_CMD(0x00, 0xC8, 0x00), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xD2, 0x04), + _INIT_CMD(0x00, 0xD3, 0x04), + _INIT_CMD(0x00, 0xE6, 0x03), + _INIT_CMD(0x00, 0xE7, 0x03), + _INIT_CMD(0x00, 0xC4, 0x08), + _INIT_CMD(0x00, 0xC5, 0x08), + _INIT_CMD(0x00, 0xD8, 0x07), + _INIT_CMD(0x00, 0xD9, 0x07), + _INIT_CMD(0x00, 0xC2, 0x06), + _INIT_CMD(0x00, 0xC3, 0x06), + _INIT_CMD(0x00, 0xD6, 0x05), + _INIT_CMD(0x00, 0xD7, 0x05), + _INIT_CMD(0x00, 0xC0, 0x0C), + _INIT_CMD(0x00, 0xC1, 0x0C), + _INIT_CMD(0x00, 0xD4, 0x0B), + _INIT_CMD(0x00, 0xD5, 0x0B), + _INIT_CMD(0x00, 0xCA, 0x0A), + _INIT_CMD(0x00, 0xCB, 0x0A), + _INIT_CMD(0x00, 0xDE, 0x09), + _INIT_CMD(0x00, 0xDF, 0x09), + _INIT_CMD(0x00, 0xC6, 0x26), + _INIT_CMD(0x00, 0xC7, 0x26), + _INIT_CMD(0x00, 0xCE, 0x00), + _INIT_CMD(0x00, 0xCF, 0x00), + _INIT_CMD(0x00, 0xDA, 0x26), + _INIT_CMD(0x00, 0xDB, 0x26), + _INIT_CMD(0x00, 0xE2, 0x00), + _INIT_CMD(0x00, 0xE3, 0x00), + _INIT_CMD(0x00, 0xB0, 0x02), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xC1, 0x07), + _INIT_CMD(0x00, 0xC2, 0x0D), + _INIT_CMD(0x00, 0xC3, 0x18), + _INIT_CMD(0x00, 0xC4, 0x27), + _INIT_CMD(0x00, 0xC5, 0x28), + _INIT_CMD(0x00, 0xC6, 0x30), + _INIT_CMD(0x00, 0xC7, 0x2E), + _INIT_CMD(0x00, 0xC8, 0x2F), + _INIT_CMD(0x00, 0xC9, 0x1A), + _INIT_CMD(0x00, 0xCA, 0x20), + _INIT_CMD(0x00, 0xCB, 0x29), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x32), + _INIT_CMD(0x00, 0xCE, 0x33), + _INIT_CMD(0x00, 0xCF, 0x31), + _INIT_CMD(0x00, 0xD0, 0x06), + _INIT_CMD(0x00, 0xD2, 0x00), + _INIT_CMD(0x00, 0xD3, 0x07), + _INIT_CMD(0x00, 0xD4, 0x12), + _INIT_CMD(0x00, 0xD5, 0x26), + _INIT_CMD(0x00, 0xD6, 0x3D), + _INIT_CMD(0x00, 0xD7, 0x3F), + _INIT_CMD(0x00, 0xD8, 0x3F), + _INIT_CMD(0x00, 0xD9, 0x3F), + _INIT_CMD(0x00, 0xDA, 0x3F), + _INIT_CMD(0x00, 0xDB, 0x3F), + _INIT_CMD(0x00, 0xDC, 0x3F), + _INIT_CMD(0x00, 0xDD, 0x3F), + _INIT_CMD(0x00, 0xDE, 0x3F), + _INIT_CMD(0x00, 0xDF, 0x3A), + _INIT_CMD(0x00, 0xE0, 0x37), + _INIT_CMD(0x00, 0xE1, 0x35), + _INIT_CMD(0x00, 0xE2, 0x07), + _INIT_CMD(0x00, 0xB0, 0x03), + _INIT_CMD(0x00, 0xC8, 0x0B), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xC3, 0x00), + _INIT_CMD(0x00, 0xE7, 0x00), + _INIT_CMD(0x00, 0xC5, 0x2A), + _INIT_CMD(0x00, 0xDE, 0x2A), + _INIT_CMD(0x00, 0xCA, 0x43), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xE4, 0xC0), + _INIT_CMD(0x00, 0xE5, 0x0D), + _INIT_CMD(0x00, 0xCB, 0x00), + _INIT_CMD(0x00, 0xB0, 0x06), + _INIT_CMD(0x00, 0xB8, 0xA5), + _INIT_CMD(0x00, 0xC0, 0xA5), + _INIT_CMD(0x00, 0xC7, 0x0F), + _INIT_CMD(0x00, 0xD5, 0x32), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xBC, 0x00), + _INIT_CMD(0x00, 0xB0, 0x07), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x08), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x05, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x09), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0A), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0B), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x05, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0C), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x64, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x08), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x0A, 0xB8, 0x68), + _INIT_CMD(0x78, 0x11), + _INIT_CMD(0x14, 0x29), + + {}, +}; + +static const struct panel_cmd boe_himax8279d8p_off_cmds[] = { + _INIT_CMD(0x00, 0x28), + _INIT_CMD(0x01, 0x10), + + {}, +}; + +static const struct panel_desc boe_himax8279d8p_panel_desc = { + .display_mode = &boe_himax8279d8p_display_mode, + .bpc = 8, + .width_mm = 107, + .height_mm = 172, + .delay_t1 = 5000, + .reset_delay_t2 = 14000, + .reset_delay_t3 = 1000, + .reset_delay_t4 = 1000, + .reset_delay_t5 = 5000, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, + .on_cmds = boe_himax8279d8p_on_cmds, + .off_cmds = boe_himax8279d8p_off_cmds, +}; + +/* 10 inch */ +static const struct drm_display_mode boe_himax8279d10p_display_mode = { + .clock = 159420, + .hdisplay = 1200, + .hsync_start = 1200 + 80, + .hsync_end = 1200 + 80 + 60, + .htotal = 1200 + 80 + 60 + 24, + .vdisplay = 1920, + .vsync_start = 1920 + 10, + .vsync_end = 1920 + 10 + 14, + .vtotal = 1920 + 10 + 14 + 4, + .vrefresh = 60, +}; + +static const struct panel_cmd boe_himax8279d10p_on_cmds[] = { + _INIT_CMD(0x00, 0xB0, 0x05), + _INIT_CMD(0x00, 0xB1, 0xE5), + _INIT_CMD(0x00, 0xB3, 0x52), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x88), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB2, 0x50), + _INIT_CMD(0x00, 0xB6, 0x03), + _INIT_CMD(0x00, 0xBA, 0x8B), + _INIT_CMD(0x00, 0xBF, 0x1A), + _INIT_CMD(0x00, 0xC0, 0x0F), + _INIT_CMD(0x00, 0xC2, 0x0C), + _INIT_CMD(0x00, 0xC3, 0x02), + _INIT_CMD(0x00, 0xC4, 0x0C), + _INIT_CMD(0x00, 0xC5, 0x02), + _INIT_CMD(0x00, 0xB0, 0x01), + _INIT_CMD(0x00, 0xE0, 0x26), + _INIT_CMD(0x00, 0xE1, 0x26), + _INIT_CMD(0x00, 0xDC, 0x00), + _INIT_CMD(0x00, 0xDD, 0x00), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x26), + _INIT_CMD(0x00, 0xC8, 0x00), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xD2, 0x04), + _INIT_CMD(0x00, 0xD3, 0x04), + _INIT_CMD(0x00, 0xE6, 0x03), + _INIT_CMD(0x00, 0xE7, 0x03), + _INIT_CMD(0x00, 0xC4, 0x08), + _INIT_CMD(0x00, 0xC5, 0x08), + _INIT_CMD(0x00, 0xD8, 0x07), + _INIT_CMD(0x00, 0xD9, 0x07), + _INIT_CMD(0x00, 0xC2, 0x06), + _INIT_CMD(0x00, 0xC3, 0x06), + _INIT_CMD(0x00, 0xD6, 0x05), + _INIT_CMD(0x00, 0xD7, 0x05), + _INIT_CMD(0x00, 0xC0, 0x0C), + _INIT_CMD(0x00, 0xC1, 0x0C), + _INIT_CMD(0x00, 0xD4, 0x0B), + _INIT_CMD(0x00, 0xD5, 0x0B), + _INIT_CMD(0x00, 0xCA, 0x0A), + _INIT_CMD(0x00, 0xCB, 0x0A), + _INIT_CMD(0x00, 0xDE, 0x09), + _INIT_CMD(0x00, 0xDF, 0x09), + _INIT_CMD(0x00, 0xC6, 0x26), + _INIT_CMD(0x00, 0xC7, 0x26), + _INIT_CMD(0x00, 0xCE, 0x00), + _INIT_CMD(0x00, 0xCF, 0x00), + _INIT_CMD(0x00, 0xDA, 0x26), + _INIT_CMD(0x00, 0xDB, 0x26), + _INIT_CMD(0x00, 0xE2, 0x00), + _INIT_CMD(0x00, 0xE3, 0x00), + _INIT_CMD(0x00, 0xB0, 0x02), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xC1, 0x07), + _INIT_CMD(0x00, 0xC2, 0x0D), + _INIT_CMD(0x00, 0xC3, 0x18), + _INIT_CMD(0x00, 0xC4, 0x27), + _INIT_CMD(0x00, 0xC5, 0x28), + _INIT_CMD(0x00, 0xC6, 0x30), + _INIT_CMD(0x00, 0xC7, 0x2E), + _INIT_CMD(0x00, 0xC8, 0x2F), + _INIT_CMD(0x00, 0xC9, 0x1A), + _INIT_CMD(0x00, 0xCA, 0x20), + _INIT_CMD(0x00, 0xCB, 0x29), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x32), + _INIT_CMD(0x00, 0xCE, 0x33), + _INIT_CMD(0x00, 0xCF, 0x31), + _INIT_CMD(0x00, 0xD0, 0x06), + _INIT_CMD(0x00, 0xD2, 0x00), + _INIT_CMD(0x00, 0xD3, 0x07), + _INIT_CMD(0x00, 0xD4, 0x12), + _INIT_CMD(0x00, 0xD5, 0x26), + _INIT_CMD(0x00, 0xD6, 0x3D), + _INIT_CMD(0x00, 0xD7, 0x3F), + _INIT_CMD(0x00, 0xD8, 0x3F), + _INIT_CMD(0x00, 0xD9, 0x3F), + _INIT_CMD(0x00, 0xDA, 0x3F), + _INIT_CMD(0x00, 0xDB, 0x3F), + _INIT_CMD(0x00, 0xDC, 0x3F), + _INIT_CMD(0x00, 0xDD, 0x3F), + _INIT_CMD(0x00, 0xDE, 0x3F), + _INIT_CMD(0x00, 0xDF, 0x3A), + _INIT_CMD(0x00, 0xE0, 0x37), + _INIT_CMD(0x00, 0xE1, 0x35), + _INIT_CMD(0x00, 0xE2, 0x07), + _INIT_CMD(0x00, 0xB0, 0x03), + _INIT_CMD(0x00, 0xC8, 0x0B), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xC3, 0x00), + _INIT_CMD(0x00, 0xE7, 0x00), + _INIT_CMD(0x00, 0xC5, 0x2A), + _INIT_CMD(0x00, 0xDE, 0x2A), + _INIT_CMD(0x00, 0xCA, 0x43), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xE4, 0xC0), + _INIT_CMD(0x00, 0xE5, 0x0D), + _INIT_CMD(0x00, 0xCB, 0x00), + _INIT_CMD(0x00, 0xB0, 0x06), + _INIT_CMD(0x00, 0xB8, 0xA5), + _INIT_CMD(0x00, 0xC0, 0xA5), + _INIT_CMD(0x00, 0xC7, 0x0F), + _INIT_CMD(0x00, 0xD5, 0x32), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xBC, 0x00), + _INIT_CMD(0x00, 0xB0, 0x07), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x08), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x00, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x09), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0A), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0B), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x00, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0C), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x08), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x64, 0xB8, 0x68), + + {}, +}; + +static const struct panel_cmd boe_himax8279d10p_off_cmds[] = { + _INIT_CMD(0x00, 0x28), + _INIT_CMD(0x01, 0x10), + + {}, +}; + +static const struct panel_desc boe_himax8279d10p_panel_desc = { + .display_mode = &boe_himax8279d10p_display_mode, + .bpc = 8, + .width_mm = 135, + .height_mm = 216, + .delay_t1 = 5000, + .reset_delay_t2 = 14000, + .reset_delay_t3 = 1000, + .reset_delay_t4 = 1000, + .reset_delay_t5 = 5000, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, + .on_cmds = boe_himax8279d10p_on_cmds, + .off_cmds = boe_himax8279d10p_off_cmds, +}; + +static const struct of_device_id panel_of_match[] = { + { .compatible = "boe,himax8279d8p", + .data = &boe_himax8279d8p_panel_desc + }, { .compatible = "boe,himax8279d10p", + .data = &boe_himax8279d10p_panel_desc + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, panel_of_match); + +static int panel_add(struct panel_info *pinfo) +{ + struct device *dev = &pinfo->link->dev; + int err; + + pinfo->pp18_gpio = devm_gpiod_get_optional(dev, "pp18", GPIOD_OUT_LOW); + if (IS_ERR(pinfo->pp18_gpio)) { + err = PTR_ERR(pinfo->pp18_gpio); + dev_err(dev, "failed to get pp18 gpio: %d\n", err); + pinfo->pp18_gpio = NULL; + } + + pinfo->pp33_gpio = devm_gpiod_get_optional(dev, "pp33", GPIOD_OUT_LOW); + if (IS_ERR(pinfo->pp33_gpio)) { + err = PTR_ERR(pinfo->pp33_gpio); + dev_err(dev, "failed to get pp33 gpio: %d\n", err); + pinfo->pp33_gpio = NULL; + } + + pinfo->enable_gpio = devm_gpiod_get_optional(dev, "enable", + GPIOD_OUT_LOW); + if (IS_ERR(pinfo->enable_gpio)) { + err = PTR_ERR(pinfo->enable_gpio); + dev_err(dev, "failed to get enable gpio: %d\n", err); + pinfo->enable_gpio = NULL; + } + + pinfo->backlight = devm_of_find_backlight(dev); + if (IS_ERR(pinfo->backlight)) + return PTR_ERR(pinfo->backlight); + + drm_panel_init(&pinfo->base); + pinfo->base.funcs = &panel_funcs; + pinfo->base.dev = &pinfo->link->dev; + + err = drm_panel_add(&pinfo->base); + if (err < 0) + return err; + + return 0; +} + +static void panel_del(struct panel_info *pinfo) +{ + if (pinfo->base.dev) + drm_panel_remove(&pinfo->base); +} + +static int panel_probe(struct mipi_dsi_device *dsi) +{ + struct panel_info *pinfo; + const struct panel_desc *desc; + int err; + + pinfo = devm_kzalloc(&dsi->dev, sizeof(*pinfo), GFP_KERNEL); + if (!pinfo) + return -ENOMEM; + + desc = of_device_get_match_data(&dsi->dev); + dsi->mode_flags = desc->mode_flags; + dsi->format = desc->format; + dsi->lanes = desc->lanes; + pinfo->desc = desc; + + pinfo->link = dsi; + mipi_dsi_set_drvdata(dsi, pinfo); + + err = panel_add(pinfo); + if (err < 0) + return err; + + return mipi_dsi_attach(dsi); +} + +static int panel_remove(struct mipi_dsi_device *dsi) +{ + struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi); + int err; + + err = boe_panel_unprepare(&pinfo->base); + if (err < 0) + DRM_DEV_ERROR(&dsi->dev, "failed to unprepare panel: %d\n", + err); + + err = boe_panel_disable(&pinfo->base); + if (err < 0) + DRM_DEV_ERROR(&dsi->dev, "failed to disable panel: %d\n", err); + + err = mipi_dsi_detach(dsi); + if (err < 0) + DRM_DEV_ERROR(&dsi->dev, "failed to detach from DSI host: %d\n", + err); + + drm_panel_detach(&pinfo->base); + panel_del(pinfo); + + return 0; +} + +static void panel_shutdown(struct mipi_dsi_device *dsi) +{ + struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi); + + boe_panel_disable(&pinfo->base); + boe_panel_unprepare(&pinfo->base); +} + +static struct mipi_dsi_driver panel_driver = { + .driver = { + .name = "panel-boe-himax8279d", + .of_match_table = panel_of_match, + }, + .probe = panel_probe, + .remove = panel_remove, + .shutdown = panel_shutdown, +}; +module_mipi_dsi_driver(panel_driver); + +MODULE_AUTHOR("Jerry Han <hanxu5(a)huaqin.corp-partner.google.com>"); +MODULE_DESCRIPTION("Boe Himax8279d driver"); +MODULE_LICENSE("GPL v2"); -- 1.9.1

1 0

[PATCH] [v4, 1/2] dt-bindings: panel: Add Boe Himax8279d is 1200x1920, 4-lane MIPI-DSI LCD panel
by Jerry Han 04 Mar '19

04 Mar '19

The Boe Himax8279d is a 8.0" panel with a 1200x1920 resolution and connected to DSI using four lanes. Signed-off-by: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> Cc: Jitao Shi <jitao.shi(a)mediatek.com> Cc: Nick Sanders <nsanders(a)google.com> Cc: YH Lin <yueherngl(a)chromium.org> Cc: Rock wang <rock_wang(a)himax.com.cn> --- .../bindings/display/panel/boe,himax8279d.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt diff --git a/Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt b/Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt new file mode 100644 index 0000000..3caea21 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt @@ -0,0 +1,24 @@ +Boe Himax8279d 1200x1920 TFT LCD panel + +Required properties: +- compatible: should be "boe,himax8279d8p" and one of: "boe,himax8279d10p" +- reg: DSI virtual channel of the peripheral +- enable-gpios: panel enable gpio +- pp33-gpios: a GPIO phandle for the 3.3v pin that provides the supply voltage +- pp18-gpios: a GPIO phandle for the 1.8v pin that provides the supply voltage + +Optional properties: +- backlight: phandle of the backlight device attached to the panel + +Example: + + &mipi_dsi { + panel { + compatible = "boe,himax8279d8p", "boe,himax8279d10p"; + reg = <0>; + backlight = <&backlight>; + enable-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>; + pp33-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + pp18-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; + }; + }; -- 1.9.1

1 0

[PATCH] [v3,2/2] drm/panel: Add Boe Himax8279d MIPI-DSI LCD panel
by Jerry Han 04 Mar '19

04 Mar '19

1 0

[PATCH libdrm] libkms: update list of intel_drivers for Android build
by Tapani Pälli 04 Mar '19

04 Mar '19

Add new iris driver, remove deprecated ilo driver. Signed-off-by: Tapani Pälli <tapani.palli(a)intel.com> --- libkms/Android.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libkms/Android.mk b/libkms/Android.mk index 0be72054..a8b9489f 100644 --- a/libkms/Android.mk +++ b/libkms/Android.mk @@ -1,6 +1,6 @@ DRM_GPU_DRIVERS := $(strip $(filter-out swrast, $(BOARD_GPU_DRIVERS))) -intel_drivers := i915 i965 i915g ilo +intel_drivers := i915 i965 i915g iris radeon_drivers := r300g r600g radeonsi nouveau_drivers := nouveau virgl_drivers := virgl -- 2.20.1

2 2

[PATCH] drm/amd/powerplay: fix memdup.cocci warnings
by Julia Lawall 04 Mar '19

04 Mar '19

From: kbuild test robot <fengguang.wu(a)intel.com> Simplify the code a bit by using kmemdup instead of kzalloc and memcpy. Generated by: scripts/coccinelle/api/memdup.cocci Fixes: 76760fe3c00d ("drm/amd/powerplay: add function to store overdrive information for smu11") CC: Likun Gao <Likun.Gao(a)amd.com> Signed-off-by: kbuild test robot <fengguang.wu(a)intel.com> Signed-off-by: Julia Lawall <julia.lawall(a)lip6.fr> --- tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-5.2-wip head: 25752e1fc83e9f983b11d680fc7bfc129b4eaae6 commit: 76760fe3c00d04f25cc1a6115294310d4effeb77 [161/226] drm/amd/powerplay: add function to store overdrive information for smu11 :::::: branch date: 6 hours ago :::::: commit date: 6 hours ago vega20_ppt.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) --- a/drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c +++ b/drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c @@ -173,14 +173,12 @@ static int vega20_setup_od8_information( if (table_context->od_feature_capabilities) return -EINVAL; - table_context->od_feature_capabilities = kzalloc(od_feature_array_size, GFP_KERNEL); + table_context->od_feature_capabilities = kmemdup(&powerplay_table->OverDrive8Table.ODFeatureCapabilities, + od_feature_array_size, + GFP_KERNEL); if (!table_context->od_feature_capabilities) return -ENOMEM; - memcpy(table_context->od_feature_capabilities, - &powerplay_table->OverDrive8Table.ODFeatureCapabilities, - od_feature_array_size); - /* Setup correct ODSettingCount, and store ODSettingArray from * powerplay table to od_settings_max and od_setting_min */ od_setting_count = @@ -194,7 +192,9 @@ static int vega20_setup_od8_information( if (table_context->od_settings_max) return -EINVAL; - table_context->od_settings_max = kzalloc(od_setting_array_size, GFP_KERNEL); + table_context->od_settings_max = kmemdup(&powerplay_table->OverDrive8Table.ODSettingsMax, + od_setting_array_size, + GFP_KERNEL); if (!table_context->od_settings_max) { kfree(table_context->od_feature_capabilities); @@ -202,14 +202,12 @@ static int vega20_setup_od8_information( return -ENOMEM; } - memcpy(table_context->od_settings_max, - &powerplay_table->OverDrive8Table.ODSettingsMax, - od_setting_array_size); - if (table_context->od_settings_min) return -EINVAL; - table_context->od_settings_min = kzalloc(od_setting_array_size, GFP_KERNEL); + table_context->od_settings_min = kmemdup(&powerplay_table->OverDrive8Table.ODSettingsMin, + od_setting_array_size, + GFP_KERNEL); if (!table_context->od_settings_min) { kfree(table_context->od_feature_capabilities); @@ -218,10 +216,6 @@ static int vega20_setup_od8_information( table_context->od_settings_max = NULL; return -ENOMEM; } - - memcpy(table_context->od_settings_min, - &powerplay_table->OverDrive8Table.ODSettingsMin, - od_setting_array_size); } return 0;

3 2

linux-next: Fixes tag needs some work in the drm tree
by Stephen Rothwell 04 Mar '19

04 Mar '19

Hi all, In commit 289aabbf7bc8 ("drm/amd/display: Use vrr friendly pageflip throttling in DC.") Fixes tag Fixes: bb47de736661 ("drm/amdgpu: Set FreeSync state using drm VRR has these problem(s): - Please don't split Fixes tags over more than one line -- Cheers, Stephen Rothwell

1 0

[PATCH] [v3,2/2] drm/panel: Add Boe Himax8279d MIPI-DSI LCD panel
by Jerry Han 04 Mar '19

04 Mar '19

Support Boe Himax8279d 8.0" 1200x1920 TFT LCD panel, it is a MIPI DSI panel. Signed-off-by: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> Cc: Jitao Shi <jitao.shi(a)mediatek.com> Cc: Nick Sanders <nsanders(a)google.com> Cc: YH Lin <yueherngl(a)chromium.org> Cc: Rock wang <rock_wang(a)himax.com.cn> --- MAINTAINERS | 6 + drivers/gpu/drm/panel/Kconfig | 22 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-boe-himax8279d.c | 1064 ++++++++++++++++++++++++++ 4 files changed, 1093 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-boe-himax8279d.c diff --git a/MAINTAINERS b/MAINTAINERS index b2f710e..095fbbe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4624,6 +4624,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc S: Maintained F: drivers/gpu/drm/bochs/ +DRM DRIVER FOR BOE HIMAX8279D PANELS +M: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> +S: Maintained +F: drivers/gpu/drm/panel/panel-boe-himax8279d.c +F: Documentation/devicetree/bindings/display/panel/boe,himax8279d.txt + DRM DRIVER FOR FARADAY TVE200 TV ENCODER M: Linus Walleij <linus.walleij(a)linaro.org> T: git git://anongit.freedesktop.org/drm/drm-misc diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 6020c30..d611424 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -17,6 +17,17 @@ config DRM_PANEL_ARM_VERSATILE reference designs. The panel is detected using special registers in the Versatile family syscon registers. +config DRM_PANEL_BOE_HIMAX8279D + tristate "Boe Himax8279d panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Boe Himax8279d + TFT-LCD modules. The panel has a 1200x1920 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + config DRM_PANEL_LVDS tristate "Generic LVDS panel driver" depends on OF @@ -186,4 +197,15 @@ config DRM_PANEL_SITRONIX_ST7789V Say Y here if you want to enable support for the Sitronix ST7789V controller for 240x320 LCD panels +config DRM_PANEL_BOE_HIMAX8279D + tristate "Boe Himax8279d panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for Same type + TFT-LCD modules. The panel has a 1200x1920 resolution and uses + 24 bit RGB per pixel. It provides a MIPI DSI interface to + the host and has a built-in LED backlight. + endmenu diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 5ccaaa9..7285539 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o +obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c new file mode 100644 index 0000000..9af382c --- /dev/null +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c @@ -0,0 +1,1064 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019, Huaqin Telecom Technology Co., Ltd + * + * Author: Jerry Han <hanxu5(a)huaqin.corp-partner.google.com> + * + */ + +#include <linux/backlight.h> +#include <linux/delay.h> +#include <linux/fb.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> + +#include <linux/gpio/consumer.h> +#include <linux/regulator/consumer.h> + +#include <drm/drm_device.h> +#include <drm/drm_mipi_dsi.h> +#include <drm/drm_modes.h> +#include <drm/drm_panel.h> +#include <drm/drm_print.h> + +#include <video/mipi_display.h> + +struct panel_cmd { + size_t len; + const char *data; +}; + +#define _INIT_CMD(...) { \ + .len = sizeof((char[]){__VA_ARGS__}), \ + .data = (char[]){__VA_ARGS__} } + +struct panel_desc { + const struct drm_display_mode *display_mode; + unsigned int bpc; + unsigned int width_mm; + unsigned int height_mm; + + unsigned int delay_t1; + unsigned int reset_delay_t2; + unsigned int reset_delay_t3; + unsigned int reset_delay_t4; + + unsigned long mode_flags; + enum mipi_dsi_pixel_format format; + unsigned int lanes; + const struct panel_cmd *on_cmds; + const struct panel_cmd *off_cmds; +}; + +struct panel_info { + struct drm_panel base; + struct mipi_dsi_device *link; + const struct panel_desc *desc; + + struct backlight_device *backlight; + struct gpio_desc *enable_gpio; + struct gpio_desc *pp33_gpio; + struct gpio_desc *pp18_gpio; + + bool prepared; + bool enabled; +}; + +static inline struct panel_info *to_panel_info(struct drm_panel *panel) +{ + return container_of(panel, struct panel_info, base); +} + +void set_gpios(struct panel_info *pinfo, int enable) +{ + gpiod_set_value(pinfo->enable_gpio, enable); + gpiod_set_value(pinfo->pp33_gpio, enable); + gpiod_set_value(pinfo->pp18_gpio, enable); +} + +static int send_mipi_cmds(struct drm_panel *panel, const struct panel_cmd *cmds) +{ + struct panel_info *pinfo = to_panel_info(panel); + unsigned int i = 0; + int err; + + if (!cmds) + return -EFAULT; + + for (i = 0; cmds[i].len != 0; i++) { + const struct panel_cmd *cmd = &cmds[i]; + + if (cmd->len == 2) + err = mipi_dsi_dcs_write(pinfo->link, + cmd->data[1], NULL, 0); + else + err = mipi_dsi_dcs_write(pinfo->link, + cmd->data[1], cmd->data + 2, + cmd->len - 2); + + if (err < 0) + return err; + + usleep_range((cmd->data[0]) * 1000, + (1 + cmd->data[0]) * 1000); + } + + return 0; +} + +static int boe_panel_disable(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + + backlight_disable(pinfo->backlight); + + pinfo->enabled = false; + + return 0; +} + +static int boe_panel_unprepare(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + int err; + + if (!pinfo->prepared) + return 0; + + /* send off code */ + err = send_mipi_cmds(panel, pinfo->desc->off_cmds); + if (err < 0) { + dev_err(panel->dev, + "failed to send DCS Off Code: %d\n", + err); + goto poweroff; + } + + set_gpios(pinfo, 0); + + pinfo->prepared = false; + + return 0; + +poweroff: + set_gpios(pinfo, 0); + return err; +} + +static int boe_panel_prepare(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + const struct panel_desc *desc = pinfo->desc; + int err; + + if (pinfo->prepared) + return 0; + + gpiod_set_value(pinfo->pp18_gpio, 1); + /* T1 (> 5ms) */ + usleep_range(desc->delay_t1, 1000 + desc->delay_t1); + gpiod_set_value(pinfo->pp33_gpio, 1); + + /* reset sequence */ + usleep_range(desc->reset_delay_t2, 1000 + desc->reset_delay_t2); + + if (desc->reset_delay_t3) { + gpiod_set_value(pinfo->enable_gpio, 1); + usleep_range(desc->reset_delay_t3, 1000 + desc->reset_delay_t3); + gpiod_set_value(pinfo->enable_gpio, 0); + } + + usleep_range(desc->reset_delay_t4, 1000 + desc->reset_delay_t4); + gpiod_set_value(pinfo->enable_gpio, 1); + + /* send init code */ + err = send_mipi_cmds(panel, pinfo->desc->on_cmds); + if (err < 0) { + dev_err(panel->dev, + "failed to send DCS Init Code: %d\n", + err); + goto poweroff; + } + + pinfo->prepared = true; + + return 0; + +poweroff: + set_gpios(pinfo, 0); + return err; +} + +static int boe_panel_enable(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + int ret; + + if (pinfo->enabled) + return 0; + + ret = backlight_enable(pinfo->backlight); + if (ret) { + DRM_DEV_ERROR(panel->drm->dev, + "Failed to enable backlight %d\n", ret); + return ret; + } + + pinfo->enabled = true; + + return 0; +} + +static int boe_panel_get_modes(struct drm_panel *panel) +{ + struct panel_info *pinfo = to_panel_info(panel); + const struct drm_display_mode *m = pinfo->desc->display_mode; + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(panel->drm, m); + if (!mode) { + DRM_DEV_ERROR(panel->drm->dev, "failed to add mode %ux%u@%u\n", + m->hdisplay, m->vdisplay, m->vrefresh); + return -ENOMEM; + } + + drm_mode_set_name(mode); + + drm_mode_probed_add(panel->connector, mode); + + panel->connector->display_info.width_mm = pinfo->desc->width_mm; + panel->connector->display_info.height_mm = pinfo->desc->height_mm; + panel->connector->display_info.bpc = pinfo->desc->bpc; + + return 1; +} + +static const struct drm_panel_funcs panel_funcs = { + .disable = boe_panel_disable, + .unprepare = boe_panel_unprepare, + .prepare = boe_panel_prepare, + .enable = boe_panel_enable, + .get_modes = boe_panel_get_modes, +}; + +/* 8 inch */ +static const struct drm_display_mode boe_himax8279d8p_display_mode = { + .clock = 159420, + .hdisplay = 1200, + .hsync_start = 1200 + 80, + .hsync_end = 1200 + 80 + 60, + .htotal = 1200 + 80 + 60 + 24, + .vdisplay = 1920, + .vsync_start = 1920 + 10, + .vsync_end = 1920 + 10 + 14, + .vtotal = 1920 + 10 + 14 + 4, + .vrefresh = 60, +}; + +static const struct panel_cmd boe_himax8279d8p_on_cmds[] = { + _INIT_CMD(0x22, 0x10), + _INIT_CMD(0x00, 0xB0, 0x05), + _INIT_CMD(0x00, 0xB1, 0xE5), + _INIT_CMD(0x00, 0xB3, 0x52), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x88), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB2, 0x50), + _INIT_CMD(0x00, 0xB6, 0x03), + _INIT_CMD(0x00, 0xBA, 0x8B), + _INIT_CMD(0x00, 0xBF, 0x15), + _INIT_CMD(0x00, 0xC0, 0x0F), + _INIT_CMD(0x00, 0xC2, 0x0C), + _INIT_CMD(0x00, 0xC3, 0x02), + _INIT_CMD(0x00, 0xC4, 0x0C), + _INIT_CMD(0x00, 0xC5, 0x02), + _INIT_CMD(0x00, 0xB0, 0x01), + _INIT_CMD(0x00, 0xE0, 0x26), + _INIT_CMD(0x00, 0xE1, 0x26), + _INIT_CMD(0x00, 0xDC, 0x00), + _INIT_CMD(0x00, 0xDD, 0x00), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x26), + _INIT_CMD(0x00, 0xC8, 0x00), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xD2, 0x04), + _INIT_CMD(0x00, 0xD3, 0x04), + _INIT_CMD(0x00, 0xE6, 0x03), + _INIT_CMD(0x00, 0xE7, 0x03), + _INIT_CMD(0x00, 0xC4, 0x08), + _INIT_CMD(0x00, 0xC5, 0x08), + _INIT_CMD(0x00, 0xD8, 0x07), + _INIT_CMD(0x00, 0xD9, 0x07), + _INIT_CMD(0x00, 0xC2, 0x06), + _INIT_CMD(0x00, 0xC3, 0x06), + _INIT_CMD(0x00, 0xD6, 0x05), + _INIT_CMD(0x00, 0xD7, 0x05), + _INIT_CMD(0x00, 0xC0, 0x0C), + _INIT_CMD(0x00, 0xC1, 0x0C), + _INIT_CMD(0x00, 0xD4, 0x0B), + _INIT_CMD(0x00, 0xD5, 0x0B), + _INIT_CMD(0x00, 0xCA, 0x0A), + _INIT_CMD(0x00, 0xCB, 0x0A), + _INIT_CMD(0x00, 0xDE, 0x09), + _INIT_CMD(0x00, 0xDF, 0x09), + _INIT_CMD(0x00, 0xC6, 0x26), + _INIT_CMD(0x00, 0xC7, 0x26), + _INIT_CMD(0x00, 0xCE, 0x00), + _INIT_CMD(0x00, 0xCF, 0x00), + _INIT_CMD(0x00, 0xDA, 0x26), + _INIT_CMD(0x00, 0xDB, 0x26), + _INIT_CMD(0x00, 0xE2, 0x00), + _INIT_CMD(0x00, 0xE3, 0x00), + _INIT_CMD(0x00, 0xB0, 0x02), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xC1, 0x07), + _INIT_CMD(0x00, 0xC2, 0x0D), + _INIT_CMD(0x00, 0xC3, 0x18), + _INIT_CMD(0x00, 0xC4, 0x27), + _INIT_CMD(0x00, 0xC5, 0x28), + _INIT_CMD(0x00, 0xC6, 0x30), + _INIT_CMD(0x00, 0xC7, 0x2E), + _INIT_CMD(0x00, 0xC8, 0x2F), + _INIT_CMD(0x00, 0xC9, 0x1A), + _INIT_CMD(0x00, 0xCA, 0x20), + _INIT_CMD(0x00, 0xCB, 0x29), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x32), + _INIT_CMD(0x00, 0xCE, 0x33), + _INIT_CMD(0x00, 0xCF, 0x31), + _INIT_CMD(0x00, 0xD0, 0x06), + _INIT_CMD(0x00, 0xD2, 0x00), + _INIT_CMD(0x00, 0xD3, 0x07), + _INIT_CMD(0x00, 0xD4, 0x12), + _INIT_CMD(0x00, 0xD5, 0x26), + _INIT_CMD(0x00, 0xD6, 0x3D), + _INIT_CMD(0x00, 0xD7, 0x3F), + _INIT_CMD(0x00, 0xD8, 0x3F), + _INIT_CMD(0x00, 0xD9, 0x3F), + _INIT_CMD(0x00, 0xDA, 0x3F), + _INIT_CMD(0x00, 0xDB, 0x3F), + _INIT_CMD(0x00, 0xDC, 0x3F), + _INIT_CMD(0x00, 0xDD, 0x3F), + _INIT_CMD(0x00, 0xDE, 0x3F), + _INIT_CMD(0x00, 0xDF, 0x3A), + _INIT_CMD(0x00, 0xE0, 0x37), + _INIT_CMD(0x00, 0xE1, 0x35), + _INIT_CMD(0x00, 0xE2, 0x07), + _INIT_CMD(0x00, 0xB0, 0x03), + _INIT_CMD(0x00, 0xC8, 0x0B), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xC3, 0x00), + _INIT_CMD(0x00, 0xE7, 0x00), + _INIT_CMD(0x00, 0xC5, 0x2A), + _INIT_CMD(0x00, 0xDE, 0x2A), + _INIT_CMD(0x00, 0xCA, 0x43), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xE4, 0xC0), + _INIT_CMD(0x00, 0xE5, 0x0D), + _INIT_CMD(0x00, 0xCB, 0x00), + _INIT_CMD(0x00, 0xB0, 0x06), + _INIT_CMD(0x00, 0xB8, 0xA5), + _INIT_CMD(0x00, 0xC0, 0xA5), + _INIT_CMD(0x00, 0xC7, 0x0F), + _INIT_CMD(0x00, 0xD5, 0x32), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xBC, 0x00), + _INIT_CMD(0x00, 0xB0, 0x07), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x08), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x05, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x09), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0A), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0B), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x05, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0C), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x05, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x64, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x08), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x0A, 0xB8, 0x68), + _INIT_CMD(0x78, 0x11), + _INIT_CMD(0x14, 0x29), + + {}, +}; + +static const struct panel_cmd boe_himax8279d8p_off_cmds[] = { + _INIT_CMD(0x00, 0x28), + _INIT_CMD(0x01, 0x10), + + {}, +}; + +static const struct panel_desc boe_himax8279d8p_panel_desc = { + .display_mode = &boe_himax8279d8p_display_mode, + .bpc = 8, + .width_mm = 107, + .height_mm = 172, + .delay_t1 = 5000, + .reset_delay_t2 = 14000, + .reset_delay_t3 = 1000, + .reset_delay_t4 = 1000, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, + .on_cmds = boe_himax8279d8p_on_cmds, + .off_cmds = boe_himax8279d8p_off_cmds, +}; + +/* 10 inch */ +static const struct drm_display_mode boe_himax8279d10p_display_mode = { + .clock = 159420, + .hdisplay = 1200, + .hsync_start = 1200 + 80, + .hsync_end = 1200 + 80 + 60, + .htotal = 1200 + 80 + 60 + 24, + .vdisplay = 1920, + .vsync_start = 1920 + 10, + .vsync_end = 1920 + 10 + 14, + .vtotal = 1920 + 10 + 14 + 4, + .vrefresh = 60, +}; + +static const struct panel_cmd boe_himax8279d10p_on_cmds[] = { + _INIT_CMD(0x00, 0xB0, 0x05), + _INIT_CMD(0x00, 0xB1, 0xE5), + _INIT_CMD(0x00, 0xB3, 0x52), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x88), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB2, 0x50), + _INIT_CMD(0x00, 0xB6, 0x03), + _INIT_CMD(0x00, 0xBA, 0x8B), + _INIT_CMD(0x00, 0xBF, 0x1A), + _INIT_CMD(0x00, 0xC0, 0x0F), + _INIT_CMD(0x00, 0xC2, 0x0C), + _INIT_CMD(0x00, 0xC3, 0x02), + _INIT_CMD(0x00, 0xC4, 0x0C), + _INIT_CMD(0x00, 0xC5, 0x02), + _INIT_CMD(0x00, 0xB0, 0x01), + _INIT_CMD(0x00, 0xE0, 0x26), + _INIT_CMD(0x00, 0xE1, 0x26), + _INIT_CMD(0x00, 0xDC, 0x00), + _INIT_CMD(0x00, 0xDD, 0x00), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x26), + _INIT_CMD(0x00, 0xC8, 0x00), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xD2, 0x04), + _INIT_CMD(0x00, 0xD3, 0x04), + _INIT_CMD(0x00, 0xE6, 0x03), + _INIT_CMD(0x00, 0xE7, 0x03), + _INIT_CMD(0x00, 0xC4, 0x08), + _INIT_CMD(0x00, 0xC5, 0x08), + _INIT_CMD(0x00, 0xD8, 0x07), + _INIT_CMD(0x00, 0xD9, 0x07), + _INIT_CMD(0x00, 0xC2, 0x06), + _INIT_CMD(0x00, 0xC3, 0x06), + _INIT_CMD(0x00, 0xD6, 0x05), + _INIT_CMD(0x00, 0xD7, 0x05), + _INIT_CMD(0x00, 0xC0, 0x0C), + _INIT_CMD(0x00, 0xC1, 0x0C), + _INIT_CMD(0x00, 0xD4, 0x0B), + _INIT_CMD(0x00, 0xD5, 0x0B), + _INIT_CMD(0x00, 0xCA, 0x0A), + _INIT_CMD(0x00, 0xCB, 0x0A), + _INIT_CMD(0x00, 0xDE, 0x09), + _INIT_CMD(0x00, 0xDF, 0x09), + _INIT_CMD(0x00, 0xC6, 0x26), + _INIT_CMD(0x00, 0xC7, 0x26), + _INIT_CMD(0x00, 0xCE, 0x00), + _INIT_CMD(0x00, 0xCF, 0x00), + _INIT_CMD(0x00, 0xDA, 0x26), + _INIT_CMD(0x00, 0xDB, 0x26), + _INIT_CMD(0x00, 0xE2, 0x00), + _INIT_CMD(0x00, 0xE3, 0x00), + _INIT_CMD(0x00, 0xB0, 0x02), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xC1, 0x07), + _INIT_CMD(0x00, 0xC2, 0x0D), + _INIT_CMD(0x00, 0xC3, 0x18), + _INIT_CMD(0x00, 0xC4, 0x27), + _INIT_CMD(0x00, 0xC5, 0x28), + _INIT_CMD(0x00, 0xC6, 0x30), + _INIT_CMD(0x00, 0xC7, 0x2E), + _INIT_CMD(0x00, 0xC8, 0x2F), + _INIT_CMD(0x00, 0xC9, 0x1A), + _INIT_CMD(0x00, 0xCA, 0x20), + _INIT_CMD(0x00, 0xCB, 0x29), + _INIT_CMD(0x00, 0xCC, 0x26), + _INIT_CMD(0x00, 0xCD, 0x32), + _INIT_CMD(0x00, 0xCE, 0x33), + _INIT_CMD(0x00, 0xCF, 0x31), + _INIT_CMD(0x00, 0xD0, 0x06), + _INIT_CMD(0x00, 0xD2, 0x00), + _INIT_CMD(0x00, 0xD3, 0x07), + _INIT_CMD(0x00, 0xD4, 0x12), + _INIT_CMD(0x00, 0xD5, 0x26), + _INIT_CMD(0x00, 0xD6, 0x3D), + _INIT_CMD(0x00, 0xD7, 0x3F), + _INIT_CMD(0x00, 0xD8, 0x3F), + _INIT_CMD(0x00, 0xD9, 0x3F), + _INIT_CMD(0x00, 0xDA, 0x3F), + _INIT_CMD(0x00, 0xDB, 0x3F), + _INIT_CMD(0x00, 0xDC, 0x3F), + _INIT_CMD(0x00, 0xDD, 0x3F), + _INIT_CMD(0x00, 0xDE, 0x3F), + _INIT_CMD(0x00, 0xDF, 0x3A), + _INIT_CMD(0x00, 0xE0, 0x37), + _INIT_CMD(0x00, 0xE1, 0x35), + _INIT_CMD(0x00, 0xE2, 0x07), + _INIT_CMD(0x00, 0xB0, 0x03), + _INIT_CMD(0x00, 0xC8, 0x0B), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xC3, 0x00), + _INIT_CMD(0x00, 0xE7, 0x00), + _INIT_CMD(0x00, 0xC5, 0x2A), + _INIT_CMD(0x00, 0xDE, 0x2A), + _INIT_CMD(0x00, 0xCA, 0x43), + _INIT_CMD(0x00, 0xC9, 0x07), + _INIT_CMD(0x00, 0xE4, 0xC0), + _INIT_CMD(0x00, 0xE5, 0x0D), + _INIT_CMD(0x00, 0xCB, 0x00), + _INIT_CMD(0x00, 0xB0, 0x06), + _INIT_CMD(0x00, 0xB8, 0xA5), + _INIT_CMD(0x00, 0xC0, 0xA5), + _INIT_CMD(0x00, 0xC7, 0x0F), + _INIT_CMD(0x00, 0xD5, 0x32), + _INIT_CMD(0x00, 0xB8, 0x00), + _INIT_CMD(0x00, 0xC0, 0x00), + _INIT_CMD(0x00, 0xBC, 0x00), + _INIT_CMD(0x00, 0xB0, 0x07), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x08), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x00, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x09), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0A), + _INIT_CMD(0x00, 0xB1, 0x00), + _INIT_CMD(0x00, 0xB2, 0x09), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x2F), + _INIT_CMD(0x00, 0xB5, 0x44), + _INIT_CMD(0x00, 0xB6, 0x52), + _INIT_CMD(0x00, 0xB7, 0x6A), + _INIT_CMD(0x00, 0xB8, 0x8A), + _INIT_CMD(0x00, 0xB9, 0xCA), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x87), + _INIT_CMD(0x00, 0xBC, 0x06), + _INIT_CMD(0x00, 0xBD, 0x0A), + _INIT_CMD(0x00, 0xBE, 0x9B), + _INIT_CMD(0x00, 0xBF, 0x0C), + _INIT_CMD(0x00, 0xC0, 0x3D), + _INIT_CMD(0x00, 0xC1, 0x71), + _INIT_CMD(0x00, 0xC2, 0x90), + _INIT_CMD(0x00, 0xC3, 0xA0), + _INIT_CMD(0x00, 0xC4, 0xA8), + _INIT_CMD(0x00, 0xC5, 0xB1), + _INIT_CMD(0x00, 0xC6, 0xBB), + _INIT_CMD(0x00, 0xC7, 0xC0), + _INIT_CMD(0x00, 0xC8, 0xC4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0B), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x08), + _INIT_CMD(0x00, 0xB3, 0x19), + _INIT_CMD(0x00, 0xB4, 0x31), + _INIT_CMD(0x00, 0xB5, 0x46), + _INIT_CMD(0x00, 0xB6, 0x55), + _INIT_CMD(0x00, 0xB7, 0x6E), + _INIT_CMD(0x00, 0xB8, 0x92), + _INIT_CMD(0x00, 0xB9, 0xD4), + _INIT_CMD(0x00, 0xBA, 0x1B), + _INIT_CMD(0x00, 0xBB, 0x9B), + _INIT_CMD(0x00, 0xBC, 0x28), + _INIT_CMD(0x00, 0xBD, 0x2D), + _INIT_CMD(0x00, 0xBE, 0xC3), + _INIT_CMD(0x00, 0xBF, 0x2F), + _INIT_CMD(0x00, 0xC0, 0x62), + _INIT_CMD(0x00, 0xC1, 0x99), + _INIT_CMD(0x00, 0xC2, 0xAB), + _INIT_CMD(0x00, 0xC3, 0xBF), + _INIT_CMD(0x00, 0xC4, 0xCF), + _INIT_CMD(0x00, 0xC5, 0xDF), + _INIT_CMD(0x00, 0xC6, 0xF0), + _INIT_CMD(0x00, 0xC7, 0xF9), + _INIT_CMD(0x00, 0xC8, 0xFC), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x0C), + _INIT_CMD(0x00, 0xB1, 0x04), + _INIT_CMD(0x00, 0xB2, 0x05), + _INIT_CMD(0x00, 0xB3, 0x17), + _INIT_CMD(0x00, 0xB4, 0x2E), + _INIT_CMD(0x00, 0xB5, 0x42), + _INIT_CMD(0x00, 0xB6, 0x51), + _INIT_CMD(0x00, 0xB7, 0x69), + _INIT_CMD(0x00, 0xB8, 0x88), + _INIT_CMD(0x00, 0xB9, 0xC9), + _INIT_CMD(0x00, 0xBA, 0x0C), + _INIT_CMD(0x00, 0xBB, 0x86), + _INIT_CMD(0x00, 0xBC, 0x03), + _INIT_CMD(0x00, 0xBD, 0x08), + _INIT_CMD(0x00, 0xBE, 0x95), + _INIT_CMD(0x00, 0xBF, 0x05), + _INIT_CMD(0x00, 0xC0, 0x35), + _INIT_CMD(0x00, 0xC1, 0x62), + _INIT_CMD(0x00, 0xC2, 0x81), + _INIT_CMD(0x00, 0xC3, 0x96), + _INIT_CMD(0x00, 0xC4, 0x9E), + _INIT_CMD(0x00, 0xC5, 0xA5), + _INIT_CMD(0x00, 0xC6, 0xAD), + _INIT_CMD(0x00, 0xC7, 0xB1), + _INIT_CMD(0x00, 0xC8, 0xB4), + _INIT_CMD(0x00, 0xC9, 0x00), + _INIT_CMD(0x00, 0xCA, 0x00), + _INIT_CMD(0x00, 0xCB, 0x16), + _INIT_CMD(0x00, 0xCC, 0xAF), + _INIT_CMD(0x00, 0xCD, 0xFF), + _INIT_CMD(0x00, 0xCE, 0xFF), + _INIT_CMD(0x00, 0xB0, 0x00), + _INIT_CMD(0x00, 0xB3, 0x08), + _INIT_CMD(0x00, 0xB0, 0x04), + _INIT_CMD(0x64, 0xB8, 0x68), + + {}, +}; + +static const struct panel_cmd boe_himax8279d10p_off_cmds[] = { + _INIT_CMD(0x00, 0x28), + _INIT_CMD(0x01, 0x10), + + {}, +}; + +static const struct panel_desc boe_himax8279d10p_panel_desc = { + .display_mode = &boe_himax8279d10p_display_mode, + .bpc = 8, + .width_mm = 135, + .height_mm = 216, + .delay_t1 = 5000, + .reset_delay_t2 = 14000, + .reset_delay_t3 = 1000, + .reset_delay_t4 = 1000, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, + .format = MIPI_DSI_FMT_RGB888, + .lanes = 4, + .on_cmds = boe_himax8279d10p_on_cmds, + .off_cmds = boe_himax8279d10p_off_cmds, +}; + +static const struct of_device_id panel_of_match[] = { + { .compatible = "boe,himax8279d8p", + .data = &boe_himax8279d8p_panel_desc + }, { .compatible = "boe,himax8279d10p", + .data = &boe_himax8279d10p_panel_desc + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, panel_of_match); + +static int panel_add(struct panel_info *pinfo) +{ + struct device *dev = &pinfo->link->dev; + int err; + + pinfo->pp18_gpio = devm_gpiod_get_optional(dev, "pp18", GPIOD_OUT_LOW); + if (IS_ERR(pinfo->pp18_gpio)) { + err = PTR_ERR(pinfo->pp18_gpio); + dev_err(dev, "failed to get pp18 gpio: %d\n", err); + pinfo->pp18_gpio = NULL; + } + + pinfo->pp33_gpio = devm_gpiod_get_optional(dev, "pp33", GPIOD_OUT_LOW); + if (IS_ERR(pinfo->pp33_gpio)) { + err = PTR_ERR(pinfo->pp33_gpio); + dev_err(dev, "failed to get pp33 gpio: %d\n", err); + pinfo->pp33_gpio = NULL; + } + + pinfo->enable_gpio = devm_gpiod_get_optional(dev, "enable", + GPIOD_OUT_LOW); + if (IS_ERR(pinfo->enable_gpio)) { + err = PTR_ERR(pinfo->enable_gpio); + dev_err(dev, "failed to get enable gpio: %d\n", err); + pinfo->enable_gpio = NULL; + } + + pinfo->backlight = devm_of_find_backlight(dev); + if (IS_ERR(pinfo->backlight)) + return PTR_ERR(pinfo->backlight); + + drm_panel_init(&pinfo->base); + pinfo->base.funcs = &panel_funcs; + pinfo->base.dev = &pinfo->link->dev; + + err = drm_panel_add(&pinfo->base); + if (err < 0) + return err; + + return 0; +} + +static void panel_del(struct panel_info *pinfo) +{ + if (pinfo->base.dev) + drm_panel_remove(&pinfo->base); +} + +static int panel_probe(struct mipi_dsi_device *dsi) +{ + struct panel_info *pinfo; + const struct panel_desc *desc; + int err; + + pinfo = devm_kzalloc(&dsi->dev, sizeof(*pinfo), GFP_KERNEL); + if (!pinfo) + return -ENOMEM; + + desc = of_device_get_match_data(&dsi->dev); + dsi->mode_flags = desc->mode_flags; + dsi->format = desc->format; + dsi->lanes = desc->lanes; + pinfo->desc = desc; + + pinfo->link = dsi; + mipi_dsi_set_drvdata(dsi, pinfo); + + err = panel_add(pinfo); + if (err < 0) + return err; + + return mipi_dsi_attach(dsi); +} + +static int panel_remove(struct mipi_dsi_device *dsi) +{ + struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi); + int err; + + err = boe_panel_unprepare(&pinfo->base); + if (err < 0) + DRM_DEV_ERROR(&dsi->dev, "failed to unprepare panel: %d\n", + err); + + err = boe_panel_disable(&pinfo->base); + if (err < 0) + DRM_DEV_ERROR(&dsi->dev, "failed to disable panel: %d\n", err); + + err = mipi_dsi_detach(dsi); + if (err < 0) + DRM_DEV_ERROR(&dsi->dev, "failed to detach from DSI host: %d\n", + err); + + drm_panel_detach(&pinfo->base); + panel_del(pinfo); + + return 0; +} + +static void panel_shutdown(struct mipi_dsi_device *dsi) +{ + struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi); + + boe_panel_disable(&pinfo->base); + boe_panel_unprepare(&pinfo->base); +} + +static struct mipi_dsi_driver panel_driver = { + .driver = { + .name = "panel-boe-himax8279d", + .of_match_table = panel_of_match, + }, + .probe = panel_probe, + .remove = panel_remove, + .shutdown = panel_shutdown, +}; +module_mipi_dsi_driver(panel_driver); + +MODULE_AUTHOR("Jerry Han <hanxu5(a)huaqin.corp-partner.google.com>"); +MODULE_DESCRIPTION("Boe Himax8279d driver"); +MODULE_LICENSE("GPL v2"); -- 1.9.1

1 0

[PATCH] drm/amdgpu/powerplay: Fix missing break in switch statement
by Gustavo A. R. Silva 04 Mar '19

04 Mar '19

Add missing break statement in order to prevent the code from falling through to case SMU_Discrete_DpmTable. This bug was found thanks to the ongoing efforts to enable -Wimplicit-fallthrough. Fixes: 34a564eaf528 ("drm/amd/powerplay: implement fw image related smum interface for Polaris.") Cc: stable(a)vger.kernel.org Signed-off-by: Gustavo A. R. Silva <gustavo(a)embeddedor.com> --- drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c index 52abca065764..222fb79d319e 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c @@ -2330,6 +2330,7 @@ static uint32_t polaris10_get_offsetof(uint32_t type, uint32_t member) case DRAM_LOG_BUFF_SIZE: return offsetof(SMU74_SoftRegisters, DRAM_LOG_BUFF_SIZE); } + break; case SMU_Discrete_DpmTable: switch (member) { case UvdBootLevel: -- 2.21.0

3 3

[radeon-alex:drm-next-5.2-wip 214/226] drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1204:3-9: preceding lock on line 1065 (fwd)
by Julia Lawall 04 Mar '19

04 Mar '19

Hello, It looks like line 1204 needs a break rather than a return, like in the aborts from the other cases. julia ---------- Forwarded message ---------- Date: Sat, 2 Mar 2019 14:36:31 +0800 From: kbuild test robot <lkp(a)intel.com> To: kbuild(a)01.org Cc: Julia Lawall <julia.lawall(a)lip6.fr> Subject: [radeon-alex:drm-next-5.2-wip 214/226] drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1204:3-9: preceding lock on line 1065 CC: kbuild-all(a)01.org CC: dri-devel(a)lists.freedesktop.org TO: Likun Gao <Likun.Gao(a)amd.com> CC: Alex Deucher <alexander.deucher(a)amd.com> CC: Gui Chengming <Jack.Gui(a)amd.com> tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-5.2-wip head: 25752e1fc83e9f983b11d680fc7bfc129b4eaae6 commit: e85bae378020046f53f18a61ac6bd5cdb798a079 [214/226] drm/amd/powerplay: support sysfs to set/get pcie :::::: branch date: 7 hours ago :::::: commit date: 7 hours ago >> drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c:1204:3-9: preceding lock on line 1065 git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git git remote update radeon-alex git checkout e85bae378020046f53f18a61ac6bd5cdb798a079 vim +1204 drivers/gpu/drm/amd/amdgpu/../powerplay/vega20_ppt.c 1d5da59b Likun Gao 2019-01-07 1050 7b0f60df Likun Gao 2019-01-07 1051 static int vega20_force_clk_levels(struct smu_context *smu, 7b0f60df Likun Gao 2019-01-07 1052 enum pp_clock_type type, uint32_t mask) 7b0f60df Likun Gao 2019-01-07 1053 { 7b0f60df Likun Gao 2019-01-07 1054 struct vega20_dpm_table *dpm_table; 7b0f60df Likun Gao 2019-01-07 1055 struct vega20_single_dpm_table *single_dpm_table; db129665 Likun Gao 2019-02-20 1056 uint32_t soft_min_level, soft_max_level, hard_min_level; 72ee8378 Likun Gao 2019-01-23 1057 struct smu_dpm_context *smu_dpm = &smu->smu_dpm; 72ee8378 Likun Gao 2019-01-23 1058 int ret = 0; 72ee8378 Likun Gao 2019-01-23 1059 72ee8378 Likun Gao 2019-01-23 1060 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { 72ee8378 Likun Gao 2019-01-23 1061 pr_info("force clock level is for dpm manual mode only.\n"); 72ee8378 Likun Gao 2019-01-23 1062 return -EINVAL; 72ee8378 Likun Gao 2019-01-23 1063 } 72ee8378 Likun Gao 2019-01-23 1064 72ee8378 Likun Gao 2019-01-23 @1065 mutex_lock(&(smu->mutex)); 7b0f60df Likun Gao 2019-01-07 1066 7b0f60df Likun Gao 2019-01-07 1067 soft_min_level = mask ? (ffs(mask) - 1) : 0; 7b0f60df Likun Gao 2019-01-07 1068 soft_max_level = mask ? (fls(mask) - 1) : 0; 7b0f60df Likun Gao 2019-01-07 1069 7b0f60df Likun Gao 2019-01-07 1070 dpm_table = smu->smu_dpm.dpm_context; 7b0f60df Likun Gao 2019-01-07 1071 7b0f60df Likun Gao 2019-01-07 1072 switch (type) { 7b0f60df Likun Gao 2019-01-07 1073 case PP_SCLK: 7b0f60df Likun Gao 2019-01-07 1074 single_dpm_table = &(dpm_table->gfx_table); 7b0f60df Likun Gao 2019-01-07 1075 7b0f60df Likun Gao 2019-01-07 1076 if (soft_max_level >= single_dpm_table->count) { 7b0f60df Likun Gao 2019-01-07 1077 pr_err("Clock level specified %d is over max allowed %d\n", 7b0f60df Likun Gao 2019-01-07 1078 soft_max_level, single_dpm_table->count - 1); 72ee8378 Likun Gao 2019-01-23 1079 ret = -EINVAL; 72ee8378 Likun Gao 2019-01-23 1080 break; 7b0f60df Likun Gao 2019-01-07 1081 } 7b0f60df Likun Gao 2019-01-07 1082 7b0f60df Likun Gao 2019-01-07 1083 single_dpm_table->dpm_state.soft_min_level = 7b0f60df Likun Gao 2019-01-07 1084 single_dpm_table->dpm_levels[soft_min_level].value; 7b0f60df Likun Gao 2019-01-07 1085 single_dpm_table->dpm_state.soft_max_level = 7b0f60df Likun Gao 2019-01-07 1086 single_dpm_table->dpm_levels[soft_max_level].value; 7b0f60df Likun Gao 2019-01-07 1087 db129665 Likun Gao 2019-02-20 1088 ret = vega20_upload_dpm_level(smu, false, FEATURE_DPM_GFXCLK_MASK); 7b0f60df Likun Gao 2019-01-07 1089 if (ret) { 7b0f60df Likun Gao 2019-01-07 1090 pr_err("Failed to upload boot level to lowest!\n"); 72ee8378 Likun Gao 2019-01-23 1091 break; 7b0f60df Likun Gao 2019-01-07 1092 } 7b0f60df Likun Gao 2019-01-07 1093 db129665 Likun Gao 2019-02-20 1094 ret = vega20_upload_dpm_level(smu, true, FEATURE_DPM_GFXCLK_MASK); 72ee8378 Likun Gao 2019-01-23 1095 if (ret) 7b0f60df Likun Gao 2019-01-07 1096 pr_err("Failed to upload dpm max level to highest!\n"); 7b0f60df Likun Gao 2019-01-07 1097 7b0f60df Likun Gao 2019-01-07 1098 break; 7b0f60df Likun Gao 2019-01-07 1099 7b0f60df Likun Gao 2019-01-07 1100 case PP_MCLK: 7b0f60df Likun Gao 2019-01-07 1101 single_dpm_table = &(dpm_table->mem_table); 7b0f60df Likun Gao 2019-01-07 1102 7b0f60df Likun Gao 2019-01-07 1103 if (soft_max_level >= single_dpm_table->count) { 7b0f60df Likun Gao 2019-01-07 1104 pr_err("Clock level specified %d is over max allowed %d\n", 7b0f60df Likun Gao 2019-01-07 1105 soft_max_level, single_dpm_table->count - 1); 72ee8378 Likun Gao 2019-01-23 1106 ret = -EINVAL; 72ee8378 Likun Gao 2019-01-23 1107 break; 7b0f60df Likun Gao 2019-01-07 1108 } 7b0f60df Likun Gao 2019-01-07 1109 7b0f60df Likun Gao 2019-01-07 1110 single_dpm_table->dpm_state.soft_min_level = 7b0f60df Likun Gao 2019-01-07 1111 single_dpm_table->dpm_levels[soft_min_level].value; 7b0f60df Likun Gao 2019-01-07 1112 single_dpm_table->dpm_state.soft_max_level = 7b0f60df Likun Gao 2019-01-07 1113 single_dpm_table->dpm_levels[soft_max_level].value; 7b0f60df Likun Gao 2019-01-07 1114 db129665 Likun Gao 2019-02-20 1115 ret = vega20_upload_dpm_level(smu, false, FEATURE_DPM_UCLK_MASK); db129665 Likun Gao 2019-02-20 1116 if (ret) { db129665 Likun Gao 2019-02-20 1117 pr_err("Failed to upload boot level to lowest!\n"); db129665 Likun Gao 2019-02-20 1118 break; db129665 Likun Gao 2019-02-20 1119 } db129665 Likun Gao 2019-02-20 1120 db129665 Likun Gao 2019-02-20 1121 ret = vega20_upload_dpm_level(smu, true, FEATURE_DPM_UCLK_MASK); db129665 Likun Gao 2019-02-20 1122 if (ret) db129665 Likun Gao 2019-02-20 1123 pr_err("Failed to upload dpm max level to highest!\n"); db129665 Likun Gao 2019-02-20 1124 db129665 Likun Gao 2019-02-20 1125 break; db129665 Likun Gao 2019-02-20 1126 db129665 Likun Gao 2019-02-20 1127 case PP_SOCCLK: db129665 Likun Gao 2019-02-20 1128 single_dpm_table = &(dpm_table->soc_table); db129665 Likun Gao 2019-02-20 1129 db129665 Likun Gao 2019-02-20 1130 if (soft_max_level >= single_dpm_table->count) { db129665 Likun Gao 2019-02-20 1131 pr_err("Clock level specified %d is over max allowed %d\n", db129665 Likun Gao 2019-02-20 1132 soft_max_level, single_dpm_table->count - 1); db129665 Likun Gao 2019-02-20 1133 ret = -EINVAL; db129665 Likun Gao 2019-02-20 1134 break; db129665 Likun Gao 2019-02-20 1135 } db129665 Likun Gao 2019-02-20 1136 db129665 Likun Gao 2019-02-20 1137 single_dpm_table->dpm_state.soft_min_level = db129665 Likun Gao 2019-02-20 1138 single_dpm_table->dpm_levels[soft_min_level].value; db129665 Likun Gao 2019-02-20 1139 single_dpm_table->dpm_state.soft_max_level = db129665 Likun Gao 2019-02-20 1140 single_dpm_table->dpm_levels[soft_max_level].value; db129665 Likun Gao 2019-02-20 1141 db129665 Likun Gao 2019-02-20 1142 ret = vega20_upload_dpm_level(smu, false, FEATURE_DPM_SOCCLK_MASK); db129665 Likun Gao 2019-02-20 1143 if (ret) { db129665 Likun Gao 2019-02-20 1144 pr_err("Failed to upload boot level to lowest!\n"); db129665 Likun Gao 2019-02-20 1145 break; db129665 Likun Gao 2019-02-20 1146 } db129665 Likun Gao 2019-02-20 1147 db129665 Likun Gao 2019-02-20 1148 ret = vega20_upload_dpm_level(smu, true, FEATURE_DPM_SOCCLK_MASK); db129665 Likun Gao 2019-02-20 1149 if (ret) db129665 Likun Gao 2019-02-20 1150 pr_err("Failed to upload dpm max level to highest!\n"); db129665 Likun Gao 2019-02-20 1151 db129665 Likun Gao 2019-02-20 1152 break; db129665 Likun Gao 2019-02-20 1153 db129665 Likun Gao 2019-02-20 1154 case PP_FCLK: db129665 Likun Gao 2019-02-20 1155 single_dpm_table = &(dpm_table->fclk_table); db129665 Likun Gao 2019-02-20 1156 db129665 Likun Gao 2019-02-20 1157 if (soft_max_level >= single_dpm_table->count) { db129665 Likun Gao 2019-02-20 1158 pr_err("Clock level specified %d is over max allowed %d\n", db129665 Likun Gao 2019-02-20 1159 soft_max_level, single_dpm_table->count - 1); db129665 Likun Gao 2019-02-20 1160 ret = -EINVAL; db129665 Likun Gao 2019-02-20 1161 break; db129665 Likun Gao 2019-02-20 1162 } db129665 Likun Gao 2019-02-20 1163 db129665 Likun Gao 2019-02-20 1164 single_dpm_table->dpm_state.soft_min_level = db129665 Likun Gao 2019-02-20 1165 single_dpm_table->dpm_levels[soft_min_level].value; db129665 Likun Gao 2019-02-20 1166 single_dpm_table->dpm_state.soft_max_level = db129665 Likun Gao 2019-02-20 1167 single_dpm_table->dpm_levels[soft_max_level].value; db129665 Likun Gao 2019-02-20 1168 db129665 Likun Gao 2019-02-20 1169 ret = vega20_upload_dpm_level(smu, false, FEATURE_DPM_FCLK_MASK); 7b0f60df Likun Gao 2019-01-07 1170 if (ret) { 7b0f60df Likun Gao 2019-01-07 1171 pr_err("Failed to upload boot level to lowest!\n"); 72ee8378 Likun Gao 2019-01-23 1172 break; 7b0f60df Likun Gao 2019-01-07 1173 } 7b0f60df Likun Gao 2019-01-07 1174 db129665 Likun Gao 2019-02-20 1175 ret = vega20_upload_dpm_level(smu, true, FEATURE_DPM_FCLK_MASK); 72ee8378 Likun Gao 2019-01-23 1176 if (ret) 7b0f60df Likun Gao 2019-01-07 1177 pr_err("Failed to upload dpm max level to highest!\n"); 7b0f60df Likun Gao 2019-01-07 1178 7b0f60df Likun Gao 2019-01-07 1179 break; 7b0f60df Likun Gao 2019-01-07 1180 db129665 Likun Gao 2019-02-20 1181 case PP_DCEFCLK: db129665 Likun Gao 2019-02-20 1182 hard_min_level = soft_min_level; db129665 Likun Gao 2019-02-20 1183 single_dpm_table = &(dpm_table->dcef_table); db129665 Likun Gao 2019-02-20 1184 db129665 Likun Gao 2019-02-20 1185 if (hard_min_level >= single_dpm_table->count) { db129665 Likun Gao 2019-02-20 1186 pr_err("Clock level specified %d is over max allowed %d\n", db129665 Likun Gao 2019-02-20 1187 hard_min_level, single_dpm_table->count - 1); db129665 Likun Gao 2019-02-20 1188 ret = -EINVAL; db129665 Likun Gao 2019-02-20 1189 break; db129665 Likun Gao 2019-02-20 1190 } db129665 Likun Gao 2019-02-20 1191 db129665 Likun Gao 2019-02-20 1192 single_dpm_table->dpm_state.hard_min_level = db129665 Likun Gao 2019-02-20 1193 single_dpm_table->dpm_levels[hard_min_level].value; db129665 Likun Gao 2019-02-20 1194 db129665 Likun Gao 2019-02-20 1195 ret = vega20_upload_dpm_level(smu, false, FEATURE_DPM_DCEFCLK_MASK); db129665 Likun Gao 2019-02-20 1196 if (ret) db129665 Likun Gao 2019-02-20 1197 pr_err("Failed to upload boot level to lowest!\n"); db129665 Likun Gao 2019-02-20 1198 db129665 Likun Gao 2019-02-20 1199 break; db129665 Likun Gao 2019-02-20 1200 bfaf193a Likun Gao 2019-01-18 1201 case PP_PCIE: e85bae37 Likun Gao 2019-02-21 1202 if (soft_min_level >= NUM_LINK_LEVELS || e85bae37 Likun Gao 2019-02-21 1203 soft_max_level >= NUM_LINK_LEVELS) e85bae37 Likun Gao 2019-02-21 @1204 return -EINVAL; e85bae37 Likun Gao 2019-02-21 1205 e85bae37 Likun Gao 2019-02-21 1206 ret = smu_send_smc_msg_with_param(smu, e85bae37 Likun Gao 2019-02-21 1207 SMU_MSG_SetMinLinkDpmByIndex, soft_min_level); e85bae37 Likun Gao 2019-02-21 1208 if (ret) e85bae37 Likun Gao 2019-02-21 1209 pr_err("Failed to set min link dpm level!\n"); e85bae37 Likun Gao 2019-02-21 1210 bfaf193a Likun Gao 2019-01-18 1211 break; bfaf193a Likun Gao 2019-01-18 1212 7b0f60df Likun Gao 2019-01-07 1213 default: 7b0f60df Likun Gao 2019-01-07 1214 break; 7b0f60df Likun Gao 2019-01-07 1215 } 7b0f60df Likun Gao 2019-01-07 1216 72ee8378 Likun Gao 2019-01-23 1217 mutex_unlock(&(smu->mutex)); 72ee8378 Likun Gao 2019-01-23 1218 return ret; 7b0f60df Likun Gao 2019-01-07 1219 } 7b0f60df Likun Gao 2019-01-07 1220 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation

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[PATCH] [v3, 1/2] dt-bindings: panel: Add Boe Himax8279d is 1200x1920, 4-lane MIPI-DSI LCD panel
by Jerry Han 04 Mar '19

04 Mar '19

1 0

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dri-devel March 2019