dri-devel June 2020

dri-devel@lists.freedesktop.org

315 participants
731 discussions

[PATCH] drm/tegra: Add zpos property for cursor planes
by Thierry Reding 11 Jun '20

11 Jun '20

From: Thierry Reding <treding(a)nvidia.com> As of commit 4dc55525b095 ("drm: plane: Verify that no or all planes have a zpos property") a warning is emitted if there's a mix of planes with and without a zpos property. On Tegra, cursor planes are always composited on top of all other planes, which is why they never had a zpos property attached to them. However, since the composition order is fixed, this is trivial to remedy by simply attaching an immutable zpos property to them. Reported-by: Jonathan Hunter <jonathanh(a)nvidia.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- drivers/gpu/drm/tegra/dc.c | 10 ++++++++-- drivers/gpu/drm/tegra/hub.c | 2 +- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 83f31c6e891c..e7a6eb952ece 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -787,7 +787,7 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm, } drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs); - drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255); + drm_plane_create_zpos_property(&plane->base, 1 + plane->index, 1, 255); err = drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0, @@ -957,6 +957,7 @@ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm, } drm_plane_helper_add(&plane->base, &tegra_cursor_plane_helper_funcs); + drm_plane_create_zpos_immutable_property(&plane->base, 0); return &plane->base; } @@ -1074,7 +1075,12 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm, } drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs); - drm_plane_create_zpos_property(&plane->base, plane->index, 0, 255); + + if (!cursor) + drm_plane_create_zpos_property(&plane->base, 1 + plane->index, + 1, 255); + else + drm_plane_create_zpos_immutable_property(&plane->base, 0); err = drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0, diff --git a/drivers/gpu/drm/tegra/hub.c b/drivers/gpu/drm/tegra/hub.c index a2ef8f218d4e..697d75bbb9fa 100644 --- a/drivers/gpu/drm/tegra/hub.c +++ b/drivers/gpu/drm/tegra/hub.c @@ -590,7 +590,7 @@ struct drm_plane *tegra_shared_plane_create(struct drm_device *drm, } drm_plane_helper_add(p, &tegra_shared_plane_helper_funcs); - drm_plane_create_zpos_property(p, 0, 0, 255); + drm_plane_create_zpos_property(p, 1 + index, 1, 255); return p; } -- 2.24.1

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[PATCH] drm/panfrost: Use kvfree() to free bo->sgts in panfrost_mmu_map_fault_addr()
by Denis Efremov 11 Jun '20

11 Jun '20

Use kvfree() to free bo->sgts, because the memory is allocated with kvmalloc_array(). Fixes: 187d2929206e ("drm/panfrost: Add support for GPU heap allocations") Cc: stable(a)vger.kernel.org Signed-off-by: Denis Efremov <efremov(a)linux.com> --- drivers/gpu/drm/panfrost/panfrost_mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c index ed28aeba6d59..3c8ae7411c80 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -486,7 +486,7 @@ static int panfrost_mmu_map_fault_addr(struct panfrost_device *pfdev, int as, pages = kvmalloc_array(bo->base.base.size >> PAGE_SHIFT, sizeof(struct page *), GFP_KERNEL | __GFP_ZERO); if (!pages) { - kfree(bo->sgts); + kvfree(bo->sgts); bo->sgts = NULL; mutex_unlock(&bo->base.pages_lock); ret = -ENOMEM; -- 2.26.2

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[PATCH/RFC 0/8] Support qcom USB3+DP combo phy (or type-c phy)
by Stephen Boyd 11 Jun '20

11 Jun '20

This patch series is based on v5 of the msm DP driver submission[1]. I haven't refreshed this to be based on v6, but I can do that soon. In the v5 patch series review I suggested that the DP PHY and PLL be split out of the drm driver and moved to the qmp phy driver. This patch series does that, but it is still marked as an RFC because there are a couple more things to do, mostly updating the DT binding and getting agreement on how to structure the code. Eventually I believe the qmp phy driver will need to listen for type-c notifiers or somehow know the type-c pinout being used so this driver can program things slightly differently. Right now, I don't have any way to test it though, so I've left it as future work. For some more details, the DP phy and the USB3 phy share the same physical pins on the SoC and those pins pretty much line up with a type-c pinout modulo some CC pins for cable orientation detection logic that lives on the PMIC. So the DP phy can use all four lanes or it can use two lanes and the USB3 phy can use two lanes. In the hardware designs that I have access to it is always two lanes for USB3 and two lanes for DP going through what looks like a type-c pinout so this just hard codes that configuration in the driver. Here's the example node that I'm using on sc7180: usb_1_qmpphy: phy-wrapper@88e9000 { compatible = "qcom,sc7180-qmp-usb3-dp-phy"; reg = <0 0x088e9000 0 0x18c>, // usb pll (or serdes) <0 0x088e8000 0 0x38>, // dp com <0 0x088ea000 0 0x40>; // dp pll (or serdes) status = "disabled"; #address-cells = <2>; #size-cells = <2>; ranges; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, <&gcc GCC_USB3_PRIM_CLKREF_CLK>, <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; clock-names = "aux", "cfg_ahb", "ref", "com_aux"; resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, <&gcc GCC_USB3_DP_PHY_PRIM_BCR>; reset-names = "phy", "common"; usb_1_ssphy: usb3-phy@88e9200 { reg = <0 0x088e9200 0 0x128>, // tx0 <0 0x088e9400 0 0x200>, // rx0 <0 0x088e9c00 0 0x218>, // pcs <0 0x088e9600 0 0x128>, // tx1 <0 0x088e9800 0 0x200>, // rx1 <0 0x088e9a00 0 0x18>; // pcs misc #clock-cells = <0>; #phy-cells = <0>; clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; clock-names = "pipe0"; clock-output-names = "usb3_phy_pipe_clk_src"; }; dp_phy: dp-phy@88ea200 { reg = <0 0x088ea200 0 0x200>, // tx0 <0 0x088ea400 0 0x200>, // rx0 <0 0x088eaa00 0 0x200>, // dp phy <0 0x088ea600 0 0x200>, // tx1 <0 0x088ea800 0 0x200>; // rx1 #clock-cells = <1>; #phy-cells = <0>; }; }; I had to put the serdes register region in the wrapper node and jam the common area (dp_com) in the middle. Sort of a mess but it was the best I could do to make the driver changes minimially invasive. I also had to change the node names to 'usb3-phy' and 'dp-phy' from 'phy' so that I could differentiate the different phys in the driver. Otherwise the qmp driver was already mostly prepared for two different phys to sit next to each other inside the phy wrapper so it was mostly just a chore of moving code from one place to another. I'll also point out that I found out the DP controller driver is resetting the aux phy settings right after it configures it. The last patch in this series rips out the DP PHY and PLL code from the drm driver and wires in the phy API calls instead. In that same patch I also fixed this aux reset behavior by removing the bit that resets the aux phy. I believe that the aux configuration is broken in the DP driver but I fixed it now I think. TODO: * Update DT binding for qmp phy * Clean up phy power on sequence a bit so that it is done in one place instead of two * Allow link rate to change after phy is powered on? * Make the runtime PM logic detect combo phy and power down both? Stephen Boyd (8): phy: qcom-qmp: Move phy mode into struct qmp_phy phy: qcom-qmp: Remove 'initialized' in favor of 'init_count' phy: qcom-qmp: Move 'serdes' and 'cfg' into 'struct qcom_phy' phy: qcom-qmp: Get dp_com I/O resource by index phy: qcom-qmp: Add support for DP in USB3+DP combo phy phy: qcom-qmp: Add support for sc7180 DP phy clk: qcom: dispcc: Update DP clk ops for phy design drm/msm/dp: Use qmp phy for DP PLL and PHY drivers/clk/qcom/clk-rcg2.c | 19 +- drivers/clk/qcom/dispcc-sc7180.c | 3 - drivers/gpu/drm/msm/Kconfig | 13 - drivers/gpu/drm/msm/Makefile | 4 - drivers/gpu/drm/msm/dp/dp_aux.c | 27 +- drivers/gpu/drm/msm/dp/dp_aux.h | 6 +- drivers/gpu/drm/msm/dp/dp_catalog.c | 247 +--- drivers/gpu/drm/msm/dp/dp_catalog.h | 11 +- drivers/gpu/drm/msm/dp/dp_ctrl.c | 58 +- drivers/gpu/drm/msm/dp/dp_display.c | 50 +- drivers/gpu/drm/msm/dp/dp_display.h | 3 - drivers/gpu/drm/msm/dp/dp_link.c | 2 + drivers/gpu/drm/msm/dp/dp_panel.c | 1 + drivers/gpu/drm/msm/dp/dp_parser.c | 123 +- drivers/gpu/drm/msm/dp/dp_parser.h | 81 +- drivers/gpu/drm/msm/dp/dp_power.c | 78 +- drivers/gpu/drm/msm/dp/dp_power.h | 21 - drivers/gpu/drm/msm/dp/pll/dp_pll.c | 127 -- drivers/gpu/drm/msm/dp/pll/dp_pll.h | 57 - drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c | 401 ------ drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.h | 86 -- drivers/gpu/drm/msm/dp/pll/dp_pll_10nm_util.c | 524 -------- drivers/phy/qualcomm/phy-qcom-qmp.c | 1103 ++++++++++++++--- drivers/phy/qualcomm/phy-qcom-qmp.h | 80 ++ 24 files changed, 1133 insertions(+), 1992 deletions(-) delete mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll.c delete mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll.h delete mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c delete mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.h delete mode 100644 drivers/gpu/drm/msm/dp/pll/dp_pll_10nm_util.c Cc: Jeykumar Sankaran <jsanka(a)codeaurora.org> Cc: Chandan Uddaraju <chandanu(a)codeaurora.org> Cc: Vara Reddy <varar(a)codeaurora.org> Cc: Tanmay Shah <tanmay(a)codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson(a)linaro.org> Cc: Manu Gautam <mgautam(a)codeaurora.org> Cc: Sandeep Maheswaram <sanm(a)codeaurora.org> Cc: Douglas Anderson <dianders(a)chromium.org> Cc: Sean Paul <seanpaul(a)chromium.org> [1] https://lore.kernel.org/r/1585701031-28871-1-git-send-email-tanmay@codeauro… base-commit: 3d77e6a8804abcc0504c904bd6e5cdf3a5cf8162 prerequisite-patch-id: 627a6baa59c072bd77bec81580c3c7ebfafb91f4 prerequisite-patch-id: 867c626c7ad458ceddacc7d47007fda855855ba5 prerequisite-patch-id: b32de781ef4575f6e2811f5d877747e6f517a430 prerequisite-patch-id: 670511d27642902829faf0c5929c829daeeb004c prerequisite-patch-id: a0db84ff788ba79e4df84642658d3607726fbeef prerequisite-patch-id: 12421c3c5b640e91613fe780e9d11eb91604f25b prerequisite-patch-id: 0e064646903933b0e162a44ce392f7a4875116ce prerequisite-patch-id: b394fb01b5c82db8457311e30403902c445407fd prerequisite-patch-id: 0770e225225c1b82953a668d0b162ff3191d2955 -- Sent by a computer, using git, on the internet

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[PULL] drm-misc-next-fixes
by Thomas Zimmermann 11 Jun '20

11 Jun '20

Hi Dave and Daniel, here's the PR for the latest fixes in drm-misc-next-fixes. Best regards Thomas drm-misc-next-fixes-2020-06-11: In core, DRM connectors now notify userspace of hotplug events via sysfs. In drivers, sun4i now uses 4 bits to store the clock's m divider; ast sets up 24/32-bit color mode correctly. The following changes since commit 9ca1f474cea0edc14a1d7ec933e5472c0ff115d3: Merge tag 'amd-drm-next-5.8-2020-05-27' of git://people.freedesktop.org/~agd5f/linux into drm-next (2020-05-28 16:10:17 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2020-06-11 for you to fetch changes up to 291ddeb621e4a9f1ced8302a777fbd7fbda058c6: drm/ast: fix missing break in switch statement for format->cpp[0] case 4 (2020-06-11 09:05:31 +0200) ---------------------------------------------------------------- In core, DRM connectors now notify userspace of hotplug events via sysfs. In drivers, sun4i now uses 4 bits to store the clock's m divider; ast sets up 24/32-bit color mode correctly. ---------------------------------------------------------------- Colin Ian King (1): drm/ast: fix missing break in switch statement for format->cpp[0] case 4 Jernej Skrabec (1): drm/sun4i: hdmi ddc clk: Fix size of m divider Jeykumar Sankaran (1): drm/connector: notify userspace on hotplug after register complete drivers/gpu/drm/ast/ast_mode.c | 1 + drivers/gpu/drm/drm_connector.c | 5 +++++ drivers/gpu/drm/drm_sysfs.c | 3 --- drivers/gpu/drm/sun4i/sun4i_hdmi.h | 2 +- drivers/gpu/drm/sun4i/sun4i_hdmi_ddc_clk.c | 2 +- 5 files changed, 8 insertions(+), 5 deletions(-)

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[PATCH v2 0/3] Add LT9611 DSI to HDMI bridge
by Vinod Koul 11 Jun '20

11 Jun '20

Hi, This series adds driver and bindings for Lontium LT9611 bridge chip which takes MIPI DSI as input and HDMI as output. This chip can be found in 96boards RB3 platform [1] commonly called DB845c. [1]: https://www.96boards.org/product/rb3-platform/ Changes in v2: - Add acks by Rob - Fix comments reported by Emil and rename the file to lontium-lt9611.c - Fix comments reported by Laurent on binding and driver - Add HDMI audio support Vinod Koul (3): dt-bindings: vendor-prefixes: Add Lontium vendor prefix dt-bindings: display: bridge: Add documentation for LT9611 drm/bridge: Introduce LT9611 DSI to HDMI bridge .../display/bridge/lontium,lt9611.yaml | 176 +++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + drivers/gpu/drm/bridge/Kconfig | 13 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/lontium-lt9611.c | 1219 +++++++++++++++++ 5 files changed, 1411 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml create mode 100644 drivers/gpu/drm/bridge/lontium-lt9611.c -- 2.26.2

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[Bug 208135] New: AMDGPU sleep with preemption disabled
by bugzilla-daemon＠bugzilla.kernel.org 11 Jun '20

11 Jun '20

https://bugzilla.kernel.org/show_bug.cgi?id=208135 Bug ID: 208135 Summary: AMDGPU sleep with preemption disabled Product: Drivers Version: 2.5 Kernel Version: 5.7.2 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: yshuiv7(a)gmail.com Regression: No Discovered by lockdep: [ 39.797936] BUG: sleeping function called from invalid context at mm/slab.h:567 [ 39.799669] in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1894, name: Xorg.wrap [ 39.801379] INFO: lockdep is turned off. [ 39.803079] Preemption disabled at: [ 39.803084] [<ffffffffad67ff2e>] kernel_fpu_begin+0xe/0x70 [ 39.806304] CPU: 22 PID: 1894 Comm: Xorg.wrap Tainted: P W O T 5.7.2-local+ #15 [ 39.807849] Hardware name: System manufacturer System Product Name/ROG STRIX X470-F GAMING, BIOS 5406 11/13/2019 [ 39.809341] Call Trace: [ 39.810828] show_stack+0x3e/0x40 [ 39.812311] dump_stack+0x7a/0xaa [ 39.813802] ___might_sleep.cold+0xfa/0x10b [ 39.815280] __might_sleep+0x50/0x90 [ 39.816775] __kmalloc+0x1d6/0x230 [ 39.818249] ? dcn20_validate_bandwidth_internal+0x6d/0x260 [ 39.819722] dcn20_validate_bandwidth_internal+0x6d/0x260 [ 39.821217] dcn20_validate_bandwidth_fp+0x37/0xc0 [ 39.822698] dcn20_validate_bandwidth+0x2f/0x50 [ 39.824172] dc_validate_global_state+0x293/0x320 [ 39.825654] amdgpu_dm_atomic_check+0x475/0x7a0 [ 39.827130] drm_atomic_check_only+0x1e3/0x370 [ 39.828595] drm_atomic_commit+0x1c/0x60 [ 39.830052] drm_client_modeset_commit_atomic+0x1e4/0x250 [ 39.831538] drm_client_modeset_commit_locked+0x58/0x90 [ 39.832989] drm_client_modeset_commit+0x2a/0x50 [ 39.834455] drm_fb_helper_lastclose+0x56/0xa0 [ 39.835913] amdgpu_driver_lastclose_kms+0x9/0x10 [ 39.837372] drm_release+0xd7/0x110 [ 39.838821] __fput+0xf2/0x280 [ 39.840255] ____fput+0x10/0x20 [ 39.841667] task_work_run+0x62/0xa0 [ 39.843027] exit_to_usermode_loop+0xa7/0xb0 [ 39.844343] prepare_exit_to_usermode+0xd6/0x100 [ 39.845586] do_syscall_64+0x99/0x180 [ 39.846794] entry_SYSCALL_64_after_hwframe+0x49/0xb3 [ 39.847994] RIP: 0033:0x7fcaa32852f7 [ 39.849169] Code: ff e8 6d e5 01 00 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 00 f3 0f 1e fa 64 8b 04 25 18 00 00 00 85 c0 75 10 b8 03 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 41 c3 48 83 ec 18 89 7c 24 0c e8 13 4d f9 ff [ 39.850483] RSP: 002b:00007ffc0988ac68 EFLAGS: 00000246 ORIG_RAX: 0000000000000003 [ 39.851802] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 00007fcaa32852f7 [ 39.853111] RDX: 00007ffc0988ac80 RSI: 00000000c04064a0 RDI: 0000000000000003 [ 39.854431] RBP: 00007ffc0988acd0 R08: 0000000000000000 R09: 00007ffc0988aaf0 [ 39.855737] R10: 000055c3f212f64b R11: 0000000000000246 R12: 0000000000000003 [ 39.857039] R13: 0000000000000001 R14: 0000000000000000 R15: 00007ffc0988ac80 [ 47.693575] BUG: sleeping function called from invalid context at mm/slab.h:567 [ 47.693581] in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1894, name: Xorg [ 47.693584] INFO: lockdep is turned off. [ 47.693585] Preemption disabled at: [ 47.693590] [<ffffffffad67ff2e>] kernel_fpu_begin+0xe/0x70 [ 47.693595] CPU: 23 PID: 1894 Comm: Xorg Tainted: P W O T 5.7.2-local+ #15 [ 47.693598] Hardware name: System manufacturer System Product Name/ROG STRIX X470-F GAMING, BIOS 5406 11/13/2019 [ 47.693600] Call Trace: [ 47.693606] show_stack+0x3e/0x40 [ 47.693611] dump_stack+0x7a/0xaa [ 47.693615] ___might_sleep.cold+0xfa/0x10b [ 47.693619] __might_sleep+0x50/0x90 [ 47.693624] __kmalloc+0x1d6/0x230 [ 47.693628] ? dcn20_validate_bandwidth_internal+0x6d/0x260 [ 47.693632] dcn20_validate_bandwidth_internal+0x6d/0x260 [ 47.693636] dcn20_validate_bandwidth_fp+0x37/0xc0 [ 47.693640] dcn20_validate_bandwidth+0x2f/0x50 [ 47.693644] dc_validate_global_state+0x293/0x320 [ 47.693649] amdgpu_dm_atomic_check+0x475/0x7a0 [ 47.693654] drm_atomic_check_only+0x1e3/0x370 [ 47.693658] drm_atomic_commit+0x1c/0x60 [ 47.693662] drm_atomic_helper_set_config+0x80/0xd0 [ 47.693666] drm_mode_setcrtc+0x1fa/0x7d0 [ 47.693675] ? drm_mode_getcrtc+0x1b0/0x1b0 [ 47.693679] drm_ioctl_kernel+0x96/0xe0 [ 47.693684] drm_ioctl+0x22f/0x3c8 [ 47.693686] ? drm_mode_getcrtc+0x1b0/0x1b0 [ 47.693694] ? _raw_spin_unlock_irqrestore+0x38/0x60 [ 47.693698] amdgpu_drm_ioctl+0x55/0x90 [ 47.693703] ksys_ioctl+0x97/0xb0 [ 47.693707] __x64_sys_ioctl+0x15/0x20 [ 47.693710] do_syscall_64+0x5e/0x180 [ 47.693714] entry_SYSCALL_64_after_hwframe+0x49/0xb3 [ 47.693717] RIP: 0033:0x7fcc6ea748eb [ 47.693720] Code: 0f 1e fa 48 8b 05 a5 95 0c 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 0f 1f 44 00 00 f3 0f 1e fa b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 75 95 0c 00 f7 d8 64 89 01 48 [ 47.693722] RSP: 002b:00007ffddc4aa4f8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 [ 47.693725] RAX: ffffffffffffffda RBX: 00007ffddc4aa530 RCX: 00007fcc6ea748eb [ 47.693727] RDX: 00007ffddc4aa530 RSI: 00000000c06864a2 RDI: 000000000000000f [ 47.693729] RBP: 00000000c06864a2 R08: 0000000000000000 R09: 000055fa7b8ba8f0 [ 47.693731] R10: 0000000000000000 R11: 0000000000000246 R12: 0000000000000000 [ 47.693733] R13: 000000000000000f R14: 000055fa7acbcac0 R15: 0000000000000000 -- You are receiving this mail because: You are watching the assignee of the bug.

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[Bug 104791] ACPI errors on Lenovo C50-30 (AE_AML_INFINITE_LOOP, argument type mismatch)
by bugzilla-daemon＠bugzilla.kernel.org 10 Jun '20

10 Jun '20

https://bugzilla.kernel.org/show_bug.cgi?id=104791 James Ettle (james(a)ettle.org.uk) changed: What |Removed |Added ---------------------------------------------------------------------------- Status|ASSIGNED |RESOLVED Resolution|--- |CODE_FIX --- Comment #12 from James Ettle (james(a)ettle.org.uk) --- I've not seen this for a while now, using the Nvidia 820A on this machine seems to be working OK. Closing, tested with kernel-5.6.16-300.fc32.x86_64. -- You are receiving this mail because: You are watching the assignee of the bug.

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[PATCH 01/11] tty/sysrq: alpha: export and use __sysrq_get_key_op()
by Emil Velikov 10 Jun '20

10 Jun '20

Export a pointer to the sysrq_get_key_op(). This way we can cleanly unregister it, instead of the current solutions of modifuing it inplace. Since __sysrq_get_key_op() is no longer used externally, let's make it a static function. This patch will allow us to limit access to each and every sysrq op and constify the sysrq handling. Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: Jiri Slaby <jslaby(a)suse.com> Cc: linux-kernel(a)vger.kernel.org Cc: Richard Henderson <rth(a)twiddle.net> Cc: Ivan Kokshaysky <ink(a)jurassic.park.msu.ru> Cc: Matt Turner <mattst88(a)gmail.com> Cc: linux-alpha(a)vger.kernel.org Signed-off-by: Emil Velikov <emil.l.velikov(a)gmail.com> --- Please keep me in the CC list, as I'm not subscribed to the list. IMHO it would be better if this gets merged this via the tty tree. --- arch/alpha/kernel/setup.c | 13 +++++++++++-- drivers/tty/sysrq.c | 4 +++- include/linux/sysrq.h | 2 +- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c index f19aa577354b..dd7f770f23cf 100644 --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c @@ -430,6 +430,15 @@ register_cpus(void) arch_initcall(register_cpus); +#ifdef CONFIG_MAGIC_SYSRQ +static struct sysrq_key_op srm_sysrq_reboot_op = { + .handler = machine_halt, + .help_msg = "reboot(b)", + .action_msg = "Resetting", + .enable_mask = SYSRQ_ENABLE_BOOT, +}; +#endif + void __init setup_arch(char **cmdline_p) { @@ -550,8 +559,8 @@ setup_arch(char **cmdline_p) /* If we're using SRM, make sysrq-b halt back to the prom, not auto-reboot. */ if (alpha_using_srm) { - struct sysrq_key_op *op = __sysrq_get_key_op('b'); - op->handler = (void *) machine_halt; + unregister_sysrq_key('b', __sysrq_reboot_op); + register_sysrq_key('b', &srm_sysrq_reboot_op); } #endif diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c index 0dc3878794fd..1741134cabca 100644 --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c @@ -172,6 +172,8 @@ static struct sysrq_key_op sysrq_reboot_op = { .enable_mask = SYSRQ_ENABLE_BOOT, }; +struct sysrq_key_op *__sysrq_reboot_op = &sysrq_reboot_op; + static void sysrq_handle_sync(int key) { emergency_sync(); @@ -516,7 +518,7 @@ static int sysrq_key_table_key2index(int key) /* * get and put functions for the table, exposed to modules. */ -struct sysrq_key_op *__sysrq_get_key_op(int key) +static struct sysrq_key_op *__sysrq_get_key_op(int key) { struct sysrq_key_op *op_p = NULL; int i; diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h index 8e159e16850f..9b51f98e5f60 100644 --- a/include/linux/sysrq.h +++ b/include/linux/sysrq.h @@ -47,7 +47,7 @@ void handle_sysrq(int key); void __handle_sysrq(int key, bool check_mask); int register_sysrq_key(int key, struct sysrq_key_op *op); int unregister_sysrq_key(int key, struct sysrq_key_op *op); -struct sysrq_key_op *__sysrq_get_key_op(int key); +extern struct sysrq_key_op *__sysrq_reboot_op; int sysrq_toggle_support(int enable_mask); int sysrq_mask(void); -- 2.25.1

10 22

[PATCH 1/1] AMDGPU: Replace invalid device ID with a valid device ID
by Sandeep Raghuraman 10 Jun '20

10 Jun '20

Initializes Powertune data for a specific Hawaii card by fixing what looks like a typo in the code. The device ID 66B1 is not a supported device ID for this driver, and is not mentioned elsewhere. 67B1 is a valid device ID, and is a Hawaii Pro GPU. I have tested on my R9 390 which has device ID 67B1, and it works fine without problems. Signed-off-by: Sandeep Raghuraman <sandy.8925(a)gmail.com> --- drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c index 85e5b1ed22c29..56923a96b4502 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c +++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c @@ -239,7 +239,7 @@ static void ci_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) switch (dev_id) { case 0x67BA: - case 0x66B1: + case 0x67B1: smu_data->power_tune_defaults = &defaults_hawaii_pro; break; case 0x67B8:

2 1

[PATCH] drm/ast: fix missing break in switch statement for format->cpp[0] case 4
by Colin King 10 Jun '20

10 Jun '20

From: Colin Ian King <colin.king(a)canonical.com> Currently the switch statement for format->cpp[0] value 4 assigns color_index which is never read again and then falls through to the default case and returns. This looks like a missing break statement bug. Fix this by adding a break statement. Addresses-Coverity: ("Unused value") Fixes: 259d14a76a27 ("drm/ast: Split ast_set_vbios_mode_info()") Signed-off-by: Colin Ian King <colin.king(a)canonical.com> --- drivers/gpu/drm/ast/ast_mode.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index 7d39b858c9f1..3a3a511670c9 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -226,6 +226,7 @@ static void ast_set_vbios_color_reg(struct ast_private *ast, case 3: case 4: color_index = TrueCModeIndex; + break; default: return; } -- 2.27.0.rc0

2 1

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dri-devel June 2020