dri-devel June 2020

dri-devel@lists.freedesktop.org

315 participants
731 discussions

[PATCH] drm/i915/gvt: print actionable error message when gm runs out
by Julian Stecklina 05 Jun '20

05 Jun '20

When a user tries to allocate too many or too big vGPUs and runs out of graphics memory, the resulting error message is not actionable and looks like an internal error. Change the error message to clearly point out what actions a user can take to resolve this situation. Cc: Thomas Prescher <thomas.prescher(a)cyberus-technology.de> Cc: Zhenyu Wang <zhenyuw(a)linux.intel.com> Signed-off-by: Julian Stecklina <julian.stecklina(a)cyberus-technology.de> --- drivers/gpu/drm/i915/… [View More]

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[PATCH v2 1/1] drm/mm: add ig_frag selftest
by Nirmoy Das 05 Jun '20

05 Jun '20

This patch introduces fragmentation in the address range and measures time taken by 10k and 20k insertions. ig_frag() will fail if the time taken by 20k insertions takes more than 4 times of 10k insertions as we know that insertions should at most scale quadratically. v2: introduce fragmentation by freeing every other node. only test bottom-up and top-down for now. Signed-off-by: Nirmoy Das <nirmoy.das(a)amd.com> --- drivers/gpu/drm/selftests/drm_mm_selftests.h | 1 + drivers/gpu/drm/… [View More]selftests/test-drm_mm.c | 124 +++++++++++++++++++ 2 files changed, 125 insertions(+) diff --git a/drivers/gpu/drm/selftests/drm_mm_selftests.h b/drivers/gpu/drm/selftests/drm_mm_selftests.h index 6b943ea1c57d..8c87c964176b 100644 --- a/drivers/gpu/drm/selftests/drm_mm_selftests.h +++ b/drivers/gpu/drm/selftests/drm_mm_selftests.h @@ -14,6 +14,7 @@ selftest(insert, igt_insert) selftest(replace, igt_replace) selftest(insert_range, igt_insert_range) selftest(align, igt_align) +selftest(frag, igt_frag) selftest(align32, igt_align32) selftest(align64, igt_align64) selftest(evict, igt_evict) diff --git a/drivers/gpu/drm/selftests/test-drm_mm.c b/drivers/gpu/drm/selftests/test-drm_mm.c index 9aabe82dcd3a..34231baacd87 100644 --- a/drivers/gpu/drm/selftests/test-drm_mm.c +++ b/drivers/gpu/drm/selftests/test-drm_mm.c @@ -10,6 +10,7 @@ #include <linux/slab.h> #include <linux/random.h> #include <linux/vmalloc.h> +#include <linux/ktime.h> #include <drm/drm_mm.h> @@ -1033,6 +1034,129 @@ static int igt_insert_range(void *ignored) return 0; } +static int prepare_igt_frag(struct drm_mm *mm, + struct drm_mm_node *nodes, + unsigned int num_insert, + const struct insert_mode *mode) +{ + unsigned int size = 4096; + unsigned int i; + u64 ret = -EINVAL; + + for (i = 0; i < num_insert; i++) { + if (!expect_insert(mm, &nodes[i], size, 0, i, + mode) != 0) { + pr_err("%s insert failed\n", mode->name); + goto out; + } + } + + /* introduce fragmentation by freeing every other node */ + for (i = 0; i < num_insert; i++) { + if (i % 2 == 0) + drm_mm_remove_node(&nodes[i]); + } + +out: + return ret; + +} + +static u64 get_insert_time(struct drm_mm *mm, + unsigned int num_insert, + struct drm_mm_node *nodes, + const struct insert_mode *mode) +{ + unsigned int size = 8192; + ktime_t start; + unsigned int i; + u64 ret = -EINVAL; + + start = ktime_get(); + for (i = 0; i < num_insert; i++) { + if (!expect_insert(mm, &nodes[i], size, 0, i, mode) != 0) { + pr_err("%s insert failed\n", mode->name); + goto out; + } + } + + ret = ktime_to_ns(ktime_sub(ktime_get(), start)); + +out: + return ret; + +} + +static int igt_frag(void *ignored) +{ + struct drm_mm mm; + const struct insert_mode *mode; + struct drm_mm_node *nodes, *node, *next; + unsigned int insert_size = 10000; + unsigned int scale_factor = 4; + int ret = -EINVAL; + + /* We need 4 * insert_size nodes to hold intermediate allocated + * drm_mm nodes. + * 1 times for prepare_igt_frag() + * 1 times for get_insert_time() + * 2 times for get_insert_time() + */ + nodes = vzalloc(array_size(insert_size * 4, sizeof(*nodes))); + if (!nodes) + return -ENOMEM; + + /* For BOTTOMUP and TOPDOWN, we first fragment the + * address space using prepare_igt_frag() and then try to verify + * that that insertions scale quadratically from 10k to 20k insertions + */ + drm_mm_init(&mm, 1, U64_MAX - 2); + for (mode = insert_modes; mode->name; mode++) { + u64 insert_time1, insert_time2; + + if (mode->mode != DRM_MM_INSERT_LOW || + mode->mode != DRM_MM_INSERT_HIGH) + continue; + + ret = prepare_igt_frag(&mm, nodes, insert_size, mode); + if (!ret) + goto err; + + insert_time1 = get_insert_time(&mm, insert_size, + nodes + insert_size, mode); + if (insert_time1 < 0) + goto err; + + insert_time2 = get_insert_time(&mm, (insert_size * 2), + nodes + insert_size * 2, mode); + if (insert_time2 < 0) + goto err; + + pr_info("%s fragmented insert of %u and %u insertions took %llu and %llu nsecs\n", + mode->name, insert_size, insert_size * 2, + insert_time1, insert_time2); + + if (insert_time2 > (scale_factor * insert_time1)) { + pr_err("%s fragmented insert took %llu nsecs more\n", + mode->name, + insert_time2 - (scale_factor * insert_time1)); + goto err; + } + + drm_mm_for_each_node_safe(node, next, &mm) + drm_mm_remove_node(node); + } + + ret = 0; +err: + drm_mm_for_each_node_safe(node, next, &mm) + drm_mm_remove_node(node); + drm_mm_takedown(&mm); + vfree(nodes); + + return ret; +} + static int igt_align(void *ignored) { const struct insert_mode *mode; -- 2.26.2 [View Less]

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Dynamically change enumeration list of DRM enumeration property
by Yogish Kulkarni 05 Jun '20

05 Jun '20

Hi, Is it possible to dynamically change enumeration list of DRM enumeration property ? Motivation behind this question is to understand whether it is possible to create connector enum property (e.g a property which will list supported output encodings - like yuv420, yuv422 etc) whose list of supported enum values could be changed dynamically e.g. based on which sink is connected. I think there is existing EDID connector property whose value changes based on connected sink. EDID is a BLOB … [View More]

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[PATCH v12 0/2] Add initial support for slimport anx7625
by Xin Ji 05 Jun '20

05 Jun '20

Hi all, The following series add support for the Slimport ANX7625 transmitter, a ultra-low power Full-HD 4K MIPI to DP transmitter designed for portable device. This is the v12 version, any mistakes, please let me know, I will fix it in the next series. Change history: v12: Fix comments from Hsin-Yi Wang - Rebase the code on kernel 5.7, fix DRM interface not match issue. v11: Fix comments from Rob Herring - Update commit message. - Remove unused label. v10: Fix comments from Rob … [View More]

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[PATCH v7 0/6] iommu/arm-smmu: Enable split pagetable support
by Jordan Crouse 04 Jun '20

04 Jun '20

Another iteration of the split-pagetable support for arm-smmu and the Adreno GPU SMMU. After email discussions [1] we opted to make a arm-smmu implementation for specifically for the Adreno GPU and use that to enable split pagetable support and later other implementation specific bits that we need. On the hardware side this is very close to the same code from before [2] only the TTBR1 quirk is turned on by the implementation and not a domain attribute. In drm/msm we use the returned size of … [View More]the aperture as a clue to let us know which virtual address space we should use for global memory objects. There are two open items that you should be aware of. First, in the implementation specific code we have to check the compatible string of the device so that we only enable TTBR1 for the GPU (SID 0) and not the GMU (SID 4). I went back and forth trying to decide if I wanted to use the compatbile string or the SID as the filter and settled on the compatible string but I could be talked out of it. The other open item is that in drm/msm the hardware only uses 49 bits of the address space but arm-smmu expects the address to be sign extended all the way to 64 bits. This isn't a problem normally unless you look at the hardware registers that contain a IOVA and then the upper bits will be zero. I opted to restrict the internal drm/msm IOVA range to only 49 bits and then sign extend right before calling iommu_map / iommu_unmap. This is a bit wonky but I thought that matching the hardware would be less confusing when debugging a hang. [1] https://lists.linuxfoundation.org/pipermail/iommu/2020-May/044537.html [2] https://patchwork.kernel.org/patch/11482591/ Jordan Crouse (6): iommu/arm-smmu: Pass io-pgtable config to implementation specific function iommu/arm-smmu: Add support for split pagetables dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU iommu/arm-smmu: Add implementation for the adreno GPU SMMU drm/msm: Set the global virtual address range from the IOMMU domain arm6: dts: qcom: sm845: Set the compatible string for the GPU SMMU .../devicetree/bindings/iommu/arm,smmu.yaml | 4 ++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 13 ++++++- drivers/gpu/drm/msm/msm_iommu.c | 7 ++++ drivers/iommu/arm-smmu-impl.c | 6 ++- drivers/iommu/arm-smmu-qcom.c | 38 ++++++++++++++++++- drivers/iommu/arm-smmu.c | 32 +++++++++++----- drivers/iommu/arm-smmu.h | 29 ++++++++++---- 8 files changed, 108 insertions(+), 23 deletions(-) -- 2.17.1 [View Less]

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[PATCH V3 00/15] Remove duplicated kmap code
by ira.weiny＠intel.com 04 Jun '20

04 Jun '20

From: Ira Weiny <ira.weiny(a)intel.com> The kmap infrastructure has been copied almost verbatim to every architecture. This series consolidates obvious duplicated code by defining core functions which call into the architectures only when needed. Some of the k[un]map_atomic() implementations have some similarities but the similarities were not sufficient to warrant further changes. In addition we remove a duplicate implementation of kmap() in DRM. Testing was done by 0day to cover all … [View More]the architectures I can't readily build/test. --- Changes from V2: Collect review/acks Add kmap_prot consolidation patch from Christoph Add 3 suggested patches from Al Viro Fix include for microblaze Fix static inline for microblaze Changes from V1: Fix bisect-ability Update commit message and fix line lengths Remove unneded kunmap_atomic_high() declarations Remove unneded kmap_atomic_high() declarations collect reviews rebase to 5.7-rc4 Changes from V0: Define kmap_flush_tlb() and make kmap() truely arch independent. Redefine the k[un]map_atomic_* code to call into the architectures for high mem pages Ensure all architectures define kmap_prot, use it appropriately, and define kmap_atomic_prot() Remove drm implementation of kmap_atomic() Ira Weiny (15): arch/kmap: Remove BUG_ON() arch/xtensa: Move kmap build bug out of the way arch/kmap: Remove redundant arch specific kmaps arch/kunmap: Remove duplicate kunmap implementations {x86,powerpc,microblaze}/kmap: Move preempt disable arch/kmap_atomic: Consolidate duplicate code arch/kunmap_atomic: Consolidate duplicate code arch/kmap: Ensure kmap_prot visibility arch/kmap: Don't hard code kmap_prot values arch/kmap: Define kmap_atomic_prot() for all arch's drm: Remove drm specific kmap_atomic code kmap: Remove kmap_atomic_to_page() parisc/kmap: Remove duplicate kmap code sparc: Remove unnecessary includes kmap: Consolidate kmap_prot definitions arch/arc/include/asm/highmem.h | 18 ------- arch/arc/mm/highmem.c | 28 ++-------- arch/arm/include/asm/highmem.h | 9 ---- arch/arm/mm/highmem.c | 35 ++----------- arch/csky/include/asm/highmem.h | 12 +---- arch/csky/mm/highmem.c | 56 ++++---------------- arch/microblaze/include/asm/highmem.h | 27 ---------- arch/microblaze/mm/highmem.c | 16 ++---- arch/microblaze/mm/init.c | 3 -- arch/mips/include/asm/highmem.h | 11 +--- arch/mips/mm/cache.c | 6 +-- arch/mips/mm/highmem.c | 49 +++--------------- arch/nds32/include/asm/highmem.h | 9 ---- arch/nds32/mm/highmem.c | 39 ++------------ arch/parisc/include/asm/cacheflush.h | 30 +---------- arch/powerpc/include/asm/highmem.h | 28 ---------- arch/powerpc/mm/highmem.c | 21 ++------ arch/powerpc/mm/mem.c | 3 -- arch/sparc/include/asm/highmem.h | 25 +-------- arch/sparc/mm/highmem.c | 20 ++------ arch/sparc/mm/io-unit.c | 1 - arch/sparc/mm/iommu.c | 1 - arch/x86/include/asm/fixmap.h | 1 - arch/x86/include/asm/highmem.h | 9 ---- arch/x86/mm/highmem_32.c | 50 ++---------------- arch/xtensa/include/asm/highmem.h | 27 ---------- arch/xtensa/mm/highmem.c | 22 ++++---- drivers/gpu/drm/ttm/ttm_bo_util.c | 56 ++------------------ drivers/gpu/drm/vmwgfx/vmwgfx_blit.c | 16 +++--- include/drm/ttm/ttm_bo_api.h | 4 -- include/linux/highmem.h | 74 ++++++++++++++++++++++++--- 31 files changed, 150 insertions(+), 556 deletions(-) -- 2.25.1 [View Less]

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[PATCH v6] drm/msm/dpu: ensure device suspend happens during PM sleep
by Kalyan Thota 04 Jun '20

04 Jun '20

"The PM core always increments the runtime usage counter before calling the ->suspend() callback and decrements it after calling the ->resume() callback" DPU and DSI are managed as runtime devices. When suspend is triggered, PM core adds a refcount on all the devices and calls device suspend, since usage count is already incremented, runtime suspend was not getting called and it kept the clocks on which resulted in target not entering into XO shutdown. Add changes to force suspend on … [View More]runtime devices during pm sleep. Changes in v1: - Remove unnecessary checks in the function _dpu_kms_disable_dpu (Rob Clark). Changes in v2: - Avoid using suspend_late to reset the usagecount as suspend_late might not be called during suspend call failures (Doug). Changes in v3: - Use force suspend instead of managing device usage_count via runtime put and get API's to trigger callbacks (Doug). Changes in v4: - Check the return values of pm_runtime_force_suspend and pm_runtime_force_resume API's and pass appropriately (Doug). Changes in v5: - With v4 patch, test cycle has uncovered issues in device resume. On bubs: cmd tx failures were seen as SW is sending panel off commands when the dsi resources are turned off. Upon suspend, DRM driver will issue a NULL composition to the dpu, followed by turning off all the HW blocks. v5 changes will serialize the NULL commit and resource unwinding by handling them under PM prepare and PM complete phases there by ensuring that clks are on when panel off commands are being processed. Changes in v6: - Use drm_mode_config_helper_suspend/resume() instead of legacy API drm_atomic_helper_suspend/resume() (Doug). Trigger runtime callbacks from the suspend/resume call to turn off the resources. Signed-off-by: Kalyan Thota <kalyan_t(a)codeaurora.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 + drivers/gpu/drm/msm/dsi/dsi.c | 2 + drivers/gpu/drm/msm/msm_drv.c | 67 ++++++++++++++++----------------- 3 files changed, 37 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index ce19f1d..b886d9d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1123,6 +1123,8 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev) static const struct dev_pm_ops dpu_pm_ops = { SET_RUNTIME_PM_OPS(dpu_runtime_suspend, dpu_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) }; static const struct of_device_id dpu_dt_match[] = { diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/dsi.c index 55ea4bc2..62704885 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.c +++ b/drivers/gpu/drm/msm/dsi/dsi.c @@ -161,6 +161,8 @@ static int dsi_dev_remove(struct platform_device *pdev) static const struct dev_pm_ops dsi_pm_ops = { SET_RUNTIME_PM_OPS(msm_dsi_runtime_suspend, msm_dsi_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) }; static struct platform_driver dsi_driver = { diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 7d985f8..da42ff7 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -1035,75 +1035,74 @@ static int msm_ioctl_submitqueue_close(struct drm_device *dev, void *data, .patchlevel = MSM_VERSION_PATCHLEVEL, }; -#ifdef CONFIG_PM_SLEEP -static int msm_pm_suspend(struct device *dev) +#ifdef CONFIG_PM +static int msm_runtime_suspend(struct device *dev) { struct drm_device *ddev = dev_get_drvdata(dev); struct msm_drm_private *priv = ddev->dev_private; + struct msm_mdss *mdss = priv->mdss; - if (WARN_ON(priv->pm_state)) - drm_atomic_state_put(priv->pm_state); + DBG(""); - priv->pm_state = drm_atomic_helper_suspend(ddev); - if (IS_ERR(priv->pm_state)) { - int ret = PTR_ERR(priv->pm_state); - DRM_ERROR("Failed to suspend dpu, %d\n", ret); - return ret; - } + if (mdss && mdss->funcs) + return mdss->funcs->disable(mdss); return 0; } -static int msm_pm_resume(struct device *dev) +static int msm_runtime_resume(struct device *dev) { struct drm_device *ddev = dev_get_drvdata(dev); struct msm_drm_private *priv = ddev->dev_private; - int ret; + struct msm_mdss *mdss = priv->mdss; - if (WARN_ON(!priv->pm_state)) - return -ENOENT; + DBG(""); - ret = drm_atomic_helper_resume(ddev, priv->pm_state); - if (!ret) - priv->pm_state = NULL; + if (mdss && mdss->funcs) + return mdss->funcs->enable(mdss); - return ret; + return 0; } #endif -#ifdef CONFIG_PM -static int msm_runtime_suspend(struct device *dev) +#ifdef CONFIG_PM_SLEEP +static int msm_pm_suspend(struct device *dev) { - struct drm_device *ddev = dev_get_drvdata(dev); - struct msm_drm_private *priv = ddev->dev_private; - struct msm_mdss *mdss = priv->mdss; - DBG(""); + if (pm_runtime_suspended(dev)) + return 0; - if (mdss && mdss->funcs) - return mdss->funcs->disable(mdss); + return msm_runtime_suspend(dev); +} - return 0; +static int msm_pm_resume(struct device *dev) +{ + if (pm_runtime_suspended(dev)) + return 0; + + return msm_runtime_resume(dev); } -static int msm_runtime_resume(struct device *dev) +static int msm_pm_prepare(struct device *dev) { struct drm_device *ddev = dev_get_drvdata(dev); - struct msm_drm_private *priv = ddev->dev_private; - struct msm_mdss *mdss = priv->mdss; - DBG(""); + return drm_mode_config_helper_suspend(ddev); +} - if (mdss && mdss->funcs) - return mdss->funcs->enable(mdss); +static void msm_pm_complete(struct device *dev) +{ + struct drm_device *ddev = dev_get_drvdata(dev); - return 0; + drm_mode_config_helper_resume(ddev); } #endif static const struct dev_pm_ops msm_pm_ops = { SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume) SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL) + .prepare = msm_pm_prepare, + .complete = msm_pm_complete, }; /* -- 1.9.1 [View Less]

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[PATCH] drm/panel: simple: Set connector type for DSI panels
by Laurent Pinchart 04 Jun '20

04 Jun '20

None of the DSI panels set the connector_type in their panel_desc descriptor. As they are all guaranteed to be DSI panels, that's an easy fix, set the connector type to DRM_MODE_CONNECTOR_DSI. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas(a)ideasonboard.com> --- drivers/gpu/drm/panel/panel-simple.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index b6ecd1552132..b86b52bfece7 100644 --- … [View More]

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[PATCH 00/21] drm: mxsfb: Add i.MX7 support
by Laurent Pinchart 04 Jun '20

04 Jun '20

Hello, This patch series adds i.MX7 support to the mxsfb driver. The eLCDIF instance found in the i.MX7 is backward-compatible with the already supported LCDC v4, but has extended features amongst which the most notable one is a second plane. The first 9 patches (01/21 to 09/21) contain miscellaneous cleanups and refactoring to prepare for what is to come. Patch 10/21 starts the real work with removal of the DRM simple display pipeline helper, as it doesn't support multiple planes. The next … [View More]patch (11/21) is an additional cleanup. Patches 12/21 to 14/21 fix vblank handling that I found to be broken when testing on my device. Patch 15/21 then performs an additional small cleanup, and patch 16/21 starts official support for i.MX7 by mentioning it in Kconfig. Patch 17/21 adds a new device model for the i.MX6SX and i.MX7 eLCDIF. After three additional cleanups in patches 18/21 to 20/21, patch 21/21 finally adds support for the second plane. The code is based on drm-misc-next and has been tested on an i.MX7D platform with a DPI panel. Laurent Pinchart (21): drm: mxsfb: Remove fbdev leftovers drm: mxsfb: Use drm_panel_bridge drm: mxsfb: Use BIT() macro to define register bitfields drm: mxsfb: Remove unused macros from mxsfb_regs.h drm: mxsfb: Clarify format and bus width configuration drm: mxsfb: Pass mxsfb_drm_private pointer to mxsfb_reset_block() drm: mxsfb: Use LCDC_CTRL register name explicitly drm: mxsfb: Remove register definitions from mxsfb_crtc.c drm: mxsfb: Remove unneeded includes drm: mxsfb: Stop using DRM simple display pipeline helper drm: mxsfb: Rename mxsfb_crtc.c to mxsfb_kms.c drm: mxsfb: Move vblank event arm to CRTC .atomic_flush() drm: mxsfb: Don't touch AXI clock in IRQ context drm: mxsfb: Enable vblank handling drm: mxsfb: Remove mxsfb_devdata unused fields drm: mxsfb: Add i.MX7 to the list of supported SoCs in Kconfig drm: mxsfb: Update internal IP version number for i.MX6SX drm: mxsfb: Drop non-OF support drm: mxsfb: Turn mxsfb_set_pixel_fmt() into a void function drm: mxsfb: Merge mxsfb_set_pixel_fmt() and mxsfb_set_bus_fmt() drm: mxsfb: Support the alpha plane drivers/gpu/drm/mxsfb/Kconfig | 4 +- drivers/gpu/drm/mxsfb/Makefile | 2 +- drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 343 ----------------- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 246 ++++--------- drivers/gpu/drm/mxsfb/mxsfb_drv.h | 42 ++- drivers/gpu/drm/mxsfb/mxsfb_kms.c | 565 +++++++++++++++++++++++++++++ drivers/gpu/drm/mxsfb/mxsfb_out.c | 99 ----- drivers/gpu/drm/mxsfb/mxsfb_regs.h | 107 +++--- 8 files changed, 730 insertions(+), 678 deletions(-) delete mode 100644 drivers/gpu/drm/mxsfb/mxsfb_crtc.c create mode 100644 drivers/gpu/drm/mxsfb/mxsfb_kms.c delete mode 100644 drivers/gpu/drm/mxsfb/mxsfb_out.c -- Regards, Laurent Pinchart [View Less]

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[v2] drm/bridge: ti-sn65dsi86: ensure bridge suspend happens during PM sleep
by Harigovindan P 04 Jun '20

04 Jun '20

ti-sn65dsi86 bridge is enumerated as a runtime device. Adding sleep ops to force runtime_suspend when PM suspend is requested on the device. Signed-off-by: Harigovindan P <harigovi(a)codeaurora.org> --- Changes in v2: - Include bridge name in the commit message and remove dependent patchwork link from the commit text as bridge is independent of OEM(Stephen Boyd) drivers/gpu/drm/bridge/ti-sn65dsi86.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/bridge/ti-… [View More]

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dri-devel June 2020