dri-devel July 2020

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[PATCH v7 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper.
by Swapnil Jakhade 26 Jul '20

26 Jul '20

This patch series adds new DRM bridge driver for Cadence MHDP DPI/DP bridge. The Cadence Display Port IP is also referred as MHDP (Mobile High Definition Link, High-Definition Multimedia Interface, Display Port). Cadence Display Port complies with VESA DisplayPort (DP) and embedded Display Port (eDP) standards. The MHDP bridge driver currently implements Single Stream Transport (SST) mode. It also adds Texas Instruments j721e SoC specific wrapper and adds the device tree bindings in YAML format. Some of the features that will be added later on include (but are not limited to): - Power Management (PM) support: We will implement the PM functions in next stage once there will be a stable driver in upstream - Converting to connector bridge operations: This is not supported currently because of dependency on TIDSS driver which has some limitations in supporting new model - Audio and MST support The patch series has three patches in the below sequence: 1. 0001-dt-bindings-drm-bridge-Document-Cadence-MHDP-brid.patch Documents the bindings in yaml format. 2. 0002-drm-bridge-Add-support-for-Cadence-MHDP-DPI-DP-br.patch This patch adds new DRM bridge driver for Cadence MHDP Display Port. The patch implements support for single stream transport mode. 3. 0003-drm-bridge-cdns-mhdp-Add-j721e-wrapper.patch Adds Texas Instruments (TI) j721e wrapper for MHDP. The wrapper configures MHDP clocks and muxes as required by SoC. This patch series is dependent on PHY patch series [1] to add new PHY APIs to get/set PHY attributes which is under review and not merged yet. [1] https://lkml.org/lkml/2020/7/17/158 Version History: v7: In 1/3 - No change In 2/3 - Switch to atomic versions of bridge operations - Implement atomic_check() handler to perform all validation checks - Add struct cdns_mhdp_bridge_state with subclassed bridge state - Use PHY API[1] to get PHY attributes instead of reading from PHY DT node - Updated HPD handling and link configuration in IRQ handler - Add "link_mutex" protecting the access to all the link parameters - Add support to check and print FW version information - Add separate function to initialize host parameters to simplify probe - Use waitqueue instead of manual loop in cdns_mhdp_remove - Add forward declarations and header files in cdns-mhdp-core.h file - Use bool instead of single bit values in struct cdns_mhdp_device - Fix for other minor comments given for v6 patches In 3/3 - Use of_device_is_compatible() to set compatible string specific values - Move mhdp_ti_j721e_ops structure to cdns-mhdp-j721e.c - Remove duplicate Copyright message - Remove CONFIG_DRM_CDNS_MHDP_J721E check - Add Reviewed-by: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> v6: - Added minor fixes in YAML file. - Added Reviewed-by: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> to the YAML patch. - Removed all the FIXME comments which are invalid in drm driver. - Reduced the mailbox timeout from 5s to 2s. - Added Reviewed-by: Tomi Valkeinen <tomi.valkeinen(a)ti.com> to the 003-drm-mhdp-add-j721e-wrapper patch. - Added Signed-off all the module authors. - Fixed the compiler error Reported-by: kbuild test robot <lkp(a)intel.com>. v5: - Added Signed-off-by: Jyri Sarha <jsarha(a)ti.com> tag to the code patches. v4: - Added SPDX dual license tag to YAML bindings. - Corrected indentation of the child node properties. - Removed the maxItems in the conditional statement. - Add Reviewed-by: Rob Herring <robh(a)kernel.org> tag to the Document Cadence MHDP bridge bindings patch. - Renamed the DRM driver executable name from mhdp8546 to cdns-mhdp in Makefile. - Renamed the DRM driver and header file from cdns-mhdp to cdns-mhdp-core. v3: - Added if / then clause to validate that the reg length is proper based on the value of the compatible property. - Updated phy property description in YAML to a generic one. - Renamed num_lanes and max_bit_rate property strings to cdns,num-lanes and cdns,max-bit-rate. v2: - Use enum in compatible property of YAML file. - Add reg-names property to YAML file - Add minItems and maxItems to reg property in YAML. - Remove cdns_mhdp_link_probe function to remove duplication of reading dpcd capabilities. Swapnil Jakhade (2): drm: bridge: Add support for Cadence MHDP DPI/DP bridge drm: bridge: cdns-mhdp: Add j721e wrapper Yuti Amonkar (1): dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings .../bindings/display/bridge/cdns,mhdp.yaml | 127 + drivers/gpu/drm/bridge/Kconfig | 24 + drivers/gpu/drm/bridge/Makefile | 7 + drivers/gpu/drm/bridge/cdns-mhdp-core.c | 2508 +++++++++++++++++ drivers/gpu/drm/bridge/cdns-mhdp-core.h | 397 +++ drivers/gpu/drm/bridge/cdns-mhdp-j721e.c | 75 + drivers/gpu/drm/bridge/cdns-mhdp-j721e.h | 19 + 7 files changed, 3157 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-core.c create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-core.h create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.c create mode 100644 drivers/gpu/drm/bridge/cdns-mhdp-j721e.h -- 2.26.1

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[PATCH] drm: of: Fix double-free bug
by Biju Das 26 Jul '20

26 Jul '20

Fix double-free bug in the error path. Fixes: 6529007522de ("drm: of: Add drm_of_lvds_get_dual_link_pixel_order") Reported-by: Pavel Machek <pavel(a)denx.de> Signed-off-by: Biju Das <biju.das.jz(a)bp.renesas.com> Cc: stable(a)vger.kernel.org --- This patch is tested against drm-fixes and drm-next. --- drivers/gpu/drm/drm_of.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_of.c b/drivers/gpu/drm/drm_of.c index fdb05fb..ca04c34 100644 --- a/drivers/gpu/drm/drm_of.c +++ b/drivers/gpu/drm/drm_of.c @@ -331,10 +331,8 @@ static int drm_of_lvds_get_remote_pixels_type( * configurations by passing the endpoints explicitly to * drm_of_lvds_get_dual_link_pixel_order(). */ - if (!current_pt || pixels_type != current_pt) { - of_node_put(remote_port); + if (!current_pt || pixels_type != current_pt) return -EINVAL; - } } return pixels_type; -- 2.7.4

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[PATCH v10 00/13] iommu/arm-smmu: Add Adreno SMMU specific implementation
by Jordan Crouse 26 Jul '20

26 Jul '20

(reworded the summary to reflect ongoing changes in the code) This series adds an Adreno SMMU implementation to arm-smmu to allow GPU hardware pagetable switching. The Adreno GPU has built in capabilities to switch the TTBR0 pagetable during runtime to allow each individual instance or application to have its own pagetable. In order to take advantage of the HW capabilities there are certain requirements needed of the SMMU hardware. This series adds support for an Adreno specific arm-smmu implementation. The new implementation 1) ensures that the GPU domain is always assigned context bank 0, 2) enables split pagetable support (TTBR1) so that the instance specific pagetable can be swapped while the global memory remains in place and 3) shares the current pagetable configuration with the GPU driver to allow it to create its own io-pgtable instances. The series then adds the drm/msm code to enable these features. For targets that support it allocate new pagetables using the io-pgtable configuration shared by the arm-smmu driver and swap them in during runtime. This version of the series merges the previous patchset(s) [1] and [2] with the following improvements: - arm-smmu: add implementation hook to allocate context banks - arm-smmu: Match the GPU domain by stream ID instead of compatible string - arm-smmu: Make DOMAIN_ATTR_PGTABLE_CFG bi-directional. The leaf driver queries the configuration to create a pagetable and then sends the newly created configuration back to the smmu-driver to enable TTBR0 - drm/msm: Add context reference counting for submissions - drm/msm: Use dummy functions to skip TLB operations on per-instance pagetables [1] https://lists.linuxfoundation.org/pipermail/iommu/2020-June/045653.html [2] https://lists.linuxfoundation.org/pipermail/iommu/2020-June/045659.html Jordan Crouse (13): iommu/arm-smmu: Pass io-pgtable config to implementation specific function iommu/arm-smmu: Add support for split pagetables iommu/arm-smmu: Add implementation hooks to configure contexts iommu/arm-smmu-qcom: Add implementation for the adreno GPU SMMU iommu: Add a domain attribute to get/set a pagetable configuration iommu/arm-smmu-qcom: Get and set the pagetable config for split pagetables dt-bindings: arm-smmu: Add compatible string for Adreno GPU SMMU drm/msm: Add a context pointer to the submitqueue drm/msm: Set the global virtual address range from the IOMMU domain drm/msm: Add support to create a local pagetable drm/msm: Add support for private address space instances drm/msm/a6xx: Add support for per-instance pagetables arm: dts: qcom: sm845: Set the compatible string for the GPU SMMU .../devicetree/bindings/iommu/arm,smmu.yaml | 4 + arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 12 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 58 ++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 18 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +- drivers/gpu/drm/msm/msm_drv.c | 16 +- drivers/gpu/drm/msm/msm_drv.h | 13 ++ drivers/gpu/drm/msm/msm_gem.h | 1 + drivers/gpu/drm/msm/msm_gem_submit.c | 8 +- drivers/gpu/drm/msm/msm_gem_vma.c | 9 + drivers/gpu/drm/msm/msm_gpu.c | 26 ++- drivers/gpu/drm/msm/msm_gpu.h | 12 +- drivers/gpu/drm/msm/msm_gpummu.c | 2 +- drivers/gpu/drm/msm/msm_iommu.c | 198 +++++++++++++++++- drivers/gpu/drm/msm/msm_mmu.h | 16 +- drivers/gpu/drm/msm/msm_ringbuffer.h | 1 + drivers/gpu/drm/msm/msm_submitqueue.c | 8 +- drivers/iommu/arm-smmu-impl.c | 6 +- drivers/iommu/arm-smmu-qcom.c | 130 +++++++++++- drivers/iommu/arm-smmu.c | 108 +++++----- drivers/iommu/arm-smmu.h | 65 +++++- include/linux/iommu.h | 1 + 24 files changed, 619 insertions(+), 99 deletions(-) -- 2.25.1

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[PATCH] drm/bridge/adv7511: set the bridge type properly
by Laurentiu Palcu 26 Jul '20

26 Jul '20

From: Laurentiu Palcu <laurentiu.palcu(a)nxp.com> After the drm_bridge_connector_init() helper function has been added, the ADV driver has been changed accordingly. However, the 'type' field of the bridge structure was left unset, which makes the helper function always return -EINVAL. Signed-off-by: Laurentiu Palcu <laurentiu.palcu(a)nxp.com> --- Hi, I've hit this while trying to use this helper in the new i.MX8MQ DCSS driver, as suggested by Sam, and I wanted to test it with NWL MIPI_DSI and ADV since support is already in mainline. Thanks, laurentiu drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c index f45cdca9cce5..a0d392c338da 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -1283,6 +1283,7 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id) adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_HPD; adv7511->bridge.of_node = dev->of_node; + adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA; drm_bridge_add(&adv7511->bridge); -- 2.23.0

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[PATCH v1 0/1] drm/bridge: nwl-dsi: Drop DRM_BRIDGE_ATTACH_NO_CONNECTOR check.
by Guido Günther 26 Jul '20

26 Jul '20

We don't create a connector but let panel_bridge handle that so there's no point in rejecting DRM_BRIDGE_ATTACH_NO_CONNECTOR. This was prompted by Sam in https://lore.kernel.org/dri-devel/20200718115734.GA2989793@ravnborg.org/ Signed-off-by: Guido Günther <agx(a)sigxcpu.org> Guido Günther (1): drm/bridge: nwl-dsi: Drop DRM_BRIDGE_ATTACH_NO_CONNECTOR check. drivers/gpu/drm/bridge/nwl-dsi.c | 5 ----- 1 file changed, 5 deletions(-) -- 2.26.2

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[PATCH] drm: panel: simple: Delay HPD checking on boe_nv133fhm_n61 for 15 ms
by Douglas Anderson 26 Jul '20

26 Jul '20

On boe_nv133fhm_n62 (and presumably on boe_nv133fhm_n61) a scope shows a small spike on the HPD line right when you power the panel on. The picture looks something like this: +-------------------------------------- | | | Power ---+ +--- | ++ | +----+| | HPD -----+ +---------------------------+ So right when power is applied there's a little bump in HPD and then there's small spike right before it goes low. The total time of the little bump plus the spike was measured on one panel as being 8 ms long. The total time for the HPD to go high on the same panel was 51.2 ms, though the datasheet only promises it is < 200 ms. When asked about this glitch, BOE indicated that it was expected and persisted until the TCON has been initialized. If this was a real hotpluggable DP panel then this wouldn't matter a whole lot. We'd debounce the HPD signal for a really long time and so the little blip wouldn't hurt. However, this is not a hotpluggable DP panel and the the debouncing logic isn't needed and just shows down the time needed to get the display working. This is why the code in panel_simple_prepare() doesn't do debouncing and just waits for HPD to go high once. Unfortunately if we get unlucky and happen to poll the HPD line right at the spike we can try talking to the panel before it's ready. Let's handle this situation by putting in a 15 ms prepare delay and decreasing the "hpd absent delay" by 15 ms. That means: * If you don't have HPD hooked up at all you've still got the hardcoded 200 ms delay. * If you've got HPD hooked up you will always wait at least 15 ms before checking HPD. The only case where this could be bad is if the panel is sharing a voltage rail with something else in the system and was already turned on long before the panel came up. In such a case we'll be delaying 15 ms for no reason, but it's not a huge delay and I don't see any other good solution to handle that case. Even though the delay was measured as 8 ms, 15 ms was chosen to give a bit of margin. Signed-off-by: Douglas Anderson <dianders(a)chromium.org> --- I don't actually have a device in front of me that is exhibiting these problems. I believe that it is only some devices and some of the time. Still, this patch seems safe and seems likely to fix the issue given the scope shots. drivers/gpu/drm/panel/panel-simple.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 88493538a147..046a06b55800 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1260,7 +1260,21 @@ static const struct panel_desc boe_nv133fhm_n61 = { .height = 165, }, .delay = { - .hpd_absent_delay = 200, + /* + * When power is first given to the panel there's a short + * spike on the HPD line. It was explained that this spike + * was until the TCON data download was complete. On + * one system this was measured at 8 ms. We'll put 15 ms + * in the prepare delay just to be safe and take it away + * from the hpd_absent_delay (which would otherwise be 200 ms) + * to handle this. That means: + * - If HPD isn't hooked up you still have 200 ms delay. + * - If HPD is hooked up we won't try to look at it for the + * first 15 ms. + */ + .prepare = 15, + .hpd_absent_delay = 185, + .unprepare = 500, }, .bus_format = MEDIA_BUS_FMT_RGB888_1X24, -- 2.28.0.rc0.105.gf9edc3c819-goog

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[PATCH] drm/panel: Fix auo, kd101n80-45na horizontal noise on edges of panel
by Jitao Shi 26 Jul '20

26 Jul '20

Fine tune the HBP and HFP to avoid the dot noise on the left and right edges. Signed-off-by: Jitao Shi <jitao.shi(a)mediatek.com> --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 48a164257d18..3edb33e61908 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -615,9 +615,9 @@ static const struct panel_desc boe_tv101wum_nl6_desc = { static const struct drm_display_mode auo_kd101n80_45na_default_mode = { .clock = 157000, .hdisplay = 1200, - .hsync_start = 1200 + 80, - .hsync_end = 1200 + 80 + 24, - .htotal = 1200 + 80 + 24 + 36, + .hsync_start = 1200 + 60, + .hsync_end = 1200 + 60 + 24, + .htotal = 1200 + 60 + 24 + 56, .vdisplay = 1920, .vsync_start = 1920 + 16, .vsync_end = 1920 + 16 + 4, -- 2.25.1

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[PATCH] drm/ttm: fix pipelined gutting for evictions v2
by Christian König 26 Jul '20

26 Jul '20

We can't pipeline that during eviction because the memory needs to be available immediately. v2: fix how we cleanup the BOs resources Signed-off-by: Christian König <christian.koenig(a)amd.com> --- drivers/gpu/drm/ttm/ttm_bo.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index 0768a054a916..469aa93ea317 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c @@ -652,8 +652,12 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, placement.num_busy_placement = 0; bdev->driver->evict_flags(bo, &placement); - if (!placement.num_placement && !placement.num_busy_placement) - return ttm_bo_pipeline_gutting(bo); + if (!placement.num_placement && !placement.num_busy_placement) { + ttm_bo_wait(bo, false, false); + + ttm_bo_cleanup_memtype_use(bo); + return 0; + } evict_mem = bo->mem; evict_mem.mm_node = NULL; -- 2.17.1

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[PATCH v6 0/3] Add LT9611 DSI to HDMI bridge
by Vinod Koul 26 Jul '20

26 Jul '20

Hi, This series adds driver and bindings for Lontium LT9611 bridge chip which takes MIPI DSI as input and HDMI as output. This chip can be found in 96boards RB3 platform [1] commonly called DB845c. [1]: https://www.96boards.org/product/rb3-platform/ Changes in v6: - Drop msm/dsi patch as we need to get more bridges fixed before we add that - Bring back support for DRM_BRIDGE_ATTACH_NO_CONNECTOR not set, now driver supports both - Fix nits found by Sam Changes in v5: - make symbol static, reported by kbuild-bot Changes in v4: - Add msm/dsi patch to create connector and support DRM_BRIDGE_ATTACH_NO_CONNECTOR - Fix comments provided by Sam Changes in v3: - fix kbuild reported error - rebase on v5.8-rc1 Changes in v2: - Add acks by Rob - Fix comments reported by Emil and rename the file to lontium-lt9611.c - Fix comments reported by Laurent on binding and driver - Add HDMI audio support Vinod Koul (3): dt-bindings: vendor-prefixes: Add Lontium vendor prefix dt-bindings: display: bridge: Add documentation for LT9611 drm/bridge: Introduce LT9611 DSI to HDMI bridge .../display/bridge/lontium,lt9611.yaml | 176 +++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + drivers/gpu/drm/bridge/Kconfig | 13 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/lontium-lt9611.c | 1229 +++++++++++++++++ 5 files changed, 1421 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml create mode 100644 drivers/gpu/drm/bridge/lontium-lt9611.c -- 2.26.2

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[PATCH v2 0/5] drm: rockchip: various ports for older VOPs
by Alex Bee 26 Jul '20

26 Jul '20

Hi, this series mainly ports existining functionality to older SoCs - most importantly enables alpha blending for RK3036, RK3066, RK3126 and RK3188. Besides that, it also changes the window type from DRM_PLANE_TYPE_CURSOR to DRM_PLANE_TYPE_OVERLAY for VOPs that have only one (1) overlay window. Regards, Alex Changes in v2: - drop not yet upstreamed dsp_data_swap from RK3188 regs - rephrase most commit messages Alex Bee (5): drm: rockchip: add scaling for RK3036 win1 drm: rockchip: add missing registers for RK3188 drm: rockchip: add alpha support for RK3036, RK3066, RK3126 and RK3188 drm: rockchip: set alpha_en to 0 if it is not used drm: rockchip: use overlay windows as such drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 42 ++++++++++++++++++--- drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 1 + 3 files changed, 38 insertions(+), 6 deletions(-) -- 2.17.1

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dri-devel July 2020