dri-devel January 2021

dri-devel@lists.freedesktop.org

322 participants
737 discussions

[PATCH v2 0/4] Revert "drm/amd/display: Expose new CRC window property" and changes associated with this commit
by Rodrigo Siqueira 13 Jan '21

13 Jan '21

Hi, In the V1, Wayne pointed out two problems: 1. The revert patch included one extra line that does not belong to it; 2. The original patch also had other fixes in the same commit; I removed the extra line from the reverted patch for tackling this issue, and I added one additional patch to this series that includes the other fix requested by Wayne. Thanks Original cover letter: A couple of weeks ago, Daniel highlighted [1] some issue related to a patch entitle "drm/amd/display: Expose new CRC window property". After discussion, we realize that we can revert that patch because we will need to create a debugfs or full UAPI for CRC soon, which will make this code obsolete. We got two other patches related to this same code; for this reason, this patchset reverts all changes associated with that specific commit. Rodrigo Siqueira (3): Revert "drm/amd/display: Fix unused variable warning" Revert "drm/amdgpu/disply: fix documentation warnings in display manager" Revert "drm/amd/display: Expose new CRC window property" Wayne Lin (1): drm/amd/display: Fix to be able to stop crc calculation .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 142 ++---------------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 38 ----- .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 54 +------ .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h | 5 +- 4 files changed, 11 insertions(+), 228 deletions(-) -- 2.25.1

3 6

[PATCH v3] drm/sun4i: de2: Reimplement plane z position setting logic
by Jernej Skrabec 13 Jan '21

13 Jan '21

From: Roman Stratiienko <roman.stratiienko(a)globallogic.com> To set blending channel order register software needs to know state and position of each channel, which impossible at plane commit stage. Move this procedure to atomic_flush stage, where all necessary information is available. Fixes: f88c5ee77496 ("drm/sun4i: Implement zpos for DE2") Fixes: d8b3f454dab4 ("drm/sun4i: sun8i: Avoid clearing blending order at each atomic commit") Signed-off-by: Roman Stratiienko <roman.stratiienko(a)globallogic.com> [rebased, addressed comments] Signed-off-by: Jernej Skrabec <jernej.skrabec(a)siol.net> --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 57 +++++++++++++++++++++----- drivers/gpu/drm/sun4i/sun8i_mixer.h | 5 +++ drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 42 +++---------------- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 42 +++---------------- 4 files changed, 64 insertions(+), 82 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 5b42cf25cc86..d2153b10b08d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -250,6 +250,50 @@ int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format) static void sun8i_mixer_commit(struct sunxi_engine *engine) { + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + int channel_by_zpos[SUN8I_MIXER_MAX_CHANNELS]; + u32 base = sun8i_blender_base(mixer); + u32 route = 0, pipe_ctl = 0; + unsigned int channel_count; + int i, j; + + channel_count = mixer->cfg->vi_num + mixer->cfg->ui_num; + + DRM_DEBUG_DRIVER("Update blender routing\n"); + + for (i = 0; i < SUN8I_MIXER_MAX_CHANNELS; i++) + channel_by_zpos[i] = -1; + + for (i = 0; i < channel_count; i++) { + int zpos = mixer->channel_zpos[i]; + + if (zpos >= 0 && zpos < channel_count) + channel_by_zpos[zpos] = i; + } + + j = 0; + for (i = 0; i < channel_count; i++) { + int ch = channel_by_zpos[i]; + + if (ch >= 0) { + pipe_ctl |= SUN8I_MIXER_BLEND_PIPE_CTL_EN(j); + route |= ch << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(j); + j++; + } + } + + /* + * Set fill color of bottom plane to black. Generally not needed + * except when VI plane is at bottom (zpos = 0) and enabled. + */ + pipe_ctl |= SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0); + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_PIPE_CTL(base), pipe_ctl); + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_ROUTE(base), route); + DRM_DEBUG_DRIVER("Committing changes\n"); regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, @@ -479,23 +523,16 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), SUN8I_MIXER_BLEND_COLOR_BLACK); - /* - * Set fill color of bottom plane to black. Generally not needed - * except when VI plane is at bottom (zpos = 0) and enabled. - */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), SUN8I_MIXER_BLEND_COLOR_BLACK); plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; - for (i = 0; i < plane_cnt; i++) + for (i = 0; i < plane_cnt; i++) { + mixer->channel_zpos[i] = -1; regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(base, i), SUN8I_MIXER_BLEND_MODE_DEF); - - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); + } return 0; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 7576b523fdbb..7b378d6e4dd9 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -12,6 +12,8 @@ #include "sunxi_engine.h" +#define SUN8I_MIXER_MAX_CHANNELS 5 + #define SUN8I_MIXER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) #define SUN8I_MIXER_COORD(x, y) ((y) << 16 | (x)) @@ -179,6 +181,9 @@ struct sun8i_mixer { struct clk *bus_clk; struct clk *mod_clk; + + /* -1 means that layer is disabled */ + int channel_zpos[SUN8I_MIXER_MAX_CHANNELS]; }; static inline struct sun8i_mixer * diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 816ad4ce8996..9f82e7c33e90 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -24,12 +24,10 @@ #include "sun8i_ui_scaler.h" static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, - int overlay, bool enable, unsigned int zpos, - unsigned int old_zpos) + int overlay, bool enable, unsigned int zpos) { - u32 val, bld_base, ch_base; + u32 val, ch_base; - bld_base = sun8i_blender_base(mixer); ch_base = sun8i_channel_base(mixer, channel); DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n", @@ -44,32 +42,7 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); - if (!enable || zpos != old_zpos) { - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), - 0); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), - 0); - } - - if (enable) { - val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - val, val); - - val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), - val); - } + mixer->channel_zpos[channel] = enable ? zpos : -1; } static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, @@ -267,11 +240,9 @@ static void sun8i_ui_layer_atomic_disable(struct drm_plane *plane, struct drm_plane_state *old_state) { struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); - unsigned int old_zpos = old_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; - sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); + sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0); } static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, @@ -279,12 +250,11 @@ static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, { struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); unsigned int zpos = plane->state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; if (!plane->state->visible) { sun8i_ui_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); + layer->overlay, false, 0); return; } @@ -295,7 +265,7 @@ static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, sun8i_ui_layer_update_buffer(mixer, layer->channel, layer->overlay, plane); sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); + true, zpos); } static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = { diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 76393fc976fe..c8c418fb906b 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -18,12 +18,10 @@ #include "sun8i_vi_scaler.h" static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, - int overlay, bool enable, unsigned int zpos, - unsigned int old_zpos) + int overlay, bool enable, unsigned int zpos) { - u32 val, bld_base, ch_base; + u32 val, ch_base; - bld_base = sun8i_blender_base(mixer); ch_base = sun8i_channel_base(mixer, channel); DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n", @@ -38,32 +36,7 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); - if (!enable || zpos != old_zpos) { - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), - 0); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), - 0); - } - - if (enable) { - val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - val, val); - - val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), - val); - } + mixer->channel_zpos[channel] = enable ? zpos : -1; } static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, @@ -370,11 +343,9 @@ static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, struct drm_plane_state *old_state) { struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); - unsigned int old_zpos = old_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); + sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0); } static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, @@ -382,12 +353,11 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, { struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); unsigned int zpos = plane->state->normalized_zpos; - unsigned int old_zpos = old_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; if (!plane->state->visible) { sun8i_vi_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); + layer->overlay, false, 0); return; } @@ -398,7 +368,7 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, sun8i_vi_layer_update_buffer(mixer, layer->channel, layer->overlay, plane); sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); + true, zpos); } static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { -- 2.30.0

3 2

[PATCH] drm/amd/display: Simplify bool comparison
by Yang Li 13 Jan '21

13 Jan '21

Fix the following coccicheck warning: ./drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:1228:9-20: WARNING: Comparison to bool Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Yang Li <abaci-bugfix(a)linux.alibaba.com> --- drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c index 319dec5..3827501 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c @@ -1219,13 +1219,13 @@ static bool CalculatePrefetchSchedule( dml_print("DML: prefetch_bw_equ: %f\n", prefetch_bw_equ); if (prefetch_bw_equ > 0) { - if (GPUVMEnable == true) { + if (GPUVMEnable) { Tvm_equ = dml_max3(*Tno_bw + PDEAndMetaPTEBytesFrame * HostVMInefficiencyFactor / prefetch_bw_equ, Tvm_trips, LineTime / 4); } else { Tvm_equ = LineTime / 4; } - if ((GPUVMEnable == true || myPipe->DCCEnable == true)) { + if ((GPUVMEnable || myPipe->DCCEnable)) { Tr0_equ = dml_max4( (MetaRowByte + PixelPTEBytesPerRow * HostVMInefficiencyFactor) / prefetch_bw_equ, Tr0_trips, -- 1.8.3.1

1 0

[PATCH] drm/vmwgfx: Add 1080p to vmw_kms_connector_builtin list
by Maxim Kochetkov 13 Jan '21

13 Jan '21

It allows to set 1080p mode without vmware/virtulabox tools installed. Signed-off-by: Maxim Kochetkov <fido_max(a)inbox.ru> --- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 312ed0881a99..b47622c6a112 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c @@ -2103,6 +2103,10 @@ static struct drm_display_mode vmw_kms_connector_builtin[] = { { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, + /* 1920x1080@60Hz */ + { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, + 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, + DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1920x1200@60Hz */ { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, -- 2.29.2

1 0

[PATCH 5.11 regression fix] drm/ttm: fix combining __GFP_HIGHMEM and __GFP_DMA32 flag for DMA32 pools
by Hans de Goede 13 Jan '21

13 Jan '21

GFP_TRANSHUGE_LIGHT includes __GFP_HIGHMEM and combining __GFP_HIGHMEM with __GFP_DMA32 is not allowed. So we must not set add GFP_TRANSHUGE_LIGHT to the gfp_flags when allocating pages from a dma32 pool. This fixes the following oops when using a driver which uses DMA32 pools such as the vboxvideo driver: [ 419.852194] ------------[ cut here ]------------ [ 419.852200] kernel BUG at include/linux/gfp.h:457! [ 419.852208] invalid opcode: 0000 [#4] SMP PTI [ 419.852212] CPU: 0 PID: 1522 Comm: Xorg Tainted: G D 5.11.0-rc2+ #187 [ 419.852214] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006 [ 419.852216] RIP: 0010:__alloc_pages_nodemask+0x31a/0x3d0 [ 419.852222] Code: 00 00 8b 05 a8 3b 93 01 85 c0 0f 85 03 fe ff ff 89 e8 44 89 fa c1 e8 03 80 ca 80 83 e0 03 83 f8 01 44 0f 44 fa e9 e9 fd ff ff <0f> 0b 0f 0b e9 79 fd ff ff 31 c0 e9 88 fd ff ff e8 41 ad fb ff 48 [ 419.852224] RSP: 0000:ffffb1164096bc60 EFLAGS: 00010247 [ 419.852227] RAX: 0000000000000000 RBX: 0000000000000000 RCX: 000000000000e8e8 [ 419.852229] RDX: 0000000000000000 RSI: 0000000000000006 RDI: 0000000000192dc6 [ 419.852230] RBP: 0000000000192dc6 R08: 0000000000000000 R09: 0000000000000000 [ 419.852232] R10: 0000000000000017 R11: 00007ff303d0a000 R12: 0000000000000009 [ 419.852233] R13: 0000000000000009 R14: ffff8be4cafe0880 R15: ffff8be5c26fe000 [ 419.852235] FS: 00007ff3046e0f00(0000) GS:ffff8be5dbc00000(0000) knlGS:0000000000000000 [ 419.852237] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 419.852239] CR2: 00007ff303d0a000 CR3: 000000000afd8004 CR4: 00000000000706f0 [ 419.852243] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 419.852244] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 419.852246] Call Trace: [ 419.852252] ttm_pool_alloc+0x2e8/0x5f0 [ttm] [ 419.852261] ttm_tt_populate+0x9f/0xe0 [ttm] [ 419.852267] ttm_bo_vm_fault_reserved+0x236/0x6e0 [ttm] [ 419.852274] ttm_bo_vm_fault+0x4a/0xe0 [ttm] [ 419.852279] __do_fault+0x37/0x110 [ 419.852283] handle_mm_fault+0x1493/0x1990 [ 419.852288] do_user_addr_fault+0x1c7/0x4c0 [ 419.852292] exc_page_fault+0x67/0x250 [ 419.852295] ? asm_exc_page_fault+0x8/0x30 [ 419.852299] asm_exc_page_fault+0x1e/0x30 [ 419.852301] RIP: 0033:0x7ff304f3cdf8 [ 419.852304] Code: 83 c0 04 83 fa 03 7e ea a8 0f 75 ee 83 fa 7f 7e e1 83 c2 80 89 d6 c1 ee 07 8d 4e 01 48 c1 e1 07 48 01 c1 0f 1f 80 00 00 00 00 <0f> 29 00 48 83 e8 80 0f 29 40 90 0f 29 40 a0 0f 29 40 b0 0f 29 40 [ 419.852306] RSP: 002b:00007ffec360e7d8 EFLAGS: 00010206 [ 419.852308] RAX: 00007ff303d0a000 RBX: 00000000000002e2 RCX: 00007ff303d0b300 [ 419.852309] RDX: 00000000000012c0 RSI: 0000000000000025 RDI: 0000000000000000 [ 419.852311] RBP: 0000000000001340 R08: 0000000000000000 R09: 0000000000000000 [ 419.852312] R10: 00007ff303d0a000 R11: 0000000000001340 R12: 00007ff303d0a000 [ 419.852313] R13: 0000556665f1eb30 R14: 0000000000000000 R15: 0000000000000000 [ 419.852318] Modules linked in: xt_CHECKSUM xt_MASQUERADE xt_conntrack ipt_REJECT nf_nat_tftp nf_conntrack_tftp tun bridge stp llc nft_objref nf_conntrack_netbios_ns nf_conntrack_broadcast nft_fib_inet nft_fib_ipv4 nft_fib_ipv6 nft_fib nft_reject_inet nf_reject_ipv4 nf_reject_ipv6 nft_reject nft_ct nft_chain_nat rfkill ip6table_nat ip6table_mangle ip6table_raw ip6table_security iptable_nat nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 iptable_mangle iptable_raw iptable_security ip_set nf_tables vboxsf nfnetlink ip6table_filter ip6_tables iptable_filter sunrpc vfat fat intel_rapl_msr joydev intel_rapl_common intel_powerclamp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_intel8x0 rapl snd_ac97_codec ac97_bus snd_seq snd_seq_device snd_pcm pcspkr snd_timer snd soundcore i2c_piix4 vboxguest ip_tables vboxvideo drm_vram_helper drm_kms_helper cec drm_ttm_helper ttm crc32c_intel serio_raw e1000 drm drm_privacy_screen_helper ata_generic pata_acpi video fuse [ 419.852375] ---[ end trace 511e5346897d9526 ]--- Note in case of the vboxvideo driver the DMA32 pool is allocated through drm_vram_helper_alloc_mm() which is also used by the bochs and hisilicon/hibmc drivers. Cc: Christian König <christian.koenig(a)amd.com> Fixes: d099fc8f540a ("drm/ttm: new TT backend allocation pool v3") Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/gpu/drm/ttm/ttm_pool.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c index 7b2f60616750..8b32fd8c8ccc 100644 --- a/drivers/gpu/drm/ttm/ttm_pool.c +++ b/drivers/gpu/drm/ttm/ttm_pool.c @@ -80,8 +80,9 @@ static struct page *ttm_pool_alloc_page(struct ttm_pool *pool, gfp_t gfp_flags, void *vaddr; if (order) { - gfp_flags |= GFP_TRANSHUGE_LIGHT | __GFP_NORETRY | - __GFP_KSWAPD_RECLAIM; + if (!pool->use_dma32) + gfp_flags |= GFP_TRANSHUGE_LIGHT; + gfp_flags |= __GFP_NORETRY | __GFP_KSWAPD_RECLAIM; gfp_flags &= ~__GFP_MOVABLE; gfp_flags &= ~__GFP_COMP; } -- 2.28.0

3 3

Re: r600/nir: enable soft-fp64 for evengreen class hardware - brake compilation of Mesa git
by Dieter Nützel 13 Jan '21

13 Jan '21

Hello Gert, new year, new luck,...;-) mkdir build cd build meson ../ --strip --buildtype release -Ddri-drivers= -Dplatforms=x11 -Dgallium-drivers=r600,radeonsi,swrast -Dvulkan-drivers=amd -Dgallium-nine=true -Dopencl-spirv=true -Dgallium-opencl=standalone -Dglvnd=true -Dgallium-va=enabled -Dgallium-xvmc=disabled -Dgallium-omx=disabled -Dgallium-xa=disabled [1067/1508] Compiling C object src/gallium/auxiliary/libgallium.a.p/gallivm_lp_bld_format_s3tc.c.o ../src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c: In function ‘lp_build_fetch_rgtc_rgba_aos’: ../src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c:2649:17: warning: ‘green_hi’ may be used uninitialized in this function [-Wmaybe-uninitialized] 2649 | rgba = latc2_to_rgba_aos(gallivm, n, format_desc->format, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2650 | red_lo, red_hi, green_lo, green_hi, i, j); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../src/gallium/auxiliary/gallivm/lp_bld_format_s3tc.c:2649:17: warning: ‘green_lo’ may be used uninitialized in this function [-Wmaybe-uninitialized] [1089/1508] Compiling C object src/gallium/auxiliary/libgallium.a.p/gallivm_lp_bld_nir.c.o In file included from ../src/gallium/auxiliary/gallivm/lp_bld_nir.c:26: ../src/gallium/auxiliary/gallivm/lp_bld_nir.c: In function ‘visit_cf_list.isra’: ../src/gallium/auxiliary/gallivm/lp_bld_nir.h:263:27: warning: ‘result’ may be used uninitialized in this function [-Wmaybe-uninitialized] 263 | LLVMTypeRef arr_type = LLVMArrayType(LLVMTypeOf(values[0]), value_count); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../src/gallium/auxiliary/gallivm/lp_bld_nir.c:175:4: warning: ‘undef’ may be used uninitialized in this function [-Wmaybe-uninitialized] 175 | assign_ssa(bld_base, ssa->index, ssa->num_components == 1 ? vals[0] : lp_nir_array_build_gather_values(bld_base->base.gallivm->builder, vals, ssa->num_components)); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ [1254/1508] Compiling C++ object src/gallium/drivers/r600/libr600.a.p/sb_sb_sched.cpp.o ../src/gallium/drivers/r600/sb/sb_sched.cpp: In member function ‘void r600_sb::literal_tracker::reset()’: ../src/gallium/drivers/r600/sb/sb_sched.cpp:1953:26: warning: ‘void* memset(void*, int, size_t)’ clearing an object of non-trivial type ‘struct r600_sb::literal’; use assignment or value-initialization instead [-Wclass-memaccess] 1953 | memset(lt, 0, sizeof(lt)); | ^ In file included from ../src/gallium/drivers/r600/sb/sb_sched.cpp:35: ../src/gallium/drivers/r600/sb/sb_bc.h:409:8: note: ‘struct r600_sb::literal’ declared here 409 | struct literal { | ^~~~~~~ [1260/1508] Compiling C object src/gallium/drivers/r600/libr600.a.p/r600_state_common.c.o ../src/gallium/drivers/r600/r600_state_common.c: In function ‘r600_create_shader_state’: ../src/gallium/drivers/r600/r600_state_common.c:960:39: warning: ‘sel’ may be used uninitialized in this function [-Wmaybe-uninitialized] 960 | sel->lds_patch_outputs_written_mask = 0; | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~ ../src/gallium/drivers/r600/r600_state_common.c: In function ‘r600_create_tes_state’: ../src/gallium/drivers/r600/r600_state_common.c:947:10: warning: ‘sel’ may be used uninitialized in this function [-Wmaybe-uninitialized] 947 | sel->so = state->stream_output; | ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~ ../src/gallium/drivers/r600/r600_state_common.c:937:36: note: ‘sel’ was declared here 937 | struct r600_pipe_shader_selector *sel; | ^~~ ../src/gallium/drivers/r600/r600_state_common.c: In function ‘r600_create_ps_state’: ../src/gallium/drivers/r600/r600_state_common.c:947:10: warning: ‘sel’ may be used uninitialized in this function [-Wmaybe-uninitialized] 947 | sel->so = state->stream_output; | ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~ ../src/gallium/drivers/r600/r600_state_common.c:937:36: note: ‘sel’ was declared here 937 | struct r600_pipe_shader_selector *sel; | ^~~ ../src/gallium/drivers/r600/r600_state_common.c: In function ‘r600_create_gs_state’: ../src/gallium/drivers/r600/r600_state_common.c:951:23: warning: ‘sel’ may be used uninitialized in this function [-Wmaybe-uninitialized] 951 | sel->gs_output_prim = | ~~~~~~~~~~~~~~~~~~~~^ 952 | sel->info.properties[TGSI_PROPERTY_GS_OUTPUT_PRIM]; | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ../src/gallium/drivers/r600/r600_state_common.c:937:36: note: ‘sel’ was declared here 937 | struct r600_pipe_shader_selector *sel; | ^~~ [1318/1508] Compiling C++ object src/gallium/drivers/r600/libr600.a.p/sfn_sfn_nir_lower_64bit.cpp.o FAILED: src/gallium/drivers/r600/libr600.a.p/sfn_sfn_nir_lower_64bit.cpp.o ccache c++ -Isrc/gallium/drivers/r600/libr600.a.p -Isrc/gallium/drivers/r600 -I../src/gallium/drivers/r600 -Isrc -I../src -Isrc/mapi -I../src/mapi -Isrc/mesa -I../src/mesa -Iinclude -I../include -Isrc/compiler -I../src/compiler -I../src/gallium/include -Isrc/gallium/auxiliary -I../src/gallium/auxiliary -Isrc/amd/common -I../src/amd/common -Isrc/gallium/drivers -I../src/gallium/drivers -Isrc/compiler/nir -I../src/compiler/nir -Isrc/util -I../src/util -I/usr/include/libdrm -fvisibility=hidden -fdiagnostics-color=always -DNDEBUG -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wnon-virtual-dtor -std=c++14 -O3 -ffunction-sections -fdata-sections '-DPACKAGE_VERSION="21.0.0-devel"' '-DPACKAGE_BUGREPORT="https://gitlab.freedesktop.org/mesa/mesa/-/issues"' -DUSE_ELF_TLS -DHAVE_ST_VDPAU -DENABLE_ST_OMX_BELLAGIO=0 -DENABLE_ST_OMX_TIZONIA=0 -DHAVE_X11_PLATFORM -DHAVE_XCB_PLATFORM -DGLX_INDIRECT_RENDERING -DGLX_DIRECT_RENDERING -DGLX_USE_DRM -DHAVE_DRM_PLATFORM -DENABLE_SHADER_CACHE -DHAVE___BUILTIN_BSWAP32 -DHAVE___BUILTIN_BSWAP64 -DHAVE___BUILTIN_CLZ -DHAVE___BUILTIN_CLZLL -DHAVE___BUILTIN_CTZ -DHAVE___BUILTIN_EXPECT -DHAVE___BUILTIN_FFS -DHAVE___BUILTIN_FFSLL -DHAVE___BUILTIN_POPCOUNT -DHAVE___BUILTIN_POPCOUNTLL -DHAVE___BUILTIN_UNREACHABLE -DHAVE___BUILTIN_TYPES_COMPATIBLE_P -DHAVE_FUNC_ATTRIBUTE_CONST -DHAVE_FUNC_ATTRIBUTE_FLATTEN -DHAVE_FUNC_ATTRIBUTE_MALLOC -DHAVE_FUNC_ATTRIBUTE_PURE -DHAVE_FUNC_ATTRIBUTE_UNUSED -DHAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT -DHAVE_FUNC_ATTRIBUTE_WEAK -DHAVE_FUNC_ATTRIBUTE_FORMAT -DHAVE_FUNC_ATTRIBUTE_PACKED -DHAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL -DHAVE_FUNC_ATTRIBUTE_ALIAS -DHAVE_FUNC_ATTRIBUTE_NORETURN -DHAVE_FUNC_ATTRIBUTE_VISIBILITY -DHAVE_UINT128 -DUSE_SSE41 -DUSE_GCC_ATOMIC_BUILTINS -DUSE_X86_64_ASM -DMAJOR_IN_SYSMACROS -DHAVE_LINUX_FUTEX_H -DHAVE_ENDIAN_H -DHAVE_DLFCN_H -DHAVE_EXECINFO_H -DHAVE_SYS_SHM_H -DHAVE_CET_H -DHAVE_STRTOF -DHAVE_MKOSTEMP -DHAVE_TIMESPEC_GET -DHAVE_MEMFD_CREATE -DHAVE_RANDOM_R -DHAVE_FLOCK -DHAVE_STRTOK_R -DHAVE_GETRANDOM -DHAVE_PROGRAM_INVOCATION_NAME -DHAVE_POSIX_MEMALIGN -DHAVE_DIRENT_D_TYPE -DHAVE_STRTOD_L -DHAVE_DLADDR -DHAVE_DL_ITERATE_PHDR -DHAVE_ZLIB -DHAVE_ZSTD -DHAVE_PTHREAD -DHAVE_PTHREAD_SETAFFINITY -DHAVE_LIBDRM -DLLVM_AVAILABLE '-DMESA_LLVM_VERSION_STRING="12.0.0"' -DLLVM_IS_SHARED=1 -DUSE_LIBGLVND=1 -DHAVE_LIBUNWIND -DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS -DHAVE_LIBSENSORS=1 -Werror=return-type -Werror=empty-body -Wno-non-virtual-dtor -Wno-missing-field-initializers -Wno-format-truncation -fno-math-errno -fno-trapping-math -flifetime-dse=1 -Werror=format -Wformat-security -fPIC -pthread -D__STDC_LIMIT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_CONSTANT_MACROS -D_GNU_SOURCE -MD -MQ src/gallium/drivers/r600/libr600.a.p/sfn_sfn_nir_lower_64bit.cpp.o -MF src/gallium/drivers/r600/libr600.a.p/sfn_sfn_nir_lower_64bit.cpp.o.d -o src/gallium/drivers/r600/libr600.a.p/sfn_sfn_nir_lower_64bit.cpp.o -c ../src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp ../src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp: In member function ‘nir_ssa_def* r600::LowerSplit64BitVar::split_double_store_deref(nir_intrinsic_instr*)’: ../src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp:207:1: error: control reaches end of non-void function [-Werror=return-type] 207 | } | ^ ../src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp: In member function ‘nir_ssa_def* r600::LowerSplit64BitVar::split_double_load_deref(nir_intrinsic_instr*)’: ../src/gallium/drivers/r600/sfn/sfn_nir_lower_64bit.cpp:220:27: error: control reaches end of non-void function [-Werror=return-type] 220 | m_old_stores.push_back(&intr->instr); | ^~~~~~~~~~~~ cc1plus: some warnings being treated as errors [1327/1508] Compiling C++ object src/gallium/dri...r600/libr600.a.p/sfn_sfn_nir_lower_tess_io.cpp.o ninja: build stopped: subcommand failed. 2332.881u 143.645s 5:45.31 717.1% 0+0k 244272+368600io 250pf+0w Maybe I can do some testing with my Tursk for you. Our son 'need' my Polaris 20 for his new own Ryzen 5 3600...;-) Greetings, Dieter

2 1

[PATCH v9 0/4] drm/panfrost: Add support for mt8183 GPU
by Nicolas Boichat 13 Jan '21

13 Jan '21

Hi! Follow-up on the v5 [1], things have gotten significantly better in the last 9 months, thanks to the efforts on Bifrost support by the Collabora team (and probably others I'm not aware of). I've been testing this series on a MT8183/kukui device, with a chromeos-5.10 kernel [2], and got basic Chromium OS UI up with mesa 20.3.2 (lots of artifacts though). devfreq is currently not supported, as we'll need: - Clock core support for switching the GPU core clock (see 2/4). - Platform-specific handling of the 2-regulator (see 3/4). Since the latter is easy to detect, patch 3/4 just disables devfreq if the more than one regulator is specified in the compatible matching table. [1] https://patchwork.kernel.org/project/linux-mediatek/cover/20200306041345.25… [2] https://crrev.com/c/2608070 Changes in v9: - Explain why devfreq needs to be disabled for GPUs with >1 regulators. Changes in v8: - Use DRM_DEV_INFO instead of ERROR Changes in v7: - Fix GPU ID in commit message - Fix GPU ID in commit message Changes in v6: - Rebased, actually tested with recent mesa driver. Nicolas Boichat (4): dt-bindings: gpu: mali-bifrost: Add Mediatek MT8183 arm64: dts: mt8183: Add node for the Mali GPU drm/panfrost: devfreq: Disable devfreq when num_supplies > 1 drm/panfrost: Add mt8183-mali compatible string .../bindings/gpu/arm,mali-bifrost.yaml | 25 +++++ arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 6 + .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 6 + arch/arm64/boot/dts/mediatek/mt8183.dtsi | 105 ++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_devfreq.c | 9 ++ drivers/gpu/drm/panfrost/panfrost_drv.c | 10 ++ 6 files changed, 161 insertions(+) -- 2.29.2.729.g45daf8777d-goog

2 5

[PATCH] drm: Improve the output_poll_changed description
by ZhiJie.Zhang 13 Jan '21

13 Jan '21

From: zhangzhijie <zhangzhijie(a)loongson.cn> codeview the implementation of few Drivers. this callback was used by drm_kms_helper_hotplug_event() Signed-off-by: zhangzhijie <zhangzhijie(a)loongson.cn> --- include/drm/drm_mode_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index ab424ddd7665..e01c4d0f07d1 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -104,7 +104,7 @@ struct drm_mode_config_funcs { * changes. * * Drivers implementing fbdev emulation with the helpers can call - * drm_fb_helper_hotplug_changed from this hook to inform the fbdev + * drm_kms_helper_hotplug_event() from this hook to inform the fbdev * helper of output changes. * * FIXME: -- 2.29.2

3 2

[PATCH] drm: amdgpu: pm: Mark vangogh_clk_dpm_is_enabled() as static
by Souptick Joarder 13 Jan '21

13 Jan '21

kernel test robot throws below warnings -> drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:594:6: warning: no previous prototype for 'vangogh_clk_dpm_is_enabled' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.c:594:6: warning: no previous prototype for function 'vangogh_clk_dpm_is_enabled' [-Wmissing-prototypes] Mark vangogh_clk_dpm_is_enabled() as static. Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Souptick Joarder <jrdr.linux(a)gmail.com> --- drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c index 75ddcad..3ffe56e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c @@ -610,7 +610,7 @@ static int vangogh_get_profiling_clk_mask(struct smu_context *smu, return 0; } -bool vangogh_clk_dpm_is_enabled(struct smu_context *smu, +static bool vangogh_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type) { enum smu_feature_mask feature_id = 0; -- 1.9.1

3 5

[PATCH V5 0/3] Decouple config data for configfs
by Sumera Priyadarsini 12 Jan '21

12 Jan '21

This patchset aims to lay down some prep work before configfs can be implemented for the vkms driver. The first patch in the series adds a new type vkms_config to track device configuration. The second and third patch add module testing support for writeback operations. The first patch is developed by Daniel Vetter. Daniel Vetter (1): drm/vkms: Add vkms_config type Sumera Priyadarsini (3): drm/vkms: Add vkms_config type drm/vkms: Add support for writeback module drm/vkms: Add information about module options Documentation/gpu/vkms.rst | 12 ++++++++ drivers/gpu/drm/vkms/vkms_drv.c | 45 ++++++++++++++++++++++++------ drivers/gpu/drm/vkms/vkms_drv.h | 13 +++++++-- drivers/gpu/drm/vkms/vkms_output.c | 13 +++++---- 4 files changed, 68 insertions(+), 15 deletions(-) --- Changes in v2: - add Co-developed-by tag Changes in v3: - correct usage of Co-developed by tag(Melissa) - add enable_writeback_feature(Melissa) - modify commit message(Melissa) Changes in v4: - split previous patch into patchset(Melissa) - fix checkpatch issue(Melissa) - update docs(Daniel) Changes in v5: - modify docs patch(Daniel) -- 2.25.1

2 7

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dri-devel January 2021