dri-devel December 2021

dri-devel@lists.freedesktop.org

310 participants
720 discussions

[RFC PATCH 0/3] Add support modifiers for drivers whose planes only support linear layout
by Tomohito Esaki 17 Jan '22

17 Jan '22

Some drivers whose planes only support linear layout fb do not support format modifiers. These drivers should support modifiers, however the DRM core should handle this rather than open-coding in every driver. In this patch series, these drivers expose format modifiers based on the following suggestion[1]. On Thu, Nov 18, 2021 at 01:02:11PM +0000, Daniel Stone wrote: > I think the best way forward here is: > - add a new mode_config.cannot_support_modifiers flag, and enable > this in radeon (plus any other drivers in the same boat) > - change drm_universal_plane_init() to advertise the LINEAR modifier > when NULL is passed as the modifier list (including installing a > default .format_mod_supported hook) > - remove the mode_config.allow_fb_modifiers hook and always > advertise modifier support, unless > mode_config.cannot_support_modifiers is set [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20190509054518… Tomohito Esaki (3): drm: add support modifiers for drivers whose planes only support linear layout drm: set fb_modifiers_not_supported flag in legacy drivers drm: replace allow_fb_modifiers with fb_modifiers_not_supported drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +-- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 2 + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 + drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 1 + drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 + drivers/gpu/drm/drm_framebuffer.c | 6 +-- drivers/gpu/drm/drm_ioctl.c | 2 +- drivers/gpu/drm/drm_plane.c | 41 +++++++++++-------- drivers/gpu/drm/nouveau/nouveau_display.c | 6 ++- drivers/gpu/drm/radeon/radeon_display.c | 2 + .../gpu/drm/selftests/test-drm_framebuffer.c | 1 - include/drm/drm_mode_config.h | 18 +++----- include/drm/drm_plane.h | 3 ++ 13 files changed, 54 insertions(+), 38 deletions(-) -- 2.17.1

4 7

[PATCH 1/2] drm/i2c/tda998x: Switch to atomic operations
by Fabio Estevam 16 Jan '22

16 Jan '22

Use the atomic version of the enable/disable operations to continue the transition to the atomic API, started with the introduction of .atomic_get_input_bus_fmts(). This will be needed to access the mode from the atomic state. Based on Laurent's commit a6ea7d268a63("drm: bridge: ti-sn65dsi83: Switch to atomic operations"). Tested on a imx6sx-udoo-neo board. Suggested-by: Marek Vasut <marex(a)denx.de> Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- drivers/gpu/drm/i2c/tda998x_drv.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index b7ec6c374fbd..adaa985af87e 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -1395,7 +1395,8 @@ static enum drm_mode_status tda998x_bridge_mode_valid(struct drm_bridge *bridge, return MODE_OK; } -static void tda998x_bridge_enable(struct drm_bridge *bridge) +static void tda998x_bridge_atomic_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge); @@ -1413,7 +1414,8 @@ static void tda998x_bridge_enable(struct drm_bridge *bridge) } } -static void tda998x_bridge_disable(struct drm_bridge *bridge) +static void tda998x_bridge_atomic_disable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct tda998x_priv *priv = bridge_to_tda998x_priv(bridge); @@ -1680,9 +1682,9 @@ static const struct drm_bridge_funcs tda998x_bridge_funcs = { .attach = tda998x_bridge_attach, .detach = tda998x_bridge_detach, .mode_valid = tda998x_bridge_mode_valid, - .disable = tda998x_bridge_disable, + .atomic_disable = tda998x_bridge_atomic_disable, .mode_set = tda998x_bridge_mode_set, - .enable = tda998x_bridge_enable, + .atomic_enable = tda998x_bridge_atomic_enable, }; /* I2C driver functions */ -- 2.25.1

3 10

[PATCH 0/5] drm/exynos: Use platform_get_irq*() variants to fetch IRQ's
by Lad Prabhakar 15 Jan '22

15 Jan '22

Hi All, This patch series aims to drop using platform_get_resource() for IRQ types in preparation for removal of static setup of IRQ resource from DT core code. Dropping usage of platform_get_resource() was agreed based on the discussion [0]. [0] https://patchwork.kernel.org/project/linux-renesas-soc/ patch/20211209001056.29774-1-prabhakar.mahadev-lad.rj(a)bp.renesas.com/ Cheers, Prabhakar Lad Prabhakar (5): drm/exynos/exynos7_drm_decon: Use platform_get_irq_byname() to get the interrupt drm/exynos: mixer: Use platform_get_irq() to get the interrupt drm/exynos/exynos_drm_fimd: Use platform_get_irq_byname() to get the interrupt drm/exynos/fimc: Use platform_get_irq() to get the interrupt drm/exynos: gsc: Use platform_get_irq() to get the interrupt drivers/gpu/drm/exynos/exynos7_drm_decon.c | 12 +++--------- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 13 +++++-------- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 13 ++++--------- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 10 +++------- drivers/gpu/drm/exynos/exynos_mixer.c | 14 ++++++-------- 5 files changed, 21 insertions(+), 41 deletions(-) -- 2.17.1

3 8

[PATCH v2 0/3] clk: Implement a clock request API
by Maxime Ripard 14 Jan '22

14 Jan '22

Hi, This is a follow-up of the discussion here: https://lore.kernel.org/linux-clk/20210319150355.xzw7ikwdaga2dwhv@gilmour/ This implements a mechanism to raise and lower clock rates based on consumer workloads, with an example of such an implementation for the RaspberryPi4 HDMI controller. There's a couple of things worth discussing: - The name is in conflict with clk_request_rate, and even though it feels like the right name to me, we should probably avoid any confusion - The code so far implements a policy of always going for the lowest rate possible. While we don't have an use-case for something else, this should maybe be made more flexible? Let me know what you think Maxime Changes from v1: - Return NULL in clk_request_start if clk pointer is NULL - Test for clk_req pointer in clk_request_done - Add another user in vc4 - Rebased on top of v5.15-rc1 Dom Cobley (1): drm/vc4: hvs: Convert to the new clock request API Maxime Ripard (2): clk: Introduce a clock request API drm/vc4: hdmi: Convert to the new clock request API drivers/clk/clk.c | 126 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/vc4/vc4_hdmi.c | 15 ++-- drivers/gpu/drm/vc4/vc4_hdmi.h | 3 + drivers/gpu/drm/vc4/vc4_kms.c | 5 +- include/linux/clk.h | 4 ++ 5 files changed, 146 insertions(+), 7 deletions(-) -- 2.31.1

3 13

[PATCH] video: fbdev: s3c-fb: remove redundant initialization of pointer bufs
by Colin Ian King 14 Jan '22

14 Jan '22

Pointer bufs is being initialized with a value that is never read, it is being re-assigned with a different value later on. The assignment is redundant and can be removed. Cleans up clang-scan warning: drivers/video/fbdev/s3c-fb.c:492:16: warning: Value stored to 'buf' during its initialization is never read [deadcode.DeadStores] void __iomem *buf = regs; Signed-off-by: Colin Ian King <colin.i.king(a)gmail.com> --- drivers/video/fbdev/s3c-fb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/fbdev/s3c-fb.c b/drivers/video/fbdev/s3c-fb.c index 3b134e1bbc38..68408c499627 100644 --- a/drivers/video/fbdev/s3c-fb.c +++ b/drivers/video/fbdev/s3c-fb.c @@ -489,7 +489,7 @@ static int s3c_fb_set_par(struct fb_info *info) struct s3c_fb_win *win = info->par; struct s3c_fb *sfb = win->parent; void __iomem *regs = sfb->regs; - void __iomem *buf = regs; + void __iomem *buf; int win_no = win->index; u32 alpha = 0; u32 data; -- 2.33.1

2 1

[PATCH] drm/bridge: dw-mipi-dsi: Switch to atomic operations
by Jagan Teki 13 Jan '22

13 Jan '22

Replace atomic version of the enable/disable operations to continue the transition to the atomic API. Also added default drm atomic operations for duplicate, destroy and reset state API's in order to have smooth transition on atomic API's. Tested on Engicam i.Core STM32MP1 SoM. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c index e44e18a0112a..ff0db96dfcd5 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c @@ -871,7 +871,8 @@ static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi) dsi_write(dsi, DSI_INT_MSK1, 0); } -static void dw_mipi_dsi_bridge_post_disable(struct drm_bridge *bridge) +static void dw_mipi_dsi_bridge_post_atomic_disable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; @@ -978,7 +979,8 @@ static void dw_mipi_dsi_bridge_mode_set(struct drm_bridge *bridge, dw_mipi_dsi_mode_set(dsi->slave, adjusted_mode); } -static void dw_mipi_dsi_bridge_enable(struct drm_bridge *bridge) +static void dw_mipi_dsi_bridge_atomic_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); @@ -1032,11 +1034,14 @@ static int dw_mipi_dsi_bridge_attach(struct drm_bridge *bridge, } static const struct drm_bridge_funcs dw_mipi_dsi_bridge_funcs = { - .mode_set = dw_mipi_dsi_bridge_mode_set, - .enable = dw_mipi_dsi_bridge_enable, - .post_disable = dw_mipi_dsi_bridge_post_disable, - .mode_valid = dw_mipi_dsi_bridge_mode_valid, - .attach = dw_mipi_dsi_bridge_attach, + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, + .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_enable = dw_mipi_dsi_bridge_atomic_enable, + .atomic_post_disable = dw_mipi_dsi_bridge_post_atomic_disable, + .mode_set = dw_mipi_dsi_bridge_mode_set, + .mode_valid = dw_mipi_dsi_bridge_mode_valid, + .attach = dw_mipi_dsi_bridge_attach, }; #ifdef CONFIG_DEBUG_FS -- 2.25.1

2 2

[PATCH v2 0/7] agp: Various minor fixes
by Thomas Zimmermann 13 Jan '22

13 Jan '22

Fix a number of compiler warnings in the AGP drivers. No functional changes. v2: * ati-agp: free page in error branch (Helge) * nvidia-agp: Mark temp as __maybe_unused (Helge) Thomas Zimmermann (7): agp: Remove trailing whitespaces agp: Include "compat_ioctl.h" where necessary agp: Documentation fixes agp/ati: Return error from ati_create_page_map() agp/nvidia: Declare value returned by readl() as unused agp/sworks: Remove unused variable 'current_size' agp/via: Remove unused variable 'current_size' drivers/char/agp/ati-agp.c | 8 ++++++-- drivers/char/agp/backend.c | 2 ++ drivers/char/agp/frontend.c | 4 +++- drivers/char/agp/nvidia-agp.c | 3 ++- drivers/char/agp/sworks-agp.c | 5 +---- drivers/char/agp/via-agp.c | 3 --- 6 files changed, 14 insertions(+), 11 deletions(-) base-commit: 6a8f90ec433e2f5de5fc16d7a4839771b7027cc0 -- 2.34.0

2 9

[PATCH 0/5] drm/stm: new features to display controller
by Yannick Fertre 13 Jan '22

13 Jan '22

Hello, List of new feature: * Replace the legacy register access by regmap API. * Support of YCbCr 422 output * Update layer shadow registers per plane. * Support of YCbCr output (planar, semiplanar & coplanar) These featues are available only with last hardware version of ltdc (0x401000) link to patch"drm/stm: ltdc: support of new hardware version" (https://patchwork.freedesktop.org/patch/465207). Yannick Fertre (5): drm/stm: ltdc: switch to regmap drm/stm: ltdc: add YCbCr 422 output support drm/stm: ltdc: add per plane update support drm/stm: ltdc: add support of flexible pixel formats drm/stm: ltdc: add support of ycbcr pixel formats drivers/gpu/drm/stm/ltdc.c | 639 +++++++++++++++++++++++++++++-------- drivers/gpu/drm/stm/ltdc.h | 9 +- 2 files changed, 518 insertions(+), 130 deletions(-) -- 2.17.1

2 1

[PATCH v3 0/6] Add missing format_mod_supported functions
by José Expósito 13 Jan '22

13 Jan '22

Hi all, This patchset supersedes [1]. Now the title is a bit misleading, but I left it this way to (hopefully) facilitate the maintainers' work. A little context: Originally, I sent a patch adding modifiers to the VKMS driver and Simon Ser kindly reviewed it and pointed out that "format_mod_supported" was missing [2]. I asked if the docs were incorrect or if it was a bug in "create_in_format_blob". In the first version of this series, Simon Ser and Dmitry Baryshkov agreed [1] that the code should behave as documented and "create_in_format_blob" should be changed. The second version implemented the required changes and drops the "format_mod_supported" in the drivers that can use the default implementation. [3] This third version fixes a compiler warning and adds the reviewed by tags. Thanks, José Expósito [1] https://lore.kernel.org/dri-devel/CAA8EJpqJ-tWmb5Ba6XSK59toCtLb3nRRmVH8da4U… [2] https://lore.kernel.org/dri-devel/20211216170532.GA16349@elementary/T/ [3] https://lore.kernel.org/dri-devel/20211222090552.25972-1-jose.exposito89@gm… José Expósito (6): drm/plane: Make format_mod_supported truly optional drm/plane: Fix typo in format_mod_supported documentation drm/simple-kms: Drop format_mod_supported function drm/i915/display: Drop format_mod_supported function drm: mxsfb: Drop format_mod_supported function drm/stm: ltdc: Drop format_mod_supported function drivers/gpu/drm/drm_plane.c | 9 ++------- drivers/gpu/drm/drm_simple_kms_helper.c | 8 -------- drivers/gpu/drm/i915/display/intel_cursor.c | 8 -------- drivers/gpu/drm/mxsfb/mxsfb_kms.c | 8 -------- drivers/gpu/drm/stm/ltdc.c | 11 ----------- include/drm/drm_plane.h | 2 +- 6 files changed, 3 insertions(+), 43 deletions(-) -- 2.25.1

3 10

[PATCH 4/5] drm/stm: ltdc: add support of flexible pixel formats
by Yannick Fertre 13 Jan '22

13 Jan '22

This feature allows the generation of any RGB pixel format. The list of supported formats is no longer linked to the register LXPFCR_PF, that the reason why a list of drm formats is defined for each display controller version. Signed-off-by: Yannick Fertre <yannick.fertre(a)foss.st.com> --- drivers/gpu/drm/stm/ltdc.c | 196 ++++++++++++++++++++++++++----------- drivers/gpu/drm/stm/ltdc.h | 5 +- 2 files changed, 145 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 862d43fe3087..4d249bc99894 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -186,6 +186,7 @@ #define LXWVPCR_WVSPPOS GENMASK(26, 16) /* Window Vertical StoP POSition */ #define LXPFCR_PF GENMASK(2, 0) /* Pixel Format */ +#define PF_FLEXIBLE 0x7 /* Flexible Pixel Format selected */ #define LXCACR_CONSTA GENMASK(7, 0) /* CONSTant Alpha */ @@ -216,17 +217,18 @@ enum ltdc_pix_fmt { /* RGB formats */ PF_ARGB8888, /* ARGB [32 bits] */ PF_RGBA8888, /* RGBA [32 bits] */ + PF_ABGR8888, /* ABGR [32 bits] */ + PF_BGRA8888, /* BGRA [32 bits] */ PF_RGB888, /* RGB [24 bits] */ + PF_BGR888, /* BGR [24 bits] */ PF_RGB565, /* RGB [16 bits] */ + PF_BGR565, /* BGR [16 bits] */ PF_ARGB1555, /* ARGB A:1 bit RGB:15 bits [16 bits] */ PF_ARGB4444, /* ARGB A:4 bits R/G/B: 4 bits each [16 bits] */ /* Indexed formats */ PF_L8, /* Indexed 8 bits [8 bits] */ PF_AL44, /* Alpha:4 bits + indexed 4 bits [8 bits] */ - PF_AL88, /* Alpha:8 bits + indexed 8 bits [16 bits] */ - PF_ABGR8888, /* ABGR [32 bits] */ - PF_BGRA8888, /* BGRA [32 bits] */ - PF_BGR565 /* RGB [16 bits] */ + PF_AL88 /* Alpha:8 bits + indexed 8 bits [16 bits] */ }; /* The index gives the encoding of the pixel format for an HW version */ @@ -260,7 +262,53 @@ static const enum ltdc_pix_fmt ltdc_pix_fmt_a2[NB_PF] = { PF_RGB565, /* 0x04 */ PF_BGR565, /* 0x05 */ PF_RGB888, /* 0x06 */ - PF_ARGB1555 /* 0x07 */ + PF_NONE /* 0x07 */ +}; + +static const u32 ltdc_drm_fmt_a0[] = { + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, + DRM_FORMAT_RGB565, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_XRGB4444, + DRM_FORMAT_C8 +}; + +static const u32 ltdc_drm_fmt_a1[] = { + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB888, + DRM_FORMAT_RGB565, + DRM_FORMAT_RGBA8888, + DRM_FORMAT_RGBX8888, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_XRGB4444, + DRM_FORMAT_C8 +}; + +static const u32 ltdc_drm_fmt_a2[] = { + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_RGBA8888, + DRM_FORMAT_RGBX8888, + DRM_FORMAT_BGRA8888, + DRM_FORMAT_BGRX8888, + DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, + DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_XRGB4444, + DRM_FORMAT_C8 }; /* Layer register offsets */ @@ -386,16 +434,30 @@ static inline enum ltdc_pix_fmt to_ltdc_pixelformat(u32 drm_fmt) case DRM_FORMAT_XRGB8888: pf = PF_ARGB8888; break; + case DRM_FORMAT_ABGR8888: + case DRM_FORMAT_XBGR8888: + pf = PF_ABGR8888; + break; case DRM_FORMAT_RGBA8888: case DRM_FORMAT_RGBX8888: pf = PF_RGBA8888; break; + case DRM_FORMAT_BGRA8888: + case DRM_FORMAT_BGRX8888: + pf = PF_BGRA8888; + break; case DRM_FORMAT_RGB888: pf = PF_RGB888; break; + case DRM_FORMAT_BGR888: + pf = PF_BGR888; + break; case DRM_FORMAT_RGB565: pf = PF_RGB565; break; + case DRM_FORMAT_BGR565: + pf = PF_BGR565; + break; case DRM_FORMAT_ARGB1555: case DRM_FORMAT_XRGB1555: pf = PF_ARGB1555; @@ -416,49 +478,66 @@ static inline enum ltdc_pix_fmt to_ltdc_pixelformat(u32 drm_fmt) return pf; } -static inline u32 to_drm_pixelformat(enum ltdc_pix_fmt pf) +static inline u32 ltdc_set_flexible_pixel_format(struct drm_plane *plane, enum ltdc_pix_fmt pix_fmt) { - switch (pf) { - case PF_ARGB8888: - return DRM_FORMAT_ARGB8888; - case PF_RGBA8888: - return DRM_FORMAT_RGBA8888; - case PF_RGB888: - return DRM_FORMAT_RGB888; - case PF_RGB565: - return DRM_FORMAT_RGB565; + struct ltdc_device *ldev = plane_to_ltdc(plane); + u32 lofs = plane->index * LAY_OFS, ret = PF_FLEXIBLE; + int psize, alen, apos, rlen, rpos, glen, gpos, blen, bpos; + + switch (pix_fmt) { + case PF_BGR888: + psize = 3; + alen = 0; apos = 0; rlen = 8; rpos = 0; + glen = 8; gpos = 8; blen = 8; bpos = 16; + break; case PF_ARGB1555: - return DRM_FORMAT_ARGB1555; + psize = 2; + alen = 1; apos = 15; rlen = 5; rpos = 10; + glen = 5; gpos = 5; blen = 5; bpos = 0; + break; case PF_ARGB4444: - return DRM_FORMAT_ARGB4444; + psize = 2; + alen = 4; apos = 12; rlen = 4; rpos = 8; + glen = 4; gpos = 4; blen = 4; bpos = 0; + break; case PF_L8: - return DRM_FORMAT_C8; - case PF_AL44: /* No DRM support */ - case PF_AL88: /* No DRM support */ - case PF_NONE: + psize = 1; + alen = 0; apos = 0; rlen = 8; rpos = 0; + glen = 8; gpos = 0; blen = 8; bpos = 0; + break; + case PF_AL44: + psize = 1; + alen = 4; apos = 4; rlen = 4; rpos = 0; + glen = 4; gpos = 0; blen = 4; bpos = 0; + break; + case PF_AL88: + psize = 2; + alen = 8; apos = 8; rlen = 8; rpos = 0; + glen = 8; gpos = 0; blen = 8; bpos = 0; + break; default: - return 0; + ret = NB_PF; /* error case, trace msg is handled by the caller */ + break; + } + + if (ret == PF_FLEXIBLE) { + regmap_write(ldev->regmap, LTDC_L1FPF0R + lofs, + (rlen << 14) + (rpos << 9) + (alen << 5) + apos); + + regmap_write(ldev->regmap, LTDC_L1FPF1R + lofs, + (psize << 18) + (blen << 14) + (bpos << 9) + (glen << 5) + gpos); } + + return ret; } -static inline u32 get_pixelformat_without_alpha(u32 drm) +/* + * All non-alpha color formats derived from native alpha color formats are + * either characterized by a FourCC format code + */ +static inline u32 is_xrgb(u32 drm) { - switch (drm) { - case DRM_FORMAT_ARGB4444: - return DRM_FORMAT_XRGB4444; - case DRM_FORMAT_RGBA4444: - return DRM_FORMAT_RGBX4444; - case DRM_FORMAT_ARGB1555: - return DRM_FORMAT_XRGB1555; - case DRM_FORMAT_RGBA5551: - return DRM_FORMAT_RGBX5551; - case DRM_FORMAT_ARGB8888: - return DRM_FORMAT_XRGB8888; - case DRM_FORMAT_RGBA8888: - return DRM_FORMAT_RGBX8888; - default: - return 0; - } + return ((drm & 0xFF) == 'X' || ((drm >> 8) & 0xFF) == 'X'); } static irqreturn_t ltdc_irq_thread(int irq, void *arg) @@ -972,6 +1051,10 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane, if (ldev->caps.pix_fmt_hw[val] == pf) break; + /* Use the flexible color format feature if necessary and available */ + if (ldev->caps.pix_fmt_flex && val == NB_PF) + val = ltdc_set_flexible_pixel_format(plane, pf); + if (val == NB_PF) { DRM_ERROR("Pixel format %.4s not supported\n", (char *)&fb->format->format); @@ -1110,29 +1193,23 @@ static struct drm_plane *ltdc_plane_create(struct drm_device *ddev, struct device *dev = ddev->dev; struct drm_plane *plane; unsigned int i, nb_fmt = 0; - u32 formats[NB_PF * 2]; - u32 drm_fmt, drm_fmt_no_alpha; + u32 *formats; + u32 drm_fmt; const u64 *modifiers = ltdc_format_modifiers; int ret; - /* Get supported pixel formats */ - for (i = 0; i < NB_PF; i++) { - drm_fmt = to_drm_pixelformat(ldev->caps.pix_fmt_hw[i]); - if (!drm_fmt) - continue; - formats[nb_fmt++] = drm_fmt; + formats = devm_kzalloc(dev, ldev->caps.pix_fmt_nb * sizeof(*formats), GFP_KERNEL); - /* Add the no-alpha related format if any & supported */ - drm_fmt_no_alpha = get_pixelformat_without_alpha(drm_fmt); - if (!drm_fmt_no_alpha) - continue; + for (i = 0; i < ldev->caps.pix_fmt_nb; i++) { + drm_fmt = ldev->caps.pix_fmt_drm[i]; /* Manage hw-specific capabilities */ - if (ldev->caps.non_alpha_only_l1 && - type != DRM_PLANE_TYPE_PRIMARY) - continue; + if (ldev->caps.non_alpha_only_l1) + /* XR24 & RX24 like formats supported only on primary layer */ + if (type != DRM_PLANE_TYPE_PRIMARY && is_xrgb(drm_fmt)) + continue; - formats[nb_fmt++] = drm_fmt_no_alpha; + formats[nb_fmt++] = drm_fmt; } plane = devm_kzalloc(dev, sizeof(*plane), GFP_KERNEL); @@ -1311,6 +1388,9 @@ static int ltdc_get_caps(struct drm_device *ddev) ldev->caps.layer_ofs = LAY_OFS_0; ldev->caps.layer_regs = ltdc_layer_regs_a0; ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a0; + ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a0; + ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a0); + ldev->caps.pix_fmt_flex = false; /* * Hw older versions support non-alpha color formats derived * from native alpha color formats only on the primary layer. @@ -1330,6 +1410,9 @@ static int ltdc_get_caps(struct drm_device *ddev) ldev->caps.layer_ofs = LAY_OFS_0; ldev->caps.layer_regs = ltdc_layer_regs_a1; ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a1; + ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a1; + ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a1); + ldev->caps.pix_fmt_flex = false; ldev->caps.non_alpha_only_l1 = false; ldev->caps.pad_max_freq_hz = 150000000; ldev->caps.nb_irq = 4; @@ -1340,6 +1423,9 @@ static int ltdc_get_caps(struct drm_device *ddev) ldev->caps.layer_ofs = LAY_OFS_1; ldev->caps.layer_regs = ltdc_layer_regs_a2; ldev->caps.pix_fmt_hw = ltdc_pix_fmt_a2; + ldev->caps.pix_fmt_drm = ltdc_drm_fmt_a2; + ldev->caps.pix_fmt_nb = ARRAY_SIZE(ltdc_drm_fmt_a2); + ldev->caps.pix_fmt_flex = true; ldev->caps.non_alpha_only_l1 = false; ldev->caps.pad_max_freq_hz = 90000000; ldev->caps.nb_irq = 2; diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h index 68a5a199e320..adc4f9cf7f95 100644 --- a/drivers/gpu/drm/stm/ltdc.h +++ b/drivers/gpu/drm/stm/ltdc.h @@ -17,7 +17,10 @@ struct ltdc_caps { u32 layer_ofs; /* layer offset for applicable regs */ const u32 *layer_regs; /* layer register offset */ u32 bus_width; /* bus width (32 or 64 bits) */ - const u32 *pix_fmt_hw; /* supported pixel formats */ + const u32 *pix_fmt_hw; /* supported hw pixel formats */ + const u32 *pix_fmt_drm; /* supported drm pixel formats */ + int pix_fmt_nb; /* number of pixel format */ + bool pix_fmt_flex; /* pixel format flexibility supported */ bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */ int pad_max_freq_hz; /* max frequency supported by pad */ int nb_irq; /* number of hardware interrupts */ -- 2.17.1

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dri-devel December 2021