dri-devel February 2021

dri-devel@lists.freedesktop.org

314 participants
684 discussions

[PATCH v3 0/6] Add Unisoc's drm kms module
by Kevin Tang 17 Feb '21

17 Feb '21

ChangeList: RFC v1: 1. only upstream modeset and atomic at first commit. 2. remove some unused code; 3. use alpha and blend_mode properties; 3. add yaml support; 4. remove auto-adaptive panel driver; 5. bugfix RFC v2: 1. add sprd crtc and plane module for KMS, preparing for multi crtc&encoder 2. remove gem drivers, use generic CMA handlers 3. remove redundant "module_init", all the sub modules loading by KMS RFC v3: 1. multi crtc&encoder design have problem, so rollback to v1 RFC v4:… [View More] 1. update to gcc-linaro-7.5.0 2. update to Linux 5.6-rc3 3. remove pm_runtime support 4. add COMPILE_TEST, remove unused kconfig 5. "drm_dev_put" on drm_unbind 6. fix some naming convention issue 7. remove semaphore lock for crtc flip 8. remove static variables RFC v5: 1. optimize encoder and connector code implementation 2. use "platform_get_irq" and "platform_get_resource" 3. drop useless function return type, drop unless debug log 4. custom properties should be separate, so drop it 5. use DRM_XXX replase pr_xxx 6. drop dsi&dphy hal callback ops 7. drop unless callback ops checking 8. add comments for sprd dpu structure RFC v6: 1. Access registers via readl/writel 2. Checking for unsupported KMS properties (format, rotation, blend_mode, etc) on plane_check ops 3. Remove always true checks for dpu core ops RFC v7: 1. Fix DTC unit name warnings 2. Fix the problem of maintainers 3. Call drmm_mode_config_init to mode config init 4. Embed drm_device in sprd_drm and use devm_drm_dev_alloc 5. Replace DRM_XXX with drm_xxx on KMS module, but not suitable for other subsystems 6. Remove plane_update stuff, dpu handles all the HW update in crtc->atomic_flush 7. Dsi&Dphy Code structure adjustment, all move to "sprd/" v0: 1. Remove dpu_core_ops stuff layer for sprd drtc driver, but dpu_layer need to keeping. Because all the HW update in crtc->atomic_flush, we need temporary storage all layers for the dpu pageflip of atomic_flush. 2. Add ports subnode with port@X. v1: 1. Remove dphy and dsi graph binding, merge the dphy driver into the dsi. 2. Add commit messages for Unisoc's virtual nodes. v2: 1. Use drm_xxx to replace all DRM_XXX. 2. Use kzalloc to replace devm_kzalloc for sprd_dsi/sprd_dpu structure init. 3. Remove dpu_core_ops midlayer. v3: 1. Remove dpu_layer midlayer and commit layers by aotmic_update Kevin Tang (6): dt-bindings: display: add Unisoc's drm master bindings drm/sprd: add Unisoc's drm kms master dt-bindings: display: add Unisoc's dpu bindings drm/sprd: add Unisoc's drm display controller driver dt-bindings: display: add Unisoc's mipi dsi controller bindings drm/sprd: add Unisoc's drm mipi dsi&dphy driver .../display/sprd/sprd,display-subsystem.yaml | 64 + .../bindings/display/sprd/sprd,sharkl3-dpu.yaml | 77 + .../display/sprd/sprd,sharkl3-dsi-host.yaml | 102 ++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sprd/Kconfig | 13 + drivers/gpu/drm/sprd/Makefile | 8 + drivers/gpu/drm/sprd/dw_dsi_ctrl.c | 794 +++++++++++ drivers/gpu/drm/sprd/dw_dsi_ctrl.h | 1475 ++++++++++++++++++++ drivers/gpu/drm/sprd/dw_dsi_ctrl_ppi.c | 157 +++ drivers/gpu/drm/sprd/dw_dsi_ctrl_ppi.h | 26 + drivers/gpu/drm/sprd/megacores_pll.c | 317 +++++ drivers/gpu/drm/sprd/megacores_pll.h | 146 ++ drivers/gpu/drm/sprd/sprd_dpu.c | 985 +++++++++++++ drivers/gpu/drm/sprd/sprd_dpu.h | 120 ++ drivers/gpu/drm/sprd/sprd_drm.c | 224 +++ drivers/gpu/drm/sprd/sprd_drm.h | 19 + drivers/gpu/drm/sprd/sprd_dsi.c | 1162 +++++++++++++++ drivers/gpu/drm/sprd/sprd_dsi.h | 107 ++ 19 files changed, 5799 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml create mode 100644 drivers/gpu/drm/sprd/Kconfig create mode 100644 drivers/gpu/drm/sprd/Makefile create mode 100644 drivers/gpu/drm/sprd/dw_dsi_ctrl.c create mode 100644 drivers/gpu/drm/sprd/dw_dsi_ctrl.h create mode 100644 drivers/gpu/drm/sprd/dw_dsi_ctrl_ppi.c create mode 100644 drivers/gpu/drm/sprd/dw_dsi_ctrl_ppi.h create mode 100644 drivers/gpu/drm/sprd/megacores_pll.c create mode 100644 drivers/gpu/drm/sprd/megacores_pll.h create mode 100644 drivers/gpu/drm/sprd/sprd_dpu.c create mode 100644 drivers/gpu/drm/sprd/sprd_dpu.h create mode 100644 drivers/gpu/drm/sprd/sprd_drm.c create mode 100644 drivers/gpu/drm/sprd/sprd_drm.h create mode 100644 drivers/gpu/drm/sprd/sprd_dsi.c create mode 100644 drivers/gpu/drm/sprd/sprd_dsi.h -- 2.7.4 [View Less]

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[PATCH v3 00/15] Raspberry PI 4 V3D enablement
by Nicolas Saenz Julienne 17 Feb '21

17 Feb '21

This series attempts to enable V3D on BCM2711, the SoC available on the Raspberry Pi 4 family of boards. Due to the lack of documentation some things are taken as it from testing/downstream implementation[1], which I'm hilighting here: - It's not clear that the following is 100% true, maybe someone can confirm: "In BCM2711 the new ARGON ASB took over V3D. The old ASB is still present with the ISP and H264 bits, and V3D is in the same place in the new ASB as the old one." - Patch #9 ("soc:… [View More] bcm: bcm2835-power: Bypass power_on/off() calls"), I took as is from the downstream implementation, I can't really provide an exact explanation on what changed HW wise. - Ultimately, I need confirmation from the Broadcom folks that they are alright with patch #11 ("drm/v3d: Get rid of pm code") With all this, I get a more or less stable experience using mesa 20.3.4 and X11/Gnome. Regards, Nicolas --- Changes since v2: - Correct ASB names - Address dt-binding comments Changes since v1: - Use 'reg-names' - Correct ASB names - Add missing binding patch for V3D - Address Stefan's comments Nicolas Saenz Julienne (15): dt-bindings: soc: bcm: bcm2835-pm: Convert bindings to DT schema dt-bindings: soc: bcm: bcm2835-pm: Introduce reg-names dt-bindings: soc: bcm: bcm2835-pm: Add support for bcm2711 ARM: dts: bcm2835/bcm2711: Introduce reg-names in watchdog node ARM: dts: bcm2711: Use proper compatible in PM/Watchdog node mfd: bcm2835-pm: Use 'reg-names' to get resources mfd: bcm2835-pm: Add support for BCM2711 soc: bcm: bcm2835-power: Add support for BCM2711's RPiVid ASB soc: bcm: bcm2835-power: Bypass power_on/off() calls dt-bindings: gpu: v3d: Add BCM2711's compatible drm/v3d: Get rid of pm code drm/v3d: Add support for bcm2711 ARM: dts: bcm2711: Enable V3D ARM: configs: Enable DRM_V3D arm64: config: Enable DRM_V3D .../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 1 + .../bindings/soc/bcm/brcm,bcm2835-pm.txt | 46 ---------- .../bindings/soc/bcm/brcm,bcm2835-pm.yaml | 87 +++++++++++++++++++ arch/arm/boot/dts/bcm2711.dtsi | 15 +++- arch/arm/boot/dts/bcm2835-common.dtsi | 1 + arch/arm/configs/multi_v7_defconfig | 1 + arch/arm64/configs/defconfig | 1 + drivers/gpu/drm/v3d/Kconfig | 2 +- drivers/gpu/drm/v3d/v3d_debugfs.c | 18 +--- drivers/gpu/drm/v3d/v3d_drv.c | 12 +-- drivers/gpu/drm/v3d/v3d_gem.c | 9 -- drivers/mfd/bcm2835-pm.c | 80 ++++++++++++----- drivers/soc/bcm/bcm2835-power.c | 74 ++++++++++------ include/linux/mfd/bcm2835-pm.h | 1 + 14 files changed, 217 insertions(+), 131 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt create mode 100644 Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml -- 2.30.0 [View Less]

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[PATCH libdrm 0/2] Update i915_pciids.h and support ADLS
by Tejas Upadhyay 17 Feb '21

17 Feb '21

This series adds : 1. sync up of i915_pciids.h with kernel 2. Support for ADLS platform Tejas Upadhyay (2): intel: sync i915_pciids.h with kernel intel: add INTEL_ADLS_IDS to the pciids list intel/i915_pciids.h | 177 ++++++++++++++++++++++++------------------ intel/intel_chipset.c | 1 + 2 files changed, 102 insertions(+), 76 deletions(-) -- 2.30.0

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[PATCH 00/10] drm/qxl: a collection of fixes
by Gerd Hoffmann 17 Feb '21

17 Feb '21

Mostly around locking. Gerd Hoffmann (10): drm/qxl: properly handle device init failures drm/qxl: more fence wait rework drm/qxl: use ttm bo priorities drm/qxl: fix lockdep issue in qxl_alloc_release_reserved drm/qxl: rename qxl_bo_kmap -> qxl_bo_kmap_locked drm/qxl: add qxl_bo_kmap/qxl_bo_kunmap drm/qxl: fix prime kmap drm/qxl: fix monitors object kmap drm/qxl: map/unmap framebuffers in prepare_fb+cleanup_fb callbacks. drm/qxl: add lock asserts to qxl_bo_kmap_locked + … [View More]

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[PATCH v2 00/10] drm/ast: Clean-up cursor-plane updates
by Thomas Zimmermann 17 Feb '21

17 Feb '21

(was: drm/ast: Move cursor vmap calls out of commit tail) Ast has vmap calls in its cursor's atomic_update function. This is not supported as vmap might aquire the dma reservation lock. While at it, cleanup the whole cursor code: the patchset removes all possible runtime errors from the atomic_update function and reduces the overhead from vmap calls on the HW cursor BOs to a minimum. Patches 1 to 3 update the cursor code and prepare before the refactoring. Patch 4 and 5 inline the cursor … [View More]

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[PATCH v2] drm/i915/gen9bc: Handle TGP PCH during suspend/resume
by Lyude Paul 17 Feb '21

17 Feb '21

From: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay(a)intel.com> For Legacy S3 suspend/resume GEN9 BC needs to enable and setup TGP PCH. v2: * Move Wa_14010685332 into it's own function - vsyrjala * Add TODO comment about figuring out if we can move this workaround - imre Cc: Matt Roper <matthew.d.roper(a)intel.com> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay(a)intel.com> Signed-off-by: Lyude Paul <lyude(a)redhat.com> --- drivers/gpu/drm/… [View More]i915/i915_irq.c | 53 ++++++++++++++++++++++----------- 1 file changed, 36 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 98145a7f28a4..7d912aa950ee 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3040,6 +3040,19 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv) spin_unlock_irq(&dev_priv->irq_lock); } +static void cnp_irq_post_reset(struct drm_i915_private *dev_priv) +{ + struct intel_uncore *uncore = &dev_priv->uncore; + + /* + * Wa_14010685332:cnp/cmp,tgp,adp + * TODO: Figure out if this workaround can be applied in the s0ix suspend/resume handlers as + * on earlier platforms and whether the workaround is also needed for runtime suspend/resume + */ + intel_uncore_rmw(uncore, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS); + intel_uncore_rmw(uncore, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0); +} + static void gen8_irq_reset(struct drm_i915_private *dev_priv) { struct intel_uncore *uncore = &dev_priv->uncore; @@ -3061,8 +3074,14 @@ static void gen8_irq_reset(struct drm_i915_private *dev_priv) GEN3_IRQ_RESET(uncore, GEN8_DE_MISC_); GEN3_IRQ_RESET(uncore, GEN8_PCU_); - if (HAS_PCH_SPLIT(dev_priv)) + if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) + GEN3_IRQ_RESET(uncore, SDE); + else if (HAS_PCH_SPLIT(dev_priv)) ibx_irq_reset(dev_priv); + + if (INTEL_PCH_TYPE(dev_priv) == PCH_CNP || + (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP && INTEL_PCH_TYPE(dev_priv) < PCH_DG1)) + cnp_irq_post_reset(dev_priv); } static void gen11_display_irq_reset(struct drm_i915_private *dev_priv) @@ -3104,15 +3123,9 @@ static void gen11_display_irq_reset(struct drm_i915_private *dev_priv) if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) GEN3_IRQ_RESET(uncore, SDE); - /* Wa_14010685332:cnp/cmp,tgp,adp */ if (INTEL_PCH_TYPE(dev_priv) == PCH_CNP || - (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP && - INTEL_PCH_TYPE(dev_priv) < PCH_DG1)) { - intel_uncore_rmw(uncore, SOUTH_CHICKEN1, - SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS); - intel_uncore_rmw(uncore, SOUTH_CHICKEN1, - SBCLK_RUN_REFCLK_DIS, 0); - } + (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP && INTEL_PCH_TYPE(dev_priv) < PCH_DG1)) + cnp_irq_post_reset(dev_priv); } static void gen11_irq_reset(struct drm_i915_private *dev_priv) @@ -3474,6 +3487,9 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv) ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs); spt_hpd_detection_setup(dev_priv); + + if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) + icp_hpd_irq_setup(dev_priv); } static u32 ilk_hotplug_enables(struct drm_i915_private *i915, @@ -3764,9 +3780,19 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) } } +static void icp_irq_postinstall(struct drm_i915_private *dev_priv) +{ + struct intel_uncore *uncore = &dev_priv->uncore; + u32 mask = SDE_GMBUS_ICP; + + GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff); +} + static void gen8_irq_postinstall(struct drm_i915_private *dev_priv) { - if (HAS_PCH_SPLIT(dev_priv)) + if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) + icp_irq_postinstall(dev_priv); + else if (HAS_PCH_SPLIT(dev_priv)) ibx_irq_postinstall(dev_priv); gen8_gt_irq_postinstall(&dev_priv->gt); @@ -3775,13 +3801,6 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv) gen8_master_intr_enable(dev_priv->uncore.regs); } -static void icp_irq_postinstall(struct drm_i915_private *dev_priv) -{ - struct intel_uncore *uncore = &dev_priv->uncore; - u32 mask = SDE_GMBUS_ICP; - - GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff); -} static void gen11_irq_postinstall(struct drm_i915_private *dev_priv) { -- 2.29.2 [View Less]

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[PATCH] drm-buf: Add debug option
by Daniel Vetter 17 Feb '21

17 Feb '21

We have too many people abusing the struct page they can get at but really shouldn't in importers. Aside from that the backing page might simply not exist (for dynamic p2p mappings) looking at it and using it e.g. for mmap can also wreak the page handling of the exporter completely. Importers really must go through the proper interface like dma_buf_mmap for everything. Just an RFC to see whether this idea has some stickiness. default y for now to make sure intel-gfx-ci picks it up too. I'm … [View More]semi-tempted to enforce this for dynamic importers since those really have no excuse at all to break the rules. Unfortuantely we can't store the right pointers somewhere safe to make sure we oops on something recognizable, so best is to just wrangle them a bit by flipping all the bits. At least on x86 kernel addresses have all their high bits sets and the struct page array is fairly low in the kernel mapping, so flipping all the bits gives us a very high pointer in userspace and hence excellent chances for an invalid dereference. Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: "Christian König" <christian.koenig(a)amd.com> Cc: David Stevens <stevensd(a)chromium.org> Cc: linux-media(a)vger.kernel.org Cc: linaro-mm-sig(a)lists.linaro.org --- drivers/dma-buf/Kconfig | 8 +++++++ drivers/dma-buf/dma-buf.c | 49 +++++++++++++++++++++++++++++++++++---- 2 files changed, 53 insertions(+), 4 deletions(-) diff --git a/drivers/dma-buf/Kconfig b/drivers/dma-buf/Kconfig index 4f8224a6ac95..cddb549e5e59 100644 --- a/drivers/dma-buf/Kconfig +++ b/drivers/dma-buf/Kconfig @@ -50,6 +50,14 @@ config DMABUF_MOVE_NOTIFY This is marked experimental because we don't yet have a consistent execution context and memory management between drivers. +config DMABUF_DEBUG + bool "DMA-BUF debug checks" + default y + help + This option enables additional checks for DMA-BUF importers and + exporters. Specifically it validates that importers do not peek at the + underlying struct page when they import a buffer. + config DMABUF_SELFTESTS tristate "Selftests for the dma-buf interfaces" default n diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index 1c9bd51db110..6e4725f7dfde 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -666,6 +666,30 @@ void dma_buf_put(struct dma_buf *dmabuf) } EXPORT_SYMBOL_GPL(dma_buf_put); +static struct sg_table * __map_dma_buf(struct dma_buf_attachment *attach, + enum dma_data_direction direction) +{ + struct sg_table *sg_table; + + sg_table = attach->dmabuf->ops->map_dma_buf(attach, direction); + +#if CONFIG_DMABUF_DEBUG + if (sg_table) { + int i; + struct scatterlist *sg; + + /* To catch abuse of the underlying struct page by importers mix + * up the bits, but take care to preserve the low SG_ bits to + * not corrupt the sgt. The mixing is undone in __unmap_dma_buf + * before passing the sgt back to the exporter. */ + for_each_sgtable_sg(sg_table, sg, i) + sg->page_link ^= ~0xffUL; + } +#endif + + return sg_table; +} + /** * dma_buf_dynamic_attach - Add the device to dma_buf's attachments list * @dmabuf: [in] buffer to attach device to. @@ -737,7 +761,7 @@ dma_buf_dynamic_attach(struct dma_buf *dmabuf, struct device *dev, goto err_unlock; } - sgt = dmabuf->ops->map_dma_buf(attach, DMA_BIDIRECTIONAL); + sgt = __map_dma_buf(attach, DMA_BIDIRECTIONAL); if (!sgt) sgt = ERR_PTR(-ENOMEM); if (IS_ERR(sgt)) { @@ -784,6 +808,23 @@ struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf, } EXPORT_SYMBOL_GPL(dma_buf_attach); +static void __unmap_dma_buf(struct dma_buf_attachment *attach, + struct sg_table *sg_table, + enum dma_data_direction direction) +{ + +#if CONFIG_DMABUF_DEBUG + if (sg_table) { + int i; + struct scatterlist *sg; + + for_each_sgtable_sg(sg_table, sg, i) + sg->page_link ^= ~0xffUL; + } +#endif + attach->dmabuf->ops->unmap_dma_buf(attach, sg_table, direction); +} + /** * dma_buf_detach - Remove the given attachment from dmabuf's attachments list * @dmabuf: [in] buffer to detach from. @@ -802,7 +843,7 @@ void dma_buf_detach(struct dma_buf *dmabuf, struct dma_buf_attachment *attach) if (dma_buf_is_dynamic(attach->dmabuf)) dma_resv_lock(attach->dmabuf->resv, NULL); - dmabuf->ops->unmap_dma_buf(attach, attach->sgt, attach->dir); + __unmap_dma_buf(attach, attach->sgt, attach->dir); if (dma_buf_is_dynamic(attach->dmabuf)) { dma_buf_unpin(attach); @@ -924,7 +965,7 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach, } } - sg_table = attach->dmabuf->ops->map_dma_buf(attach, direction); + sg_table = __map_dma_buf(attach, direction); if (!sg_table) sg_table = ERR_PTR(-ENOMEM); @@ -987,7 +1028,7 @@ void dma_buf_unmap_attachment(struct dma_buf_attachment *attach, if (dma_buf_is_dynamic(attach->dmabuf)) dma_resv_assert_held(attach->dmabuf->resv); - attach->dmabuf->ops->unmap_dma_buf(attach, sg_table, direction); + __unmap_dma_buf(attach, sg_table, direction); if (dma_buf_is_dynamic(attach->dmabuf) && !IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY)) -- 2.29.2 [View Less]

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[PATCH 1/1] drm/amdkfd: Fix recursive lock warnings
by Felix Kuehling 17 Feb '21

17 Feb '21

memalloc_nofs_save/restore are no longer sufficient to prevent recursive lock warnings when holding locks that can be taken in MMU notifiers. Use memalloc_noreclaim_save/restore instead. Fixes: f920e413ff9c ("mm: track mmu notifiers in fs_reclaim_acquire/release") CC: Daniel Vetter <daniel.vetter(a)ffwll.ch> Signed-off-by: Felix Kuehling <Felix.Kuehling(a)amd.com> --- drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) … [View More]

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[PATCH] Revert "ARM: dts: bcm2711: Add the BSC interrupt controller"
by Florian Fainelli 17 Feb '21

17 Feb '21

As Dave reported: This seems to have unintended side effects. GIC interrupt 117 is shared between the standard I2C controllers (i2c-bcm2835) and the l2-intc block handling the HDMI I2C interrupts. There is not a great way to share an interrupt between an interrupt controller using the chained IRQ handler which is an interrupt flow and another driver like i2c-bcm2835 which uses an interrupt handler (although it specifies IRQF_SHARED). Simply revert this change for now which will mean that … [View More]

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[PATCH v2 0/2] arm64: dts: qcom: sm8250: fix display nodes
by Jonathan Marek 17 Feb '21

17 Feb '21

Add sm8150/sm8250 compatibles to drm/msm and fix the sm8250 display nodes. v2: do not remove mmcx-supply from dispcc node Jonathan Marek (2): drm/msm: add compatibles for sm8150/sm8250 display arm64: dts: qcom: sm8250: fix display nodes .../devicetree/bindings/display/msm/dpu.txt | 4 +-- arch/arm64/boot/dts/qcom/sm8250.dtsi | 33 +++++-------------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 ++ drivers/gpu/drm/msm/msm_drv.c | 6 ++-- 4 files … [View More]

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dri-devel February 2021