dri-devel March 2021

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[Bug 212229] New: STM32F469: vblank wait timed out on output to /sys/class/graphics/fb0/pan
by bugzilla-daemon＠bugzilla.kernel.org 12 Mar '21

12 Mar '21

https://bugzilla.kernel.org/show_bug.cgi?id=212229 Bug ID: 212229 Summary: STM32F469: vblank wait timed out on output to /sys/class/graphics/fb0/pan Product: Drivers Version: 2.5 Kernel Version: Linux version 5.9.16 (ygenks@xps) (arm-buildroot-uclinux-uclibcgnueabi-gcc.br_real (Buildroot 2020.11.2-87-g0611b1a4ab) 9.3.0, GNU ld (GNU Binutils) 2.32) #3 PREEMPT Thu Mar … [View More]11 12:39:46 +03 2021 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: high Priority: P1 Component: Console/Framebuffers Assignee: jsimmons(a)infradead.org Reporter: eugentoo(a)gmail.com CC: dri-devel(a)lists.freedesktop.org Regression: No Created attachment 295797 --> https://bugzilla.kernel.org/attachment.cgi?id=295797&action=edit Kernel config Distribution: Buildroot 2020.11.3 Kernel version: Linux version 5.9.16 (arm-buildroot-uclinux-uclibcgnueabi-gcc.br_real (Buildroot 2020.11.2-87-g0611b1a4ab) 9.3.0, GNU ld (GNU Binutils) 2.32) #3 PREEMPT Thu Mar 11 12:39:46 +03 2021 Kernel config: in attachment Customized device tree fragment: https://github.com/Ygenks/buildroot/blob/2020.11.3-stm32f469-bringup/board/… Buildroot config: https://github.com/Ygenks/buildroot/blob/2020.11.3-stm32f469-bringup/config… Hardware environment: STM32F469i-disco board https://www.st.com/resource/en/user_manual/dm00218846-discovery-kit-with-st… Problem description: After enabling STM32 DRM MIPI DSI subsystem, frambuffer subsystem and virtual terminal for STM32F469 MCU, I've tried to output graphic pattern on the OTM8009A display module from Orisetech with following commands: # Enable full DRM debug echo 0xff > /sys/module/drm/parameters/debug # Write to framebuffer echo 0 0 > /sys/class/graphics/fb0/pan Last command ends with kernel exception:[ 66.500596] [drm:drm_atomic_state_init] Allocated atomic state a15f0561 [ 66.502126] [drm:drm_mode_object_get] OBJ ID: 38 (2) [ 66.503888] [drm:drm_atomic_get_plane_state] Added [PLANE:33:plane-0] 6275dc03 state to a15f0561 [ 66.506318] [drm:drm_mode_object_get] OBJ ID: 39 (1) [ 66.508073] [drm:drm_atomic_get_crtc_state] Added [CRTC:35:crtc-0] f2c93995 state to a15f0561 [ 66.509895] [drm:drm_atomic_get_plane_state] Added [PLANE:36:plane-1] 3f7997d2 state to a15f0561 [ 66.511287] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for [PLANE:36:plane-1] state 3f7997d2 [ 66.512972] [drm:drm_atomic_set_fb_for_plane] Set [FB:38] for [PLANE:33:plane-0] state 6275dc03 [ 66.514687] [drm:drm_mode_object_get] OBJ ID: 38 (3) [ 66.515820] [drm:drm_mode_object_put] OBJ ID: 38 (4) [ 66.517632] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:35:crtc-0] to a15f0561 [ 66.518912] [drm:drm_mode_object_get] OBJ ID: 32 (4) [ 66.520049] [drm:drm_mode_object_get] OBJ ID: 32 (5) [ 66.521869] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:32:DSI-1] 8f9b11f6 state to a15f0561 [ 66.523030] [drm:drm_mode_object_put] OBJ ID: 32 (5) [ 66.525084] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:32:DSI-1] state 8f9b11f6 to [NOCRTC] [ 66.526253] [drm:drm_mode_object_get] OBJ ID: 32 (4) [ 66.527869] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:32:DSI-1] state 8f9b11f6 to [CRTC:35:crtc-0] [ 66.529274] [drm:drm_atomic_check_only] checking a15f0561 [ 66.530665] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:32:DSI-1] [ 66.532342] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:32:DSI-1] keeps [ENCODER:31:DPI-31], now on [CRTC:35:crtc-0] [ 66.534645] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:31:DPI-31] to a15f0561 [ 66.536607] [drm:drm_atomic_get_private_obj_state] Added new private object 41b1bb6c state b53daef0 to a15f0561 [ 66.538321] [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:31:DPI-31] to a15f0561 [ 66.539298] [drm:ltdc_plane_atomic_check] [ 66.540067] [drm:ltdc_plane_atomic_check] [ 66.541452] [drm:drm_atomic_commit] committing a15f0561 [ 66.544452] stm32-display 40016800.display-controller: [drm:drm_calc_timestamping_constants] crtc 35: hwmode: htotal 708, vtotal 839, vdisplay 800 [ 66.546354] stm32-display 40016800.display-controller: [drm:drm_calc_timestamping_constants] crtc 35: clock 29700 kHz framedur 20000404 linedur 23838 [ 66.548126] [drm:ltdc_plane_atomic_update] plane:33 fb:38 (480x800)@(0,0) -> (480x800)@(0,0) [ 66.549066] [drm:ltdc_plane_atomic_update] fb: phys 0xc0600000 [ 66.549881] [drm:ltdc_crtc_atomic_flush] [ 66.550655] [drm:ltdc_crtc_enable_vblank] [ 66.552747] stm32-display 40016800.display-controller: [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0 [ 66.555413] stm32-display 40016800.display-controller: [drm:drm_crtc_vblank_helper_get_vblank_timestamp_internal] crtc 0 : v p(0,0)@ 66.440496 -> 66.440496 [e 17 us, 0 rep] [ 66.557840] stm32-display 40016800.display-controller: [drm:drm_update_vblank_count] crtc 0: Calculating number of vblanks. diff_ns = 45639547247, framedur_ns = 20000404) [ 66.560381] stm32-display 40016800.display-controller: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=271, diff=2282, hw=0 hw_last=0 [ 66.563073] stm32-display 40016800.display-controller: [drm:drm_crtc_vblank_helper_get_vblank_timestamp_internal] crtc 0 : v p(0,0)@ 66.448156 -> 66.448156 [e 17 us, 0 rep] [ 66.565476] stm32-display 40016800.display-controller: [drm:drm_update_vblank_count] crtc 0: Calculating number of vblanks. diff_ns = 7660378, framedur_ns = 20000404) -------------- vvv Exception here vvv ----------------- [ 66.567972] stm32-display 40016800.display-controller: [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=2553, diff=0, hw=0 hw_last=0 [ 76.753724] ------------[ cut here ]------------ [ 76.755426] WARNING: CPU: 0 PID: 46 at drivers/gpu/drm/drm_atomic_helper.c:1496 drm_atomic_helper_wait_for_vblanks+0x12f/0x164 [ 76.755840] [CRTC:35:crtc-0] vblank wait timed out [ 76.756751] CPU: 0 PID: 46 Comm: sh Tainted: G W 5.9.16 #3 [ 76.757117] Hardware name: STM32 (Device Tree Support) [ 76.759186] [<900030bd>] (unwind_backtrace) from [<9000246b>] (show_stack+0xb/0xc) [ 76.760841] [<9000246b>] (show_stack) from [<901c8345>] (__warn+0x79/0x8c) [ 76.762302] [<901c8345>] (__warn) from [<901c8397>] (warn_slowpath_fmt+0x3f/0x74) [ 76.764937] [<901c8397>] (warn_slowpath_fmt) from [<90141a63>] (drm_atomic_helper_wait_for_vblanks+0x12f/0x164) [ 76.767391] [<90141a63>] (drm_atomic_helper_wait_for_vblanks) from [<90142603>] (drm_atomic_helper_commit_tail+0x35/0x40) [ 76.769689] [<90142603>] (drm_atomic_helper_commit_tail) from [<901426f9>] (commit_tail+0xeb/0xfa) [ 76.771960] [<901426f9>] (commit_tail) from [<90142a15>] (drm_atomic_helper_commit+0x95/0xa0) -------------- Exception here ----------------- The screen is totally blank. Controlling brightness doesn't work too: ~ # echo 255 > /sys/class/backlight/40016c00.dsi.0/brightness [ 3147.258092] stm32-display-dsi 40016c00.dsi: failed to write command FIFO [ 3147.265921] [drm] mipi dsi dcs write buffer failed [ 3147.293878] stm32-display-dsi 40016c00.dsi: failed to write command FIFO [ 3147.301125] [drm] mipi dsi dcs write buffer failed Dmesg output: [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 5.9.16 (ygenks@xps) (arm-buildroot-uclinux-uclibcgnueabi-gcc.br_real (Buildroot 2020.11.2-87-g0611b1a4ab) 9.3.0, GNU ld (GNU Binutils) 2.32) #3 PREEMPT Thu Mar 11 12:39:46 +03 2021 [ 0.000000] CPU: ARMv7-M [410fc241] revision 1 (ARMv7M), cr=00000000 [ 0.000000] CPU: unknown data cache, unknown instruction cache [ 0.000000] OF: fdt: Machine model: STMicroelectronics STM32F469i-DISCO board [ 0.000000] Using ARMv7 PMSA Compliant MPU. Region independence: No, Used 5 of 8 regions [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x00000000c0000000-0x00000000c0ffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x00000000c0000000-0x00000000c0ffffff] [ 0.000000] Initmem setup node 0 [mem 0x00000000c0000000-0x00000000c0ffffff] [ 0.000000] On node 0 totalpages: 4096 [ 0.000000] Normal zone: 32 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 4096 pages, LIFO batch:0 [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Built 1 zonelists, mobility grouping off. Total pages: 4064 [ 0.000000] Kernel command line: root=/dev/ram mminit_loglevel=4 loglevel=8 [ 0.000000] Dentry cache hash table entries: 2048 (order: 1, 8192 bytes, linear) [ 0.000000] Inode-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 15840K/16384K available (1959K kernel code, 163K rwdata, 856K rodata, 92K init, 119K bss, 544K reserved, 0K cma-reserved) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] Trampoline variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 [ 0.000000] /soc/interrupt-controller@40013c00: bank0 [ 0.000000] random: get_random_bytes called from start_kernel+0x1e3/0x35c with crng_init=0 [ 0.000000] ------------[ cut here ]------------ [ 0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/clk-divider.c:138 divider_recalc_rate+0x45/0x94 [ 0.000000] pll-r: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.9.16 #3 [ 0.000000] Hardware name: STM32 (Device Tree Support) [ 0.000000] [<900030bd>] (unwind_backtrace) from [<9000246b>] (show_stack+0xb/0xc) [ 0.000000] [<9000246b>] (show_stack) from [<901c8345>] (__warn+0x79/0x8c) [ 0.000000] [<901c8345>] (__warn) from [<901c8397>] (warn_slowpath_fmt+0x3f/0x74) [ 0.000000] [<901c8397>] (warn_slowpath_fmt) from [<90115559>] (divider_recalc_rate+0x45/0x94) [ 0.000000] [<90115559>] (divider_recalc_rate) from [<901155cd>] (clk_divider_recalc_rate+0x25/0x28) [ 0.000000] [<901155cd>] (clk_divider_recalc_rate) from [<90113dbd>] (__clk_register+0x2f9/0x408) [ 0.000000] [<90113dbd>] (__clk_register) from [<90114a89>] (clk_hw_register+0x19/0x26) [ 0.000000] [<90114a89>] (clk_hw_register) from [<901c97e9>] (clk_register_pll_div.constprop.0+0x75/0xb0) [ 0.000000] [<901c97e9>] (clk_register_pll_div.constprop.0) from [<901c990d>] (stm32f4_rcc_register_pll.constprop.0+0xe9/0x114) [ 0.000000] [<901c990d>] (stm32f4_rcc_register_pll.constprop.0) from [<902ca43f>] (stm32f42xx_rcc_of_clk_init_driver+0x4a7/0x694) [ 0.000000] [<902ca43f>] (stm32f42xx_rcc_of_clk_init_driver) from [<902c9f2b>] (of_clk_init+0x117/0x158) [ 0.000000] [<902c9f2b>] (of_clk_init) from [<902c22d1>] (time_init+0x15/0x20) [ 0.000000] [<902c22d1>] (time_init) from [<902c087b>] (start_kernel+0x20b/0x35c) [ 0.000000] [<902c087b>] (start_kernel) from [<00000000>] (0x0) [ 0.000000] ---[ end trace 4c7da8027ba5f86b ]--- [ 0.000000] ------------[ cut here ]------------ [ 0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/clk-divider.c:138 divider_recalc_rate+0x45/0x94 [ 0.000000] pllsai-q: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set [ 0.000000] CPU: 0 PID: 0 Comm: swapper Tainted: G W 5.9.16 #3 [ 0.000000] Hardware name: STM32 (Device Tree Support) [ 0.000000] [<900030bd>] (unwind_backtrace) from [<9000246b>] (show_stack+0xb/0xc) [ 0.000000] [<9000246b>] (show_stack) from [<901c8345>] (__warn+0x79/0x8c) [ 0.000000] [<901c8345>] (__warn) from [<901c8397>] (warn_slowpath_fmt+0x3f/0x74) [ 0.000000] [<901c8397>] (warn_slowpath_fmt) from [<90115559>] (divider_recalc_rate+0x45/0x94) [ 0.000000] [<90115559>] (divider_recalc_rate) from [<901155cd>] (clk_divider_recalc_rate+0x25/0x28) [ 0.000000] [<901155cd>] (clk_divider_recalc_rate) from [<90113dbd>] (__clk_register+0x2f9/0x408) [ 0.000000] [<90113dbd>] (__clk_register) from [<90114a89>] (clk_hw_register+0x19/0x26) [ 0.000000] [<90114a89>] (clk_hw_register) from [<901c97e9>] (clk_register_pll_div.constprop.0+0x75/0xb0) [ 0.000000] [<901c97e9>] (clk_register_pll_div.constprop.0) from [<901c990d>] (stm32f4_rcc_register_pll.constprop.0+0xe9/0x114) [ 0.000000] [<901c990d>] (stm32f4_rcc_register_pll.constprop.0) from [<902ca459>] (stm32f42xx_rcc_of_clk_init_driver+0x4c1/0x694) [ 0.000000] [<902ca459>] (stm32f42xx_rcc_of_clk_init_driver) from [<902c9f2b>] (of_clk_init+0x117/0x158) [ 0.000000] [<902c9f2b>] (of_clk_init) from [<902c22d1>] (time_init+0x15/0x20) [ 0.000000] [<902c22d1>] (time_init) from [<902c087b>] (start_kernel+0x20b/0x35c) [ 0.000000] [<902c087b>] (start_kernel) from [<00000000>] (0x0) [ 0.000000] ---[ end trace 4c7da8027ba5f86c ]--- [ 0.000000] ------------[ cut here ]------------ [ 0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/clk-divider.c:138 divider_recalc_rate+0x45/0x94 [ 0.000000] pllsai-r: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set [ 0.000000] CPU: 0 PID: 0 Comm: swapper Tainted: G W 5.9.16 #3 [ 0.000000] Hardware name: STM32 (Device Tree Support) [ 0.000000] [<900030bd>] (unwind_backtrace) from [<9000246b>] (show_stack+0xb/0xc) [ 0.000000] [<9000246b>] (show_stack) from [<901c8345>] (__warn+0x79/0x8c) [ 0.000000] [<901c8345>] (__warn) from [<901c8397>] (warn_slowpath_fmt+0x3f/0x74) [ 0.000000] [<901c8397>] (warn_slowpath_fmt) from [<90115559>] (divider_recalc_rate+0x45/0x94) [ 0.000000] [<90115559>] (divider_recalc_rate) from [<901155cd>] (clk_divider_recalc_rate+0x25/0x28) [ 0.000000] [<901155cd>] (clk_divider_recalc_rate) from [<90113dbd>] (__clk_register+0x2f9/0x408) [ 0.000000] [<90113dbd>] (__clk_register) from [<90114a89>] (clk_hw_register+0x19/0x26) [ 0.000000] [<90114a89>] (clk_hw_register) from [<901c97e9>] (clk_register_pll_div.constprop.0+0x75/0xb0) [ 0.000000] [<901c97e9>] (clk_register_pll_div.constprop.0) from [<901c990d>] (stm32f4_rcc_register_pll.constprop.0+0xe9/0x114) [ 0.000000] [<901c990d>] (stm32f4_rcc_register_pll.constprop.0) from [<902ca459>] (stm32f42xx_rcc_of_clk_init_driver+0x4c1/0x694) [ 0.000000] [<902ca459>] (stm32f42xx_rcc_of_clk_init_driver) from [<902c9f2b>] (of_clk_init+0x117/0x158) [ 0.000000] [<902c9f2b>] (of_clk_init) from [<902c22d1>] (time_init+0x15/0x20) [ 0.000000] [<902c22d1>] (time_init) from [<902c087b>] (start_kernel+0x20b/0x35c) [ 0.000000] [<902c087b>] (start_kernel) from [<00000000>] (0x0) [ 0.000000] ---[ end trace 4c7da8027ba5f86d ]--- [ 0.000000] clocksource: arm_system_timer: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 331816030 ns [ 0.000000] ARM System timer initialized as clocksource [ 0.000705] sched_clock: 32 bits at 90MHz, resolution 11ns, wraps every 23860929530ns [ 0.001454] timer@40000c00: STM32 sched_clock registered [ 0.002813] Switching to timer-based delay loop, resolution 11ns [ 0.003546] timer@40000c00: STM32 delay timer registered [ 0.005080] clocksource: timer@40000c00: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 21236227187 ns [ 0.006860] /soc/timer@40000c00: STM32 clockevent driver initialized (32 bits) [ 0.044650] Console: colour dummy device 80x30 [ 0.338349] printk: console [tty0] enabled [ 0.341119] Calibrating delay loop (skipped), value calculated using timer frequency.. 180.00 BogoMIPS (lpj=900000) [ 0.346491] pid_max: default: 4096 minimum: 301 [ 0.359538] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.363583] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.438277] rcu: Hierarchical SRCU implementation. [ 0.451978] devtmpfs: initialized [ 1.022581] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 1.027297] pinctrl core: initialized pinctrl subsystem [ 2.427251] stm32f469-pinctrl soc:pin-controller: No package detected, use default one [ 2.481341] stm32f469-pinctrl soc:pin-controller: GPIOA bank added [ 2.500606] stm32f469-pinctrl soc:pin-controller: GPIOB bank added [ 2.519726] stm32f469-pinctrl soc:pin-controller: GPIOC bank added [ 2.538955] stm32f469-pinctrl soc:pin-controller: GPIOD bank added [ 2.558419] stm32f469-pinctrl soc:pin-controller: GPIOE bank added [ 2.577572] stm32f469-pinctrl soc:pin-controller: GPIOF bank added [ 2.596581] stm32f469-pinctrl soc:pin-controller: GPIOG bank added [ 2.615330] stm32f469-pinctrl soc:pin-controller: GPIOH bank added [ 2.635236] stm32f469-pinctrl soc:pin-controller: GPIOI bank added [ 2.654665] stm32f469-pinctrl soc:pin-controller: GPIOJ bank added [ 2.658672] random: fast init done [ 2.675817] stm32f469-pinctrl soc:pin-controller: GPIOK bank added [ 2.680404] stm32f469-pinctrl soc:pin-controller: Pinctrl STM32 initialized [ 3.213262] fbcon: Taking over console [ 3.298080] stm32-dma 40026000.dma-controller: STM32 DMA driver registered [ 3.392902] stm32-dma 40026400.dma-controller: STM32 DMA driver registered [ 3.542844] clocksource: Switched to clocksource timer@40000c00 [ 11.432799] workingset: timestamp_bits=30 max_order=12 bucket_order=0 [ 11.896537] io scheduler mq-deadline registered [ 11.898875] io scheduler kyber registered [ 11.968019] STM32 USART driver initialized [ 11.996799] 40004800.serial: ttySTM0 at MMIO 0x40004800 (irq = 32, base_baud = 2812500) is a stm32-usart [ 13.010748] printk: console [ttySTM0] enabled [ 13.098458] random: crng init done [ 13.128497] stm32-display-dsi 40016c00.dsi: supply phy-dsi not found, using dummy regulator [ 13.803759] stm32_rtc 40002800.rtc: registered as rtc0 [ 13.812550] stm32_rtc 40002800.rtc: setting system clock to 2000-01-01T00:48:40 UTC (946687720) [ 13.831176] stm32_rtc 40002800.rtc: Date/Time must be initialized [ 13.860713] i2c /dev entries driver [ 13.980156] mmci-pl18x 40012c00.sdio: Got CD GPIO [ 14.012526] mmci-pl18x 40012c00.sdio: mmc0: PL180 manf 80 rev8 at 0x40012c00 irq 33,0 (pio) [ 15.253083] [drm] Initialized stm 1.0.0 20170330 for 40016800.display-controller on minor 0 [ 15.827310] Console: switching to colour frame buffer device 60x50 [ 16.655436] stm32-display 40016800.display-controller: [drm] fb0: stmdrmfb frame buffer device [ 16.774113] input: gpio_keys as /devices/platform/gpio_keys/input/input0 [ 16.881363] Freeing unused kernel memory: 28K [ 16.900370] This architecture does not have kernel memory protection. [ 16.928387] Run /init as init process [ 16.944506] with arguments: [ 16.957856] /init [ 16.968400] with environment: [ 16.982443] HOME=/ [ 16.993970] TERM=linux [ 17.006290] mminit_loglevel=4 [ 47.313970] mmc_vcard: disabling -- You may reply to this email to add a comment. You are receiving this mail because: You are on the CC list for the bug. [View Less]

1 4

[PATCH v7 0/3] GUD USB Display driver
by Noralf Trønnes 12 Mar '21

12 Mar '21

Hi, A while back I had the idea to turn a Raspberry Pi Zero into a $5 USB to HDMI/SDTV/DPI display adapter. The protocol is open so people are free to make displays implementing it and use this driver, all that's needed is to add a USB vid:pid to the driver for the display. See the wiki[1] for more information and images for the Raspberry Pi Zero/4. Changes in this version: - LZ4_compress_default() can return zero, check for that - Fix memory leak in gud_pipe_check() error path (Peter) - … [View More]Improve debug and error messages (Peter) - Don't pass length in protocol structs (Peter) - Pass USB interface to gud_usb_control_msg() et al. (Peter) - Improve gud_connector_fill_properties() (Peter) - Add GUD_PIXEL_FORMAT_RGB111 (Peter) - Remove GUD_REQ_SET_VERSION (Peter) - Fix DRM_IOCTL_MODE_OBJ_SETPROPERTY and the rotation property - Fix dma-buf import (Thomas) Note: There are several changes to the protocol. I plan to apply the patches in a week or so unless something turns out to be broken. Dependency: drm: Use USB controller's DMA mask when importing dmabufs[2] (currently in drm-misc-fixes but not in drm-misc-next yet, also present in drm-tip and linux-next) Noralf. [1] https://github.com/notro/gud/wiki [2] https://patchwork.freedesktop.org/patch/msgid/20210303133229.3288-1-tzimmer… Noralf Trønnes (3): drm/uapi: Add USB connector type drm/probe-helper: Check epoch counter in output_poll_execute() drm: Add GUD USB Display driver MAINTAINERS | 8 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_connector.c | 1 + drivers/gpu/drm/drm_probe_helper.c | 7 +- drivers/gpu/drm/gud/Kconfig | 14 + drivers/gpu/drm/gud/Makefile | 4 + drivers/gpu/drm/gud/gud_connector.c | 729 ++++++++++++++++++++++++++++ drivers/gpu/drm/gud/gud_drv.c | 659 +++++++++++++++++++++++++ drivers/gpu/drm/gud/gud_internal.h | 154 ++++++ drivers/gpu/drm/gud/gud_pipe.c | 535 ++++++++++++++++++++ include/drm/gud.h | 333 +++++++++++++ include/uapi/drm/drm_mode.h | 1 + 13 files changed, 2447 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/gud/Kconfig create mode 100644 drivers/gpu/drm/gud/Makefile create mode 100644 drivers/gpu/drm/gud/gud_connector.c create mode 100644 drivers/gpu/drm/gud/gud_drv.c create mode 100644 drivers/gpu/drm/gud/gud_internal.h create mode 100644 drivers/gpu/drm/gud/gud_pipe.c create mode 100644 include/drm/gud.h -- 2.23.0 [View Less]

3 17

don't base trees on 5.12-rc1
by Dave Airlie 12 Mar '21

12 Mar '21

Hey maintainers, I'm mostly sending this to the -misc maintainers because drm-misc-fixes is based on rc1 at present. This needs to be *rebased* not merged up to 5.12-rc2. Merging will still have the bad landmine commits in the bisect history. This is a very special case. But otherwise to any other maintainers reading this, please avoid 5.12-rc1 as the base for any trees for this cycle. Dave.

3 4

[PATCH v2] drm/tiny: add support for Waveshare 2inch LCD module
by Carlis 12 Mar '21

12 Mar '21

From: "Carlis" <zhangxuezhi1(a)yulong.com> This adds a new module for the ST7789V controller with parameters for the Waveshare 2inch LCD module. Signed-off-by: Carlis <zhangxuezhi1(a)yulong.com> --- v2:change compatible value. --- MAINTAINERS | 7 + drivers/gpu/drm/tiny/Kconfig | 14 ++ drivers/gpu/drm/tiny/Makefile | 1 + drivers/gpu/drm/tiny/st7789v.c | 269 +++++++++++++++++++++++++++++++++ 4 files changed, 291 insertions(+) create mode 100644 … [View More]drivers/gpu/drm/tiny/st7789v.c diff --git a/MAINTAINERS b/MAINTAINERS index d92f85ca831d..25c4ae12cecf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5769,6 +5769,13 @@ T: git git://anongit.freedesktop.org/drm/drm-misc F: Documentation/devicetree/bindings/display/sitronix,st7735r.yaml F: drivers/gpu/drm/tiny/st7735r.c +DRM DRIVER FOR SITRONIX ST7789V PANELS +M: Carlis <zhangxuezhi1(a)yulong.com> +S: Maintained +T: git git://anongit.freedesktop.org/drm/drm-misc +F: Documentation/devicetree/bindings/display/sitronix,st7789v-dbi.yaml +F: drivers/gpu/drm/tiny/st7789v.c + DRM DRIVER FOR SONY ACX424AKP PANELS M: Linus Walleij <linus.walleij(a)linaro.org> S: Maintained diff --git a/drivers/gpu/drm/tiny/Kconfig b/drivers/gpu/drm/tiny/Kconfig index 2b6414f0fa75..ac2c7fb702f0 100644 --- a/drivers/gpu/drm/tiny/Kconfig +++ b/drivers/gpu/drm/tiny/Kconfig @@ -131,3 +131,17 @@ config TINYDRM_ST7735R * Okaya RH128128T 1.44" 128x128 TFT If M is selected the module will be called st7735r. + +config TINYDRM_ST7789V + tristate "DRM support for Sitronix ST7789V display panels" + depends on DRM && SPI + select DRM_KMS_HELPER + select DRM_KMS_CMA_HELPER + select DRM_MIPI_DBI + select BACKLIGHT_CLASS_DEVICE + help + DRM driver for Sitronix ST7789V with one of the following + LCDs: + * Waveshare 2inch lcd module 240x320 TFT + + If M is selected the module will be called st7789v. diff --git a/drivers/gpu/drm/tiny/Makefile b/drivers/gpu/drm/tiny/Makefile index 6ae4e9e5a35f..aa0caa2b6c16 100644 --- a/drivers/gpu/drm/tiny/Makefile +++ b/drivers/gpu/drm/tiny/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_TINYDRM_MI0283QT) += mi0283qt.o obj-$(CONFIG_TINYDRM_REPAPER) += repaper.o obj-$(CONFIG_TINYDRM_ST7586) += st7586.o obj-$(CONFIG_TINYDRM_ST7735R) += st7735r.o +obj-$(CONFIG_TINYDRM_ST7789V) += st7789v.o diff --git a/drivers/gpu/drm/tiny/st7789v.c b/drivers/gpu/drm/tiny/st7789v.c new file mode 100644 index 000000000000..9b4bb9edba40 --- /dev/null +++ b/drivers/gpu/drm/tiny/st7789v.c @@ -0,0 +1,269 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * DRM driver for display panels connected to a Sitronix ST7789V + * display controller in SPI mode. + * + * Copyright 2017 David Lechner <david(a)lechnology.com> + * Copyright (C) 2019 Glider bvba + */ + +#include <linux/backlight.h> +#include <linux/delay.h> +#include <linux/dma-buf.h> +#include <linux/gpio/consumer.h> +#include <linux/module.h> +#include <linux/property.h> +#include <linux/spi/spi.h> +#include <video/mipi_display.h> + +#include <drm/drm_atomic_helper.h> +#include <drm/drm_drv.h> +#include <drm/drm_fb_helper.h> +#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_framebuffer_helper.h> +#include <drm/drm_managed.h> +#include <drm/drm_mipi_dbi.h> + +#define ST7789V_PORCTRL 0xb2 +#define ST7789V_GCTRL 0xb7 +#define ST7789V_VCOMS 0xbb +#define ST7789V_LCMCTRL 0xc0 +#define ST7789V_VDVVRHEN 0xc2 +#define ST7789V_VRHS 0xc3 +#define ST7789V_VDVS 0xc4 +#define ST7789V_FRCTRL2 0xc6 +#define ST7789V_PWCTRL1 0xd0 +#define ST7789V_PVGAMCTRL 0xe0 +#define ST7789V_NVGAMCTRL 0xe1 + +#define ST7789V_MY BIT(7) +#define ST7789V_MX BIT(6) +#define ST7789V_MV BIT(5) +#define ST7789V_RGB BIT(3) + +struct st7789v_cfg { + const struct drm_display_mode mode; + unsigned int left_offset; + unsigned int top_offset; + unsigned int write_only:1; + unsigned int rgb:1; /* RGB (vs. BGR) */ +}; + +struct st7789v_priv { + struct mipi_dbi_dev dbidev; /* Must be first for .release() */ + const struct st7789v_cfg *cfg; +}; + +static void st7789v_pipe_enable(struct drm_simple_display_pipe *pipe, + struct drm_crtc_state *crtc_state, + struct drm_plane_state *plane_state) +{ + struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); + struct st7789v_priv *priv = container_of(dbidev, struct st7789v_priv, + dbidev); + struct mipi_dbi *dbi = &dbidev->dbi; + int ret, idx; + u8 addr_mode; + + if (!drm_dev_enter(pipe->crtc.dev, &idx)) + return; + + DRM_DEBUG_KMS("\n"); + + ret = mipi_dbi_poweron_reset(dbidev); + if (ret) + goto out_exit; + + msleep(150); + + mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); + msleep(100); + + + switch (dbidev->rotation) { + default: + addr_mode = 0; + break; + case 90: + addr_mode = ST7789V_MY | ST7789V_MV; + break; + case 180: + addr_mode = ST7789V_MX | ST7789V_MY; + break; + case 270: + addr_mode = ST7789V_MX | ST7789V_MV; + break; + } + + if (priv->cfg->rgb) + addr_mode |= ST7789V_RGB; + + mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode); + mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, + MIPI_DCS_PIXEL_FMT_16BIT); + mipi_dbi_command(dbi, MIPI_DCS_ENTER_INVERT_MODE); + mipi_dbi_command(dbi, ST7789V_PORCTRL, 0x0c, 0x0c, 0x00, 0x33, 0x33); + mipi_dbi_command(dbi, ST7789V_GCTRL, 0x35); + mipi_dbi_command(dbi, ST7789V_VCOMS, 0x1f); + mipi_dbi_command(dbi, ST7789V_LCMCTRL, 0x2c); + mipi_dbi_command(dbi, ST7789V_VDVVRHEN, 0x01); + mipi_dbi_command(dbi, ST7789V_VRHS, 0x12); + mipi_dbi_command(dbi, ST7789V_VDVS, 0x20); + mipi_dbi_command(dbi, ST7789V_FRCTRL2, 0x0f); + mipi_dbi_command(dbi, ST7789V_PWCTRL1, 0xa4, 0xa1); + mipi_dbi_command(dbi, ST7789V_PVGAMCTRL, 0xd0, 0x08, 0x11, 0x08, 0x0c, + 0x15, 0x39, 0x33, 0x50, 0x36, 0x13, 0x14, 0x29, 0x2d); + mipi_dbi_command(dbi, ST7789V_NVGAMCTRL, 0xd0, 0x08, 0x10, 0x08, 0x06, + 0x06, 0x39, 0x44, 0x51, 0x0b, 0x16, 0x14, 0x2f, 0x31); + mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON); + msleep(100); + mipi_dbi_enable_flush(dbidev, crtc_state, plane_state); + +out_exit: + drm_dev_exit(idx); +} + +static const struct drm_simple_display_pipe_funcs st7789v_pipe_funcs = { + .enable = st7789v_pipe_enable, + .disable = mipi_dbi_pipe_disable, + .update = mipi_dbi_pipe_update, + .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, +}; + +static const struct st7789v_cfg ws_2inch_lcd_cfg = { + .mode = { DRM_SIMPLE_MODE(240, 320, 34, 43) }, + /* Cannot read from Waveshare 2inch lcd module" display via SPI */ + .write_only = true, + .rgb = false, +}; + + +DEFINE_DRM_GEM_CMA_FOPS(st7789v_fops); + +static const struct drm_driver st7789v_driver = { + .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, + .fops = &st7789v_fops, + DRM_GEM_CMA_DRIVER_OPS_VMAP, + .debugfs_init = mipi_dbi_debugfs_init, + .name = "st7789v", + .desc = "Sitronix ST7789R", + .date = "20210310", + .major = 1, + .minor = 0, +}; + +static const struct of_device_id st7789v_of_match[] = { + { .compatible = "waveshare,ws2inch", .data = &ws_2inch_lcd_cfg }, + { }, +}; +MODULE_DEVICE_TABLE(of, st7789v_of_match); + +static const struct spi_device_id st7789v_id[] = { + { "ws2inch", (uintptr_t)&ws_2inch_lcd_cfg }, + { }, +}; +MODULE_DEVICE_TABLE(spi, st7789v_id); + +static int st7789v_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + const struct st7789v_cfg *cfg; + struct mipi_dbi_dev *dbidev; + struct st7789v_priv *priv; + struct drm_device *drm; + struct mipi_dbi *dbi; + struct gpio_desc *dc; + u32 rotation = 0; + int ret; + + cfg = device_get_match_data(&spi->dev); + if (!cfg) + cfg = (void *)spi_get_device_id(spi)->driver_data; + + priv = devm_drm_dev_alloc(dev, &st7789v_driver, + struct st7789v_priv, dbidev.drm); + if (IS_ERR(priv)) + return PTR_ERR(priv); + + dbidev = &priv->dbidev; + priv->cfg = cfg; + + dbi = &dbidev->dbi; + drm = &dbidev->drm; + + dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(dbi->reset)) { + DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n"); + return PTR_ERR(dbi->reset); + } + + dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW); + if (IS_ERR(dc)) { + DRM_DEV_ERROR(dev, "Failed to get gpio 'dc'\n"); + return PTR_ERR(dc); + } + + dbidev->backlight = devm_of_find_backlight(dev); + if (IS_ERR(dbidev->backlight)) + return PTR_ERR(dbidev->backlight); + + device_property_read_u32(dev, "rotation", &rotation); + + ret = mipi_dbi_spi_init(spi, dbi, dc); + if (ret) + return ret; + + if (cfg->write_only) + dbi->read_commands = NULL; + + dbidev->left_offset = cfg->left_offset; + dbidev->top_offset = cfg->top_offset; + + ret = mipi_dbi_dev_init(dbidev, &st7789v_pipe_funcs, &cfg->mode, + rotation); + if (ret) + return ret; + + drm_mode_config_reset(drm); + + ret = drm_dev_register(drm, 0); + if (ret) + return ret; + + spi_set_drvdata(spi, drm); + + drm_fbdev_generic_setup(drm, 0); + + return 0; +} + +static int st7789v_remove(struct spi_device *spi) +{ + struct drm_device *drm = spi_get_drvdata(spi); + + drm_dev_unplug(drm); + drm_atomic_helper_shutdown(drm); + + return 0; +} + +static void st7789v_shutdown(struct spi_device *spi) +{ + drm_atomic_helper_shutdown(spi_get_drvdata(spi)); +} + +static struct spi_driver st7789v_spi_driver = { + .driver = { + .name = "st7789v-dbi", + .of_match_table = st7789v_of_match, + }, + .id_table = st7789v_id, + .probe = st7789v_probe, + .remove = st7789v_remove, + .shutdown = st7789v_shutdown, +}; +module_spi_driver(st7789v_spi_driver); + +MODULE_DESCRIPTION("Sitronix ST7789V DRM driver"); +MODULE_AUTHOR("Carlis <zhangxuezhi1(a)yulong.com>"); +MODULE_LICENSE("GPL"); -- 2.25.1 [View Less]

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[PATCH v2] dt-bindings: display: sitronix, st7789v-dbi: Add Waveshare 2inch LCD module
by Carlis 12 Mar '21

12 Mar '21

From: "Carlis" <zhangxuezhi1(a)yulong.com> Document support for the Waveshare 2inch LCD module display, which is a 240x320 2" TFT display driven by a Sitronix ST7789V TFT Controller. Signed-off-by: Carlis <zhangxuezhi1(a)yulong.com> --- v2:change compatible name. --- .../display/sitronix,st7789v-dbi.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sitronix,st7789v-dbi.yaml diff --git a/… [View More]

1 0

[PATCH v6 0/8] Add support for SVM atomics in Nouveau
by Alistair Popple 12 Mar '21

12 Mar '21

This is the sixth version of a series to add support to Nouveau for atomic memory operations on OpenCL shared virtual memory (SVM) regions. There are no significant changes for version six other than correcting a minor s390 build and bisectability issue and removing a redundant call to compound_page() when checking for PageLocked in patch 1. Exclusive device access is implemented by adding a new swap entry type (SWAP_DEVICE_EXCLUSIVE) which is similar to a migration entry. The main difference … [View More]is that on fault the original entry is immediately restored by the fault handler instead of waiting. Restoring the entry triggers calls to MMU notifers which allows a device driver to revoke the atomic access permission from the GPU prior to the CPU finalising the entry. Patches 1 & 2 refactor existing migration and device private entry functions. Patches 3 & 4 rework try_to_unmap_one() by splitting out unrelated functionality into separate functions - try_to_migrate_one() and try_to_munlock_one(). These should not change any functionality, but any help testing would be much appreciated as I have not been able to test every usage of try_to_unmap_one(). Patch 5 contains the bulk of the implementation for device exclusive memory. Patch 6 contains some additions to the HMM selftests to ensure everything works as expected. Patch 7 is a cleanup for the Nouveau SVM implementation. Patch 8 contains the implementation of atomic access for the Nouveau driver. This has been tested using the latest upstream Mesa userspace with a simple OpenCL test program which checks the results of atomic GPU operations on a SVM buffer whilst also writing to the same buffer from the CPU. Alistair Popple (8): mm: Remove special swap entry functions mm/swapops: Rework swap entry manipulation code mm/rmap: Split try_to_munlock from try_to_unmap mm/rmap: Split migration into its own function mm: Device exclusive memory access mm: Selftests for exclusive device memory nouveau/svm: Refactor nouveau_range_fault nouveau/svm: Implement atomic SVM access Documentation/vm/hmm.rst | 19 +- arch/s390/mm/pgtable.c | 2 +- drivers/gpu/drm/nouveau/include/nvif/if000c.h | 1 + drivers/gpu/drm/nouveau/nouveau_svm.c | 130 +++- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 1 + .../drm/nouveau/nvkm/subdev/mmu/vmmgp100.c | 6 + fs/proc/task_mmu.c | 23 +- include/linux/mmu_notifier.h | 25 +- include/linux/rmap.h | 9 +- include/linux/swap.h | 8 +- include/linux/swapops.h | 123 ++-- lib/test_hmm.c | 126 +++- lib/test_hmm_uapi.h | 2 + mm/debug_vm_pgtable.c | 12 +- mm/hmm.c | 12 +- mm/huge_memory.c | 45 +- mm/hugetlb.c | 10 +- mm/memcontrol.c | 2 +- mm/memory.c | 127 +++- mm/migrate.c | 41 +- mm/mprotect.c | 18 +- mm/page_vma_mapped.c | 15 +- mm/rmap.c | 597 +++++++++++++++--- tools/testing/selftests/vm/hmm-tests.c | 219 +++++++ 24 files changed, 1313 insertions(+), 260 deletions(-) -- 2.20.1 [View Less]

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[PATCH 1/2] dma-buf: Require VM_PFNMAP vma for mmap
by Daniel Vetter 12 Mar '21

12 Mar '21

tldr; DMA buffers aren't normal memory, expecting that you can use them like that (like calling get_user_pages works, or that they're accounting like any other normal memory) cannot be guaranteed. Since some userspace only runs on integrated devices, where all buffers are actually all resident system memory, there's a huge temptation to assume that a struct page is always present and useable like for any more pagecache backed mmap. This has the potential to result in a uapi nightmare. To stop … [View More]this gap require that DMA buffer mmaps are VM_PFNMAP, which blocks get_user_pages and all the other struct page based infrastructure for everyone. In spirit this is the uapi counterpart to the kernel-internal CONFIG_DMABUF_DEBUG. Motivated by a recent patch which wanted to swich the system dma-buf heap to vm_insert_page instead of vm_insert_pfn. v2: Jason brought up that we also want to guarantee that all ptes have the pte_special flag set, to catch fast get_user_pages (on architectures that support this). Allowing VM_MIXEDMAP (like VM_SPECIAL does) would still allow vm_insert_page, but limiting to VM_PFNMAP will catch that. >From auditing the various functions to insert pfn pte entires (vm_insert_pfn_prot, remap_pfn_range and all it's callers like dma_mmap_wc) it looks like VM_PFNMAP is already required anyway, so this should be the correct flag to check for. References: https://lore.kernel.org/lkml/CAKMK7uHi+mG0z0HUmNt13QCCvutuRVjpcR0NjRL12k-Wb… Acked-by: Christian König <christian.koenig(a)amd.com> Cc: Jason Gunthorpe <jgg(a)ziepe.ca> Cc: Suren Baghdasaryan <surenb(a)google.com> Cc: Matthew Wilcox <willy(a)infradead.org> Cc: John Stultz <john.stultz(a)linaro.org> Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: "Christian König" <christian.koenig(a)amd.com> Cc: linux-media(a)vger.kernel.org Cc: linaro-mm-sig(a)lists.linaro.org --- drivers/dma-buf/dma-buf.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index f264b70c383e..06cb1d2e9fdc 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -127,6 +127,7 @@ static struct file_system_type dma_buf_fs_type = { static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma) { struct dma_buf *dmabuf; + int ret; if (!is_dma_buf_file(file)) return -EINVAL; @@ -142,7 +143,11 @@ static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma) dmabuf->size >> PAGE_SHIFT) return -EINVAL; - return dmabuf->ops->mmap(dmabuf, vma); + ret = dmabuf->ops->mmap(dmabuf, vma); + + WARN_ON(!(vma->vm_flags & VM_PFNMAP)); + + return ret; } static loff_t dma_buf_llseek(struct file *file, loff_t offset, int whence) @@ -1244,6 +1249,8 @@ EXPORT_SYMBOL_GPL(dma_buf_end_cpu_access); int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, unsigned long pgoff) { + int ret; + if (WARN_ON(!dmabuf || !vma)) return -EINVAL; @@ -1264,7 +1271,11 @@ int dma_buf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma, vma_set_file(vma, dmabuf->file); vma->vm_pgoff = pgoff; - return dmabuf->ops->mmap(dmabuf, vma); + ret = dmabuf->ops->mmap(dmabuf, vma); + + WARN_ON(!(vma->vm_flags & VM_PFNMAP)); + + return ret; } EXPORT_SYMBOL_GPL(dma_buf_mmap); -- 2.30.0 [View Less]

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Re: [PATCH] drm/scheduler re-insert Bailing job to avoid memleak
by Alex Deucher 12 Mar '21

12 Mar '21

+dri-devel Please be sure to cc dri-devel when you send out gpu scheduler patches. On Thu, Mar 11, 2021 at 10:57 PM Jack Zhang <Jack.Zhang1(a)amd.com> wrote: > > re-insert Bailing jobs to avoid memory leak. > > Signed-off-by: Jack Zhang <Jack.Zhang1(a)amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++- > drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 8 ++++++-- > drivers/gpu/drm/scheduler/sched_main.c | 8 +++++++- > include/drm/… [View More]gpu_scheduler.h | 1 + > 4 files changed, 17 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index 79b9cc73763f..86463b0f936e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -4815,8 +4815,10 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, > job ? job->base.id : -1); > > /* even we skipped this reset, still need to set the job to guilty */ > - if (job) > + if (job) { > drm_sched_increase_karma(&job->base); > + r = DRM_GPU_SCHED_STAT_BAILING; > + } > goto skip_recovery; > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c > index 759b34799221..41390bdacd9e 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c > @@ -34,6 +34,7 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job) > struct amdgpu_job *job = to_amdgpu_job(s_job); > struct amdgpu_task_info ti; > struct amdgpu_device *adev = ring->adev; > + int ret; > > memset(&ti, 0, sizeof(struct amdgpu_task_info)); > > @@ -52,8 +53,11 @@ static enum drm_gpu_sched_stat amdgpu_job_timedout(struct drm_sched_job *s_job) > ti.process_name, ti.tgid, ti.task_name, ti.pid); > > if (amdgpu_device_should_recover_gpu(ring->adev)) { > - amdgpu_device_gpu_recover(ring->adev, job); > - return DRM_GPU_SCHED_STAT_NOMINAL; > + ret = amdgpu_device_gpu_recover(ring->adev, job); > + if (ret == DRM_GPU_SCHED_STAT_BAILING) > + return DRM_GPU_SCHED_STAT_BAILING; > + else > + return DRM_GPU_SCHED_STAT_NOMINAL; > } else { > drm_sched_suspend_timeout(&ring->sched); > if (amdgpu_sriov_vf(adev)) > diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c > index 92d8de24d0a1..a44f621fb5c4 100644 > --- a/drivers/gpu/drm/scheduler/sched_main.c > +++ b/drivers/gpu/drm/scheduler/sched_main.c > @@ -314,6 +314,7 @@ static void drm_sched_job_timedout(struct work_struct *work) > { > struct drm_gpu_scheduler *sched; > struct drm_sched_job *job; > + int ret; > > sched = container_of(work, struct drm_gpu_scheduler, work_tdr.work); > > @@ -331,8 +332,13 @@ static void drm_sched_job_timedout(struct work_struct *work) > list_del_init(&job->list); > spin_unlock(&sched->job_list_lock); > > - job->sched->ops->timedout_job(job); > + ret = job->sched->ops->timedout_job(job); > > + if (ret == DRM_GPU_SCHED_STAT_BAILING) { > + spin_lock(&sched->job_list_lock); > + list_add(&job->node, &sched->ring_mirror_list); > + spin_unlock(&sched->job_list_lock); > + } > /* > * Guilty job did complete and hence needs to be manually removed > * See drm_sched_stop doc. > diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h > index 4ea8606d91fe..8093ac2427ef 100644 > --- a/include/drm/gpu_scheduler.h > +++ b/include/drm/gpu_scheduler.h > @@ -210,6 +210,7 @@ enum drm_gpu_sched_stat { > DRM_GPU_SCHED_STAT_NONE, /* Reserve 0 */ > DRM_GPU_SCHED_STAT_NOMINAL, > DRM_GPU_SCHED_STAT_ENODEV, > + DRM_GPU_SCHED_STAT_BAILING, > }; > > /** > -- > 2.25.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx(a)lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx [View Less]

3 2

[PATCH v5 0/8] Add support for SVM atomics in Nouveau
by Alistair Popple 12 Mar '21

12 Mar '21

This is the fifth version of a series to add support to Nouveau for atomic memory operations on OpenCL shared virtual memory (SVM) regions. The main changes since v4 are a rebase onto v5.12-rc2, the removal of check_device_exclusive_range() and the addition of MMU_NOTIFY_EXCLUSIVE which makes the extra check unnecessary. The driver can instead filter notifier updates called as part of make_device_exclusive_range(). Exclusive device access is implemented by adding a new swap entry type (… [View More]SWAP_DEVICE_EXCLUSIVE) which is similar to a migration entry. The main difference is that on fault the original entry is immediately restored by the fault handler instead of waiting. Restoring the entry triggers calls to MMU notifers which allows a device driver to revoke the atomic access permission from the GPU prior to the CPU finalising the entry. Patches 1 & 2 refactor existing migration and device private entry functions. Patches 3 & 4 rework try_to_unmap_one() by splitting out unrelated functionality into separate functions - try_to_migrate_one() and try_to_munlock_one(). These should not change any functionality, but any help testing would be much appreciated as I have not been able to test every usage of try_to_unmap_one(). Patch 5 contains the bulk of the implementation for device exclusive memory. Patch 6 contains some additions to the HMM selftests to ensure everything works as expected. Patch 7 is a cleanup for the Nouveau SVM implementation. Patch 8 contains the implementation of atomic access for the Nouveau driver. This has been tested using the latest upstream Mesa userspace with a simple OpenCL test program which checks the results of atomic GPU operations on a SVM buffer whilst also writing to the same buffer from the CPU. v5: * Rebased on v5.12-rc2. * Renamed range->migrate_pgmap_owner to range->owner. * Added MMU_NOTIFY_EXCLUSIVE to allow passing of a driver cookie which allows notifiers called as a result of make_device_exclusive_range() to be ignored. * Added a check to try_to_protect_one() to detect if the pages originally returned from get_user_pages() have been unmapped or not. * Removed check_device_exclusive_range() as it is no longer required with the other changes. * Documentation and comments. v4: * Added pfn_swap_entry_to_page() and reinstated the migration entry page lock check. * Added check_device_exclusive_range() for use during mmu range notifier read side critical section when programming device page tables. v3: * Refactored some existing functionality. * Switched to using get_user_pages_remote() instead of open-coding it. * Moved code out of hmm. v2: * Changed implementation to use special swap entries instead of device private pages. Alistair Popple (8): mm: Remove special swap entry functions mm/swapops: Rework swap entry manipulation code mm/rmap: Split try_to_munlock from try_to_unmap mm/rmap: Split migration into its own function mm: Device exclusive memory access mm: Selftests for exclusive device memory nouveau/svm: Refactor nouveau_range_fault nouveau/svm: Implement atomic SVM access Documentation/vm/hmm.rst | 19 +- arch/s390/mm/pgtable.c | 2 +- drivers/gpu/drm/nouveau/include/nvif/if000c.h | 1 + drivers/gpu/drm/nouveau/nouveau_svm.c | 130 +++- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 1 + .../drm/nouveau/nvkm/subdev/mmu/vmmgp100.c | 6 + fs/proc/task_mmu.c | 23 +- include/linux/mmu_notifier.h | 25 +- include/linux/rmap.h | 9 +- include/linux/swap.h | 8 +- include/linux/swapops.h | 123 ++-- lib/test_hmm.c | 126 +++- lib/test_hmm_uapi.h | 2 + mm/debug_vm_pgtable.c | 12 +- mm/hmm.c | 12 +- mm/huge_memory.c | 45 +- mm/hugetlb.c | 10 +- mm/memcontrol.c | 2 +- mm/memory.c | 127 +++- mm/migrate.c | 41 +- mm/mprotect.c | 18 +- mm/page_vma_mapped.c | 15 +- mm/rmap.c | 597 +++++++++++++++--- tools/testing/selftests/vm/hmm-tests.c | 219 +++++++ 24 files changed, 1313 insertions(+), 260 deletions(-) -- 2.20.1 [View Less]

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[PULL] drm-intel-fixes
by Rodrigo Vivi 12 Mar '21

12 Mar '21

Hi Dave and Daniel, Things are very quiet. Only 1 fix this round. Since I will be out next week, if this trend continues I will accumulate 2 weeks and send when in -rc4. Here goes drm-intel-fixes-2021-03-11: - Wedge the GPU if command parser setup fails (Tvrtko) Thanks, Rodrigo. The following changes since commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8: Linux 5.12-rc1 (2021-02-28 16:05:19 -0800) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel … [View More]

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dri-devel March 2021