dri-devel March 2021

dri-devel@lists.freedesktop.org

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867 discussions

[PATCH v8 0/5] Generic page pool & deferred freeing for system dmabuf heap
by John Stultz 05 Mar '21

05 Mar '21

Apologies for letting so much time pass since the last revision! The point of this series is trying to add both deferred-freeing logic as well as a page pool to the DMA-BUF system heap to improve allocation performance. This is desired, as the combination of deferred freeing along with the page pool allows us to offload page-zeroing out of the allocation hot path. This was done originally with ION and this patch series allows the DMA-BUF system heap to match ION's system heap allocation performance in a simple microbenchmark [1] (ION re-added to the kernel for comparision, running on an x86 vm image): ./dmabuf-heap-bench -i 0 1 system Testing dmabuf system vs ion heaptype 0 (flags: 0x1) --------------------------------------------- dmabuf heap: alloc 4096 bytes 5000 times in 88092722 ns 17618 ns/call ion heap: alloc 4096 bytes 5000 times in 103043547 ns 20608 ns/call dmabuf heap: alloc 1048576 bytes 5000 times in 252416639 ns 50483 ns/call ion heap: alloc 1048576 bytes 5000 times in 358190744 ns 71638 ns/call dmabuf heap: alloc 8388608 bytes 5000 times in 2854351310 ns 570870 ns/call ion heap: alloc 8388608 bytes 5000 times in 3676328905 ns 735265 ns/call dmabuf heap: alloc 33554432 bytes 5000 times in 13208119197 ns 2641623 ns/call ion heap: alloc 33554432 bytes 5000 times in 15306975287 ns 3061395 ns/call Daniel didn't like earlier attempts to re-use the network page-pool code to achieve this, and suggested the ttm_pool be used instead, so this series pulls the page pool functionality out of the ttm_pool logic and creates a generic page pool that can be shared. New in v7 (never submitted): * Reworked how I integrated the page pool with the ttm logic to use container of to avoid allocating structures per page. New in v8: * Due to the dual license requirement from Christian König I completely threw away the earlier shared page pool implementation (which had evolved from ion code), and rewrote it using just the ttm_pool logic. My apologies for any previously reviewed issues that I've reintroduced in doing so. Input would be greatly appreciated. Testing as well, as I don't have any development hardware that utilizes the ttm pool. thanks -john [1] https://android.googlesource.com/platform/system/memory/libdmabufheap/+/ref… Cc: Daniel Vetter <daniel(a)ffwll.ch> Cc: Christian Koenig <christian.koenig(a)amd.com> Cc: Sumit Semwal <sumit.semwal(a)linaro.org> Cc: Liam Mark <lmark(a)codeaurora.org> Cc: Chris Goldsworthy <cgoldswo(a)codeaurora.org> Cc: Laura Abbott <labbott(a)kernel.org> Cc: Brian Starkey <Brian.Starkey(a)arm.com> Cc: Hridya Valsaraju <hridya(a)google.com> Cc: Suren Baghdasaryan <surenb(a)google.com> Cc: Sandeep Patil <sspatil(a)google.com> Cc: Daniel Mentz <danielmentz(a)google.com> Cc: Ørjan Eide <orjan.eide(a)arm.com> Cc: Robin Murphy <robin.murphy(a)arm.com> Cc: Ezequiel Garcia <ezequiel(a)collabora.com> Cc: Simon Ser <contact(a)emersion.fr> Cc: James Jones <jajones(a)nvidia.com> Cc: linux-media(a)vger.kernel.org Cc: dri-devel(a)lists.freedesktop.org John Stultz (5): drm: Add a sharable drm page-pool implementation drm: ttm_pool: Rework ttm_pool to use drm_page_pool dma-buf: heaps: Add deferred-free-helper library code dma-buf: system_heap: Add drm pagepool support to system heap dma-buf: system_heap: Add deferred freeing to the system heap drivers/dma-buf/heaps/Kconfig | 5 + drivers/dma-buf/heaps/Makefile | 1 + drivers/dma-buf/heaps/deferred-free-helper.c | 138 ++++++++++++ drivers/dma-buf/heaps/deferred-free-helper.h | 55 +++++ drivers/dma-buf/heaps/system_heap.c | 47 +++- drivers/gpu/drm/Kconfig | 5 + drivers/gpu/drm/Makefile | 2 + drivers/gpu/drm/page_pool.c | 214 +++++++++++++++++++ drivers/gpu/drm/ttm/ttm_pool.c | 156 +++----------- include/drm/page_pool.h | 65 ++++++ include/drm/ttm/ttm_pool.h | 6 +- 11 files changed, 557 insertions(+), 137 deletions(-) create mode 100644 drivers/dma-buf/heaps/deferred-free-helper.c create mode 100644 drivers/dma-buf/heaps/deferred-free-helper.h create mode 100644 drivers/gpu/drm/page_pool.c create mode 100644 include/drm/page_pool.h -- 2.25.1

3 9

[PATCH 0/2] Fix purging buffers in the shmem helpers
by Neil Roberts 05 Mar '21

05 Mar '21

These two patches fix a problem with the madvise purging code for the shmem helpers where the mmaping for a purged buffer wouldn't get invalidated correctly. This presumably ends up as a security hole where the mapping can be accessed from user-space to read and write random pages from other buffers. This is currently affecting Panfrost. The second patch is a v2 from a patch that was sent standalone. There is a WIP IGT test for Panfrost which demonstrates the bug here: https://gitlab.freedesktop.org/nroberts/igt-gpu-tools/-/commits/panfrost-pu… Neil Roberts (2): drm/shmem-helper: Check for purged buffers in fault handler drm/shmem-helper: Don't remove the offset in vm_area_struct pgoff drivers/gpu/drm/drm_gem_shmem_helper.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) -- 2.29.2

2 5

Re: [PATCH 16/17] iommu: remove DOMAIN_ATTR_IO_PGTABLE_CFG
by Robin Murphy 05 Mar '21

05 Mar '21

On 2021-03-01 08:42, Christoph Hellwig wrote: > Signed-off-by: Christoph Hellwig <hch(a)lst.de> Moreso than the previous patch, where the feature is at least relatively generic (note that there's a bunch of in-flight development around DOMAIN_ATTR_NESTING), I'm really not convinced that it's beneficial to bloat the generic iommu_ops structure with private driver-specific interfaces. The attribute interface is a great compromise for these kinds of things, and you can easily add type-checked wrappers around it for external callers (maybe even make the actual attributes internal between the IOMMU core and drivers) if that's your concern. Robin. > --- > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- > drivers/iommu/arm/arm-smmu/arm-smmu.c | 40 +++++++------------------ > drivers/iommu/iommu.c | 9 ++++++ > include/linux/iommu.h | 9 +++++- > 4 files changed, 29 insertions(+), 31 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > index 0f184c3dd9d9ec..78d98ab2ee3a68 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c > @@ -191,7 +191,7 @@ void adreno_set_llc_attributes(struct iommu_domain *iommu) > struct io_pgtable_domain_attr pgtbl_cfg; > > pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_ARM_OUTER_WBWA; > - iommu_domain_set_attr(iommu, DOMAIN_ATTR_IO_PGTABLE_CFG, &pgtbl_cfg); > + iommu_domain_set_pgtable_attr(iommu, &pgtbl_cfg); > } > > struct msm_gem_address_space * > diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c > index 2e17d990d04481..2858999c86dfd1 100644 > --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c > +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c > @@ -1515,40 +1515,22 @@ static int arm_smmu_domain_enable_nesting(struct iommu_domain *domain) > return ret; > } > > -static int arm_smmu_domain_set_attr(struct iommu_domain *domain, > - enum iommu_attr attr, void *data) > +static int arm_smmu_domain_set_pgtable_attr(struct iommu_domain *domain, > + struct io_pgtable_domain_attr *pgtbl_cfg) > { > - int ret = 0; > struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); > + int ret = -EPERM; > > - mutex_lock(&smmu_domain->init_mutex); > - > - switch(domain->type) { > - case IOMMU_DOMAIN_UNMANAGED: > - switch (attr) { > - case DOMAIN_ATTR_IO_PGTABLE_CFG: { > - struct io_pgtable_domain_attr *pgtbl_cfg = data; > - > - if (smmu_domain->smmu) { > - ret = -EPERM; > - goto out_unlock; > - } > + if (domain->type != IOMMU_DOMAIN_UNMANAGED) > + return -EINVAL; > > - smmu_domain->pgtbl_cfg = *pgtbl_cfg; > - break; > - } > - default: > - ret = -ENODEV; > - } > - break; > - case IOMMU_DOMAIN_DMA: > - ret = -ENODEV; > - break; > - default: > - ret = -EINVAL; > + mutex_lock(&smmu_domain->init_mutex); > + if (!smmu_domain->smmu) { > + smmu_domain->pgtbl_cfg = *pgtbl_cfg; > + ret = 0; > } > -out_unlock: > mutex_unlock(&smmu_domain->init_mutex); > + > return ret; > } > > @@ -1609,7 +1591,7 @@ static struct iommu_ops arm_smmu_ops = { > .device_group = arm_smmu_device_group, > .dma_use_flush_queue = arm_smmu_dma_use_flush_queue, > .dma_enable_flush_queue = arm_smmu_dma_enable_flush_queue, > - .domain_set_attr = arm_smmu_domain_set_attr, > + .domain_set_pgtable_attr = arm_smmu_domain_set_pgtable_attr, > .domain_enable_nesting = arm_smmu_domain_enable_nesting, > .of_xlate = arm_smmu_of_xlate, > .get_resv_regions = arm_smmu_get_resv_regions, > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c > index 2e9e058501a953..8490aefd4b41f8 100644 > --- a/drivers/iommu/iommu.c > +++ b/drivers/iommu/iommu.c > @@ -2693,6 +2693,15 @@ int iommu_domain_enable_nesting(struct iommu_domain *domain) > } > EXPORT_SYMBOL_GPL(iommu_domain_enable_nesting); > > +int iommu_domain_set_pgtable_attr(struct iommu_domain *domain, > + struct io_pgtable_domain_attr *pgtbl_cfg) > +{ > + if (!domain->ops->domain_set_pgtable_attr) > + return -EINVAL; > + return domain->ops->domain_set_pgtable_attr(domain, pgtbl_cfg); > +} > +EXPORT_SYMBOL_GPL(iommu_domain_set_pgtable_attr); > + > void iommu_get_resv_regions(struct device *dev, struct list_head *list) > { > const struct iommu_ops *ops = dev->bus->iommu_ops; > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index aed88aa3bd3edf..39d3ed4d2700ac 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -40,6 +40,7 @@ struct iommu_domain; > struct notifier_block; > struct iommu_sva; > struct iommu_fault_event; > +struct io_pgtable_domain_attr; > > /* iommu fault flags */ > #define IOMMU_FAULT_READ 0x0 > @@ -107,7 +108,6 @@ enum iommu_cap { > */ > > enum iommu_attr { > - DOMAIN_ATTR_IO_PGTABLE_CFG, > DOMAIN_ATTR_MAX, > }; > > @@ -196,6 +196,7 @@ struct iommu_iotlb_gather { > * @dma_enable_flush_queue: Try to enable the DMA flush queue > * @domain_set_attr: Change domain attributes > * @domain_enable_nesting: Enable nesting > + * @domain_set_pgtable_attr: Set io page table attributes > * @get_resv_regions: Request list of reserved regions for a device > * @put_resv_regions: Free list of reserved regions for a device > * @apply_resv_region: Temporary helper call-back for iova reserved ranges > @@ -249,6 +250,8 @@ struct iommu_ops { > int (*domain_set_attr)(struct iommu_domain *domain, > enum iommu_attr attr, void *data); > int (*domain_enable_nesting)(struct iommu_domain *domain); > + int (*domain_set_pgtable_attr)(struct iommu_domain *domain, > + struct io_pgtable_domain_attr *pgtbl_cfg); > > /* Request/Free a list of reserved regions for a device */ > void (*get_resv_regions)(struct device *dev, struct list_head *list); > @@ -493,9 +496,13 @@ extern int iommu_group_id(struct iommu_group *group); > extern struct iommu_domain *iommu_group_default_domain(struct iommu_group *); > > bool iommu_dma_use_flush_queue(struct iommu_domain *domain); > +int iommu_domain_set_pgtable_attr(struct iommu_domain *domain, > + struct io_pgtable_domain_attr *pgtbl_cfg); > extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr, > void *data); > int iommu_domain_enable_nesting(struct iommu_domain *domain); > +int iommu_domain_set_pgtable_attr(struct iommu_domain *domain, > + struct io_pgtable_domain_attr *pgtbl_cfg); > > extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev, > unsigned long iova, int flags); >

3 2

[PATCH RESEND][next] drm/i915/gem: Fix fall-through warnings for Clang
by Gustavo A. R. Silva 05 Mar '21

05 Mar '21

In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning by explicitly adding a return statement instead of letting the code fall through to the next case. Link: https://github.com/KSPP/linux/issues/115 Signed-off-by: Gustavo A. R. Silva <gustavoars(a)kernel.org> --- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c index c2dba1cd9532..2a14a5c94a8a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c @@ -60,6 +60,7 @@ static void try_to_writeback(struct drm_i915_gem_object *obj, switch (obj->mm.madv) { case I915_MADV_DONTNEED: i915_gem_object_truncate(obj); + return; case __I915_MADV_PURGED: return; } -- 2.27.0

1 0

[PATCH] devfreq: Register devfreq as a cooling device
by Daniel Lezcano 05 Mar '21

05 Mar '21

Currently the default behavior is to manually having the devfreq backend to register themselves as a devfreq cooling device. There are no so many and actually it makes more sense to register the devfreq device when adding it. Consequently, every devfreq becomes a cooling device like cpufreq is. Having a devfreq being registered as a cooling device can not mitigate a thermal zone if it is not bound to this one. Thus, the current configurations are not impacted by this change. Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> --- drivers/devfreq/devfreq.c | 8 ++++++++ drivers/gpu/drm/lima/lima_devfreq.c | 13 ------------- drivers/gpu/drm/lima/lima_devfreq.h | 2 -- drivers/gpu/drm/msm/msm_gpu.c | 11 ----------- drivers/gpu/drm/msm/msm_gpu.h | 2 -- drivers/gpu/drm/panfrost/panfrost_devfreq.c | 13 ------------- include/linux/devfreq.h | 3 +++ 7 files changed, 11 insertions(+), 41 deletions(-) diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c index b6d63f02d293..19149b31b000 100644 --- a/drivers/devfreq/devfreq.c +++ b/drivers/devfreq/devfreq.c @@ -11,6 +11,7 @@ #include <linux/kmod.h> #include <linux/sched.h> #include <linux/debugfs.h> +#include <linux/devfreq_cooling.h> #include <linux/errno.h> #include <linux/err.h> #include <linux/init.h> @@ -26,6 +27,7 @@ #include <linux/hrtimer.h> #include <linux/of.h> #include <linux/pm_qos.h> +#include <linux/thermal.h> #include <linux/units.h> #include "governor.h" @@ -935,6 +937,10 @@ struct devfreq *devfreq_add_device(struct device *dev, mutex_unlock(&devfreq_list_lock); + devfreq->cdev = devfreq_cooling_em_register(devfreq, NULL); + if (IS_ERR(devfreq->cdev)) + dev_info(dev, "Failed to register devfreq cooling device\n"); + return devfreq; err_init: @@ -960,6 +966,8 @@ int devfreq_remove_device(struct devfreq *devfreq) if (!devfreq) return -EINVAL; + thermal_cooling_device_unregister(devfreq->cdev); + if (devfreq->governor) { devfreq->governor->event_handler(devfreq, DEVFREQ_GOV_STOP, NULL); diff --git a/drivers/gpu/drm/lima/lima_devfreq.c b/drivers/gpu/drm/lima/lima_devfreq.c index 5686ad4aaf7c..a696eff1642c 100644 --- a/drivers/gpu/drm/lima/lima_devfreq.c +++ b/drivers/gpu/drm/lima/lima_devfreq.c @@ -7,7 +7,6 @@ */ #include <linux/clk.h> #include <linux/devfreq.h> -#include <linux/devfreq_cooling.h> #include <linux/device.h> #include <linux/platform_device.h> #include <linux/pm_opp.h> @@ -90,11 +89,6 @@ void lima_devfreq_fini(struct lima_device *ldev) { struct lima_devfreq *devfreq = &ldev->devfreq; - if (devfreq->cooling) { - devfreq_cooling_unregister(devfreq->cooling); - devfreq->cooling = NULL; - } - if (devfreq->devfreq) { devm_devfreq_remove_device(ldev->dev, devfreq->devfreq); devfreq->devfreq = NULL; @@ -110,7 +104,6 @@ void lima_devfreq_fini(struct lima_device *ldev) int lima_devfreq_init(struct lima_device *ldev) { - struct thermal_cooling_device *cooling; struct device *dev = ldev->dev; struct opp_table *opp_table; struct devfreq *devfreq; @@ -173,12 +166,6 @@ int lima_devfreq_init(struct lima_device *ldev) ldevfreq->devfreq = devfreq; - cooling = of_devfreq_cooling_register(dev->of_node, devfreq); - if (IS_ERR(cooling)) - dev_info(dev, "Failed to register cooling device\n"); - else - ldevfreq->cooling = cooling; - return 0; err_fini: diff --git a/drivers/gpu/drm/lima/lima_devfreq.h b/drivers/gpu/drm/lima/lima_devfreq.h index 2d9b3008ce77..c43a2069e5d3 100644 --- a/drivers/gpu/drm/lima/lima_devfreq.h +++ b/drivers/gpu/drm/lima/lima_devfreq.h @@ -9,7 +9,6 @@ struct devfreq; struct opp_table; -struct thermal_cooling_device; struct lima_device; @@ -17,7 +16,6 @@ struct lima_devfreq { struct devfreq *devfreq; struct opp_table *clkname_opp_table; struct opp_table *regulators_opp_table; - struct thermal_cooling_device *cooling; ktime_t busy_time; ktime_t idle_time; diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index ab7c167b0623..d7f80ebfe9df 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -14,7 +14,6 @@ #include <generated/utsrelease.h> #include <linux/string_helpers.h> #include <linux/devfreq.h> -#include <linux/devfreq_cooling.h> #include <linux/devcoredump.h> #include <linux/sched/task.h> @@ -112,14 +111,6 @@ static void msm_devfreq_init(struct msm_gpu *gpu) } devfreq_suspend_device(gpu->devfreq.devfreq); - - gpu->cooling = of_devfreq_cooling_register(gpu->pdev->dev.of_node, - gpu->devfreq.devfreq); - if (IS_ERR(gpu->cooling)) { - DRM_DEV_ERROR(&gpu->pdev->dev, - "Couldn't register GPU cooling device\n"); - gpu->cooling = NULL; - } } static int enable_pwrrail(struct msm_gpu *gpu) @@ -1056,6 +1047,4 @@ void msm_gpu_cleanup(struct msm_gpu *gpu) if (gpu->worker) { kthread_destroy_worker(gpu->worker); } - - devfreq_cooling_unregister(gpu->cooling); } diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index d7cd02cd2109..93419368bac8 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -155,8 +155,6 @@ struct msm_gpu { struct msm_gpu_state *crashstate; /* True if the hardware supports expanded apriv (a650 and newer) */ bool hw_apriv; - - struct thermal_cooling_device *cooling; }; static inline struct msm_gpu *dev_to_gpu(struct device *dev) diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c index 56b3f5935703..2cb6300de1f1 100644 --- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c +++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c @@ -3,7 +3,6 @@ #include <linux/clk.h> #include <linux/devfreq.h> -#include <linux/devfreq_cooling.h> #include <linux/platform_device.h> #include <linux/pm_opp.h> @@ -90,7 +89,6 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) struct device *dev = &pfdev->pdev->dev; struct devfreq *devfreq; struct opp_table *opp_table; - struct thermal_cooling_device *cooling; struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; opp_table = dev_pm_opp_set_regulators(dev, pfdev->comp->supply_names, @@ -139,12 +137,6 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) } pfdevfreq->devfreq = devfreq; - cooling = devfreq_cooling_em_register(devfreq, NULL); - if (IS_ERR(cooling)) - DRM_DEV_INFO(dev, "Failed to register cooling device\n"); - else - pfdevfreq->cooling = cooling; - return 0; err_fini: @@ -156,11 +148,6 @@ void panfrost_devfreq_fini(struct panfrost_device *pfdev) { struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; - if (pfdevfreq->cooling) { - devfreq_cooling_unregister(pfdevfreq->cooling); - pfdevfreq->cooling = NULL; - } - if (pfdevfreq->opp_of_table_added) { dev_pm_opp_of_remove_table(&pfdev->pdev->dev); pfdevfreq->opp_of_table_added = false; diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h index 26ea0850be9b..690bd4affe18 100644 --- a/include/linux/devfreq.h +++ b/include/linux/devfreq.h @@ -198,6 +198,9 @@ struct devfreq { struct srcu_notifier_head transition_notifier_list; + /* Pointer to the cooling device if used for thermal mitigation */ + struct thermal_cooling_device *cdev; + struct notifier_block nb_min; struct notifier_block nb_max; }; -- 2.17.1

4 7

[PATCH] qxl: Fix uninitialised struct field head.surface_id
by Colin King 05 Mar '21

05 Mar '21

From: Colin Ian King <colin.king(a)canonical.com> The surface_id struct field in head is not being initialized and static analysis warns that this is being passed through to dev->monitors_config->heads[i] on an assignment. Clear up this warning by initializing it to zero. Addresses-Coverity: ("Uninitialized scalar variable") Fixes: a6d3c4d79822 ("qxl: hook monitors_config updates into crtc, not encoder.") Signed-off-by: Colin Ian King <colin.king(a)canonical.com> --- drivers/gpu/drm/qxl/qxl_display.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c index 012bce0cdb65..10738e04c09b 100644 --- a/drivers/gpu/drm/qxl/qxl_display.c +++ b/drivers/gpu/drm/qxl/qxl_display.c @@ -328,6 +328,7 @@ static void qxl_crtc_update_monitors_config(struct drm_crtc *crtc, head.id = i; head.flags = 0; + head.surface_id = 0; oldcount = qdev->monitors_config->count; if (crtc->state->active) { struct drm_display_mode *mode = &crtc->mode; -- 2.30.0

2 1

[git pull] drm fixes for 5.12-rc2
by Dave Airlie 05 Mar '21

05 Mar '21

Hi Linus, More may show up but this is what I have at this staged. These are based on the commit in your tree where the swapfile issue is fixed, and neither of the merged trees are in the bad area. Otherwise just a single nouveau regression fix, and a bunch of amdgpu fixes. Dave. drm-fixes-2021-03-05: drm fixes for 5.12-rc2 amdgpu: - S0ix fix - Handle new NV12 SKU - Misc power fixes - Display uninitialized value fix - PCIE debugfs register access fix nouveau: - regression fix for gk104 The following changes since commit f69d02e37a85645aa90d18cacfff36dba370f797: Merge tag 'misc-5.12-2021-03-02' of git://git.kernel.dk/linux-block (2021-03-02 18:18:17 -0800) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2021-03-05 for you to fetch changes up to a1f1054124936c717a64e47862e3d0d820f67a87: Merge tag 'amd-drm-fixes-5.12-2021-03-03' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes (2021-03-05 11:13:22 +1000) ---------------------------------------------------------------- drm fixes for 5.12-rc2 amdgpu: - S0ix fix - Handle new NV12 SKU - Misc power fixes - Display uninitialized value fix - PCIE debugfs register access fix nouveau: - regression fix for gk104 ---------------------------------------------------------------- Alex Deucher (4): drm/amdgpu: Only check for S0ix if AMD_PMC is configured drm/amdgpu/pm: make unsupported power profile messages debug drm/amdgpu/swsmu/vangogh: Only use RLCPowerNotify msg for disable drm/amdgpu: enable BACO runpm by default on sienna cichlid and navy flounder Asher.Song (1): drm/amdgpu:disable VCN for Navi12 SKU Ben Skeggs (1): drm/nouveau/fifo/gk104-gp1xx: fix creation of sw class Colin Ian King (1): drm/amd/display: fix the return of the uninitialized value in ret Dave Airlie (2): Merge branch '00.00-inst' of git://github.com/skeggsb/linux into drm-fixes Merge tag 'amd-drm-fixes-5.12-2021-03-03' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes Evan Quan (1): drm/amd/pm: correct Arcturus mmTHM_BACO_CNTL register address Kevin Wang (1): drm/amdgpu: fix parameter error of RREG32_PCIE() in amdgpu_regs_pcie drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 4 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 -- drivers/gpu/drm/amd/amdgpu/nv.c | 6 ++++-- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +- drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c | 2 +- drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 15 ++++++++++++--- drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 6 +++--- drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 2 +- drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | 3 +++ 10 files changed, 29 insertions(+), 16 deletions(-)

2 1

[PATCH v3 0/8] Add support for SVM atomics in Nouveau
by Alistair Popple 04 Mar '21

04 Mar '21

This is the third version of a series to add support to Nouveau for atomic memory operations on OpenCL shared virtual memory (SVM) regions. This is achieved using the atomic PTE bits on the GPU to only permit atomic operations to system memory when a page is not mapped in userspace on the CPU. The previous version of this series used an unmap and pin page migration, however this resulted in problems with ZONE_MOVABLE and other issues so this series uses a different approach. Instead exclusive device access is implemented by adding a new swap entry type (SWAP_DEVICE_EXCLUSIVE) which is similar to a migration entry. The main difference is that on fault the original entry is immediately restored by the fault handler instead of waiting. Restoring the entry triggers calls to MMU notifers which allows a device driver to revoke the atomic access permission from the GPU prior to the CPU finalising the entry. Patches 1 & 2 are new for v3 and refactor the existing migration and device private entry functions. Patches 3 & 4 rework try_to_unmap_one() by splitting out unrelated functionality into separate functions - try_to_migrate_one() and try_to_munlock_one(). These should not change any functionality, but any help testing would be much appreciated as I have not been able to test every single usage of try_to_unmap_one(). Patch 5 contains the bulk of the implementation for device exclusive memory. Patch 6 contains some additions to the HMM selftests to ensure everything works as expected and has not changed significantly since v2. Patch 7 was posted previously and has not changed. Patch 8 was posted for v2 and has not changed significantly. This has been tested using the latest upstream Mesa userspace with a simple OpenCL test program which checks the results of atomic GPU operations on a SVM buffer whilst also writing to the same buffer from the CPU. v3: * Refactored some existing functionality. * Switched to using get_user_pages_remote() instead of open-coding it. * Moved code out of hmm. v2: * Changed implementation to use special swap entries instead of device private pages. Alistair Popple (8): mm: Remove special swap entry functions mm/swapops: Rework swap entry manipulation code mm/rmap: Split try_to_munlock from try_to_unmap mm/rmap: Split migration into its own function mm: Device exclusive memory access mm: Selftests for exclusive device memory nouveau/svm: Refactor nouveau_range_fault nouveau/svm: Implement atomic SVM access Documentation/vm/hmm.rst | 15 + arch/s390/mm/pgtable.c | 2 +- drivers/gpu/drm/nouveau/include/nvif/if000c.h | 1 + drivers/gpu/drm/nouveau/nouveau_svm.c | 120 +++- drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h | 1 + .../drm/nouveau/nvkm/subdev/mmu/vmmgp100.c | 6 + fs/proc/task_mmu.c | 23 +- include/linux/rmap.h | 8 +- include/linux/swap.h | 8 +- include/linux/swapops.h | 105 ++-- lib/test_hmm.c | 124 ++++ lib/test_hmm_uapi.h | 2 + mm/debug_vm_pgtable.c | 12 +- mm/hmm.c | 12 +- mm/huge_memory.c | 36 +- mm/hugetlb.c | 10 +- mm/memcontrol.c | 2 +- mm/memory.c | 128 +++- mm/migrate.c | 41 +- mm/mprotect.c | 18 +- mm/page_vma_mapped.c | 15 +- mm/rmap.c | 558 +++++++++++++++--- tools/testing/selftests/vm/hmm-tests.c | 219 +++++++ 23 files changed, 1207 insertions(+), 259 deletions(-) -- 2.20.1

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[PATCH] drm/ttm: ioremap buffer according to TTM mem caching setting
by Oak Zeng 04 Mar '21

04 Mar '21

If tbo.mem.bus.caching is cached, buffer is intended to be mapped as cached from CPU. Map it with ioremap_cache. This wasn't necessary before as device memory was never mapped as cached from CPU side. It becomes necessary for aldebaran as device memory is mapped cached from CPU. Signed-off-by: Oak Zeng <Oak.Zeng(a)amd.com> Reviewed-by: Christian Konig <Christian.Koenig(a)amd.com> --- drivers/gpu/drm/ttm/ttm_bo_util.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index 031e581..296bb20 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -91,6 +91,10 @@ static int ttm_resource_ioremap(struct ttm_device *bdev, if (mem->bus.caching == ttm_write_combined) addr = ioremap_wc(mem->bus.offset, bus_size); +#ifdef CONFIG_X86 + else if (mem->bus.caching == ttm_cached) + addr = ioremap_cache(mem->bus.offset, bus_size); +#endif else addr = ioremap(mem->bus.offset, bus_size); if (!addr) { @@ -372,6 +376,11 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, if (mem->bus.caching == ttm_write_combined) map->virtual = ioremap_wc(bo->mem.bus.offset + offset, size); +#ifdef CONFIG_X86 + else if (mem->bus.caching == ttm_cached) + map->virtual = ioremap_cache(bo->mem.bus.offset + offset, + size); +#endif else map->virtual = ioremap(bo->mem.bus.offset + offset, size); @@ -490,6 +499,11 @@ int ttm_bo_vmap(struct ttm_buffer_object *bo, struct dma_buf_map *map) else if (mem->bus.caching == ttm_write_combined) vaddr_iomem = ioremap_wc(mem->bus.offset, bo->base.size); +#ifdef CONFIG_X86 + else if (mem->bus.caching == ttm_cached) + vaddr_iomem = ioremap_cache(mem->bus.offset, + bo->base.size); +#endif else vaddr_iomem = ioremap(mem->bus.offset, bo->base.size); -- 2.7.4

1 0

[PATCH] drm/ttm: ioremap buffer according to TTM mem caching setting
by Oak Zeng 04 Mar '21

04 Mar '21

If tbo.mem.bus.caching is cached, buffer is intended to be mapped as cached from CPU. Map it with ioremap_cache. This wasn't necessary before as device memory was never mapped as cached from CPU side. It becomes necessary for aldebaran as device memory is mapped cached from CPU. Signed-off-by: Oak Zeng <Oak.Zeng(a)amd.com> Reviewed-by: Christian Konig <Christian.Koenig(a)amd.com> --- drivers/gpu/drm/ttm/ttm_bo_util.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index 031e581..7429464 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -91,6 +91,10 @@ static int ttm_resource_ioremap(struct ttm_device *bdev, if (mem->bus.caching == ttm_write_combined) addr = ioremap_wc(mem->bus.offset, bus_size); +#ifdef CONFIG_X86 + else if (mem->bus.caching == ttm_cached) + addr = ioremap_cache(mem->bus.offset, bus_size); +#endif else addr = ioremap(mem->bus.offset, bus_size); if (!addr) { @@ -372,6 +376,11 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo, if (mem->bus.caching == ttm_write_combined) map->virtual = ioremap_wc(bo->mem.bus.offset + offset, size); +#ifdef CONFIG_X86 + else if (mem->bus.caching == ttm_cached) + map->virtual = ioremap_cache(bo->mem.bus.offset + offset, + size); +#endif else map->virtual = ioremap(bo->mem.bus.offset + offset, size); @@ -490,6 +499,11 @@ int ttm_bo_vmap(struct ttm_buffer_object *bo, struct dma_buf_map *map) else if (mem->bus.caching == ttm_write_combined) vaddr_iomem = ioremap_wc(mem->bus.offset, bo->base.size); + else if (mem->bus.caching == ttm_cached) +#ifdef CONFIG_X86 + vaddr_iomem = ioremap_cache(mem->bus.offset, + bo->base.size); +#endif else vaddr_iomem = ioremap(mem->bus.offset, bo->base.size); -- 2.7.4

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dri-devel March 2021