dri-devel May 2021

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[RFC 00/21] Renesas r8a7795/Salvator-X HDMI output prototype
by Ulrich Hecht 26 Apr '22

26 Apr '22

Hi! This is a prototype of HDMI output support for the Renesas r8a7795 SoC and Salvator-X board. It is based on the renesas-devel-20160516-v4.6 tree and includes the bridge API conversion patches to the adv7511 and rcar-du drivers written by Archit Taneja. The obvious issue with this series is the awkward binding of the dw-hdmi bridge IP, which can be seen in the "drm: rcar-du: Add dw_hdmi driver startup" patch. Any comments on how to implement this interface properly are much appreciated. Functionally, this series works as expected on both connectors, but EDID reading is currently broken. CU Uli Archit Taneja (2): drm: rcar-du: Remove i2c slave encoder interface for hdmi encoder drm: i2c: adv7511: Convert to drm_bridge Koji Matsuoka (12): media: vsp1: Set format to RPF input source drm: bridge/dw_hdmi: Fix R-Car Gen3 device support drm: rcar-du: Add R8A7795 device support drm: rcar-du: Add dw_hdmi driver startup drm: rcar-du: Add DPLL support drm: rcar-du: Fix display registers for R-Car Gen3 drm: rcar-du: Fix VSP plane number per devices drm: rcar-du: Fix VSP feed plane number drm: rcar-du: Add pixel format support drm: rcar-du: Fix display max size to 4096x2160 size arm64: dts: salvator-x: Add DU pins, HDMI connectors and encoder arm64: configs: Enable R-Car DU related config Kuninori Morimoto (1): arm64: defconfig: add VIDEO_RENESAS_FCP Ulrich Hecht (5): v4l: vsp1: Change VSP1 LIF linebuffer FIFO pinctrl: sh-pfc: r8a7795: Add DU support pinctrl: sh-pfc: r8a7795: Add HDMI CEC support arm64: dts: r8a7795: Add HDMI encoder support arm64: dts: r8a7795: add HDMI support to DU Vladimir Zapolskiy (1): drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 107 +++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 33 +- arch/arm64/configs/defconfig | 15 + drivers/gpu/drm/bridge/dw-hdmi.c | 489 +++++++++++++++++++-- drivers/gpu/drm/i2c/adv7511.c | 224 ++++++---- drivers/gpu/drm/rcar-du/Kconfig | 2 + drivers/gpu/drm/rcar-du/Makefile | 3 +- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 97 +++- drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 12 +- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 20 +- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 6 +- drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 12 +- drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 13 +- drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 + drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c | 117 ----- drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h | 31 -- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c | 260 ++++++++--- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 68 ++- drivers/gpu/drm/rcar-du/rcar_du_kms.h | 1 + drivers/gpu/drm/rcar-du/rcar_du_plane.c | 8 +- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 7 +- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 19 + drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 51 ++- drivers/media/platform/vsp1/vsp1_drm.c | 6 + drivers/media/platform/vsp1/vsp1_lif.c | 6 +- drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 113 +++++ include/drm/bridge/dw_hdmi.h | 9 + 27 files changed, 1388 insertions(+), 346 deletions(-) delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h -- 2.7.4

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[Bug 212499] New: nouveau locking issue - WARNING: possible circular locking dependency detected
by bugzilla-daemon＠bugzilla.kernel.org 18 Apr '22

18 Apr '22

https://bugzilla.kernel.org/show_bug.cgi?id=212499 Bug ID: 212499 Summary: nouveau locking issue - WARNING: possible circular locking dependency detected Product: Drivers Version: 2.5 Kernel Version: 5.12-rc5 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: erhard_f(a)mailbox.org CC: dri-devel(a)lists.freedesktop.org Regression: No Created attachment 296155 --> https://bugzilla.kernel.org/attachment.cgi?id=296155&action=edit dmesg (kernel 5.12-rc5, A10-9700E) [...] ====================================================== WARNING: possible circular locking dependency detected 5.12.0-rc5-Excavator #4 Not tainted ------------------------------------------------------ X/593 is trying to acquire lock: ffff95f9110ec518 (&cli->mutex){+.+.}-{3:3}, at: nouveau_bo_move+0x167/0x990 [nouveau] but task is already holding lock: ffff95f8e70281a0 (reservation_ww_class_mutex){+.+.}-{3:3}, at: nouveau_bo_pin+0x3b/0x3c0 [nouveau] which lock already depends on the new lock. the existing dependency chain (in reverse order) is: -> #1 (reservation_ww_class_mutex){+.+.}-{3:3}: __ww_mutex_lock.constprop.0+0x99/0xf20 nouveau_bo_pin+0x3b/0x3c0 [nouveau] nouveau_channel_prep+0x126/0x2f0 [nouveau] nouveau_channel_new+0x5d/0x6b0 [nouveau] nouveau_abi16_ioctl_channel_alloc+0x10d/0x3a0 [nouveau] drm_ioctl_kernel+0xa8/0xf0 [drm] drm_ioctl+0x20a/0x3a0 [drm] nouveau_drm_ioctl+0x50/0xa0 [nouveau] __x64_sys_ioctl+0x81/0xa0 do_syscall_64+0x33/0x40 entry_SYSCALL_64_after_hwframe+0x44/0xae -> #0 (&cli->mutex){+.+.}-{3:3}: __lock_acquire+0x1480/0x2610 lock_acquire+0xc4/0x390 __mutex_lock+0x78/0x870 nouveau_bo_move+0x167/0x990 [nouveau] ttm_bo_handle_move_mem+0x8b/0x170 [ttm] ttm_bo_validate+0x193/0x1f0 [ttm] nouveau_bo_pin+0x177/0x3c0 [nouveau] nv50_wndw_prepare_fb+0x5a/0x4c0 [nouveau] drm_atomic_helper_prepare_planes+0x85/0x110 [drm_kms_helper] nv50_disp_atomic_commit+0xa6/0x1d0 [nouveau] drm_atomic_helper_update_plane+0xe4/0x140 [drm_kms_helper] drm_mode_cursor_universal+0x126/0x230 [drm] drm_mode_cursor_common+0xfc/0x230 [drm] drm_mode_cursor_ioctl+0x46/0x60 [drm] drm_ioctl_kernel+0xa8/0xf0 [drm] drm_ioctl+0x20a/0x3a0 [drm] nouveau_drm_ioctl+0x50/0xa0 [nouveau] __x64_sys_ioctl+0x81/0xa0 do_syscall_64+0x33/0x40 entry_SYSCALL_64_after_hwframe+0x44/0xae other info that might help us debug this: Possible unsafe locking scenario: CPU0 CPU1 ---- ---- lock(reservation_ww_class_mutex); lock(&cli->mutex); lock(reservation_ww_class_mutex); lock(&cli->mutex); *** DEADLOCK *** 3 locks held by X/593: #0: ffffaae9888e7ce0 (crtc_ww_class_acquire){+.+.}-{0:0}, at: drm_mode_cursor_common+0xbb/0x230 [drm] #1: ffff95f9113b0098 (crtc_ww_class_mutex){+.+.}-{3:3}, at: modeset_lock+0x5f/0x1c0 [drm] #2: ffff95f8e70281a0 (reservation_ww_class_mutex){+.+.}-{3:3}, at: nouveau_bo_pin+0x3b/0x3c0 [nouveau] stack backtrace: CPU: 3 PID: 593 Comm: X Not tainted 5.12.0-rc5-Excavator #4 Hardware name: To Be Filled By O.E.M. To Be Filled By O.E.M./A320M-HDV R3.0, BIOS P3.10 06/26/2019 Call Trace: dump_stack+0x7f/0xad check_noncircular+0x104/0x120 ? nvkm_uvmm_mthd+0x778/0x7b0 [nouveau] __lock_acquire+0x1480/0x2610 lock_acquire+0xc4/0x390 ? nouveau_bo_move+0x167/0x990 [nouveau] ? nvif_object_mthd+0x112/0x130 [nouveau] __mutex_lock+0x78/0x870 ? nouveau_bo_move+0x167/0x990 [nouveau] ? nouveau_bo_move+0x167/0x990 [nouveau] nouveau_bo_move+0x167/0x990 [nouveau] ? unmap_mapping_pages+0x59/0x120 ttm_bo_handle_move_mem+0x8b/0x170 [ttm] ttm_bo_validate+0x193/0x1f0 [ttm] ? nouveau_bo_sync_for_device+0x9b/0xe0 [nouveau] nouveau_bo_pin+0x177/0x3c0 [nouveau] nv50_wndw_prepare_fb+0x5a/0x4c0 [nouveau] ? _raw_spin_unlock_irqrestore+0x42/0x50 drm_atomic_helper_prepare_planes+0x85/0x110 [drm_kms_helper] ? lockdep_init_map_type+0x47/0x220 nv50_disp_atomic_commit+0xa6/0x1d0 [nouveau] drm_atomic_helper_update_plane+0xe4/0x140 [drm_kms_helper] drm_mode_cursor_universal+0x126/0x230 [drm] drm_mode_cursor_common+0xfc/0x230 [drm] ? drm_mode_setplane+0x1a0/0x1a0 [drm] drm_mode_cursor_ioctl+0x46/0x60 [drm] drm_ioctl_kernel+0xa8/0xf0 [drm] drm_ioctl+0x20a/0x3a0 [drm] ? drm_mode_setplane+0x1a0/0x1a0 [drm] ? lockdep_hardirqs_on_prepare+0xd4/0x180 ? _raw_spin_unlock_irqrestore+0x42/0x50 nouveau_drm_ioctl+0x50/0xa0 [nouveau] __x64_sys_ioctl+0x81/0xa0 do_syscall_64+0x33/0x40 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7f0621dbecc7 Code: 3c 1c 48 f7 d8 49 39 c4 72 b9 e8 24 ff ff ff 85 c0 78 be 5b 4c 89 e0 5d 41 5c c3 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 71 41 0c 00 f7 d8 64 89 01 48 RSP: 002b:00007ffd8eb88dc8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010 RAX: ffffffffffffffda RBX: 000000000000000c RCX: 00007f0621dbecc7 RDX: 00007ffd8eb88e1c RSI: 00000000c01c64a3 RDI: 000000000000000c RBP: 00000000c01c64a3 R08: 0000000000000040 R09: 0000000000000001 R10: 00007f0622505bc0 R11: 0000000000000246 R12: 000055fbec3f5ec0 R13: 00007ffd8eb88e1c R14: 00000000000003bc R15: 0000000000000218 # lspci -s 04:00.0 -v 04:00.0 VGA compatible controller: NVIDIA Corporation GK208B [GeForce GT 710] (rev a1) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. GT710-4H-SL-2GD5 Flags: bus master, fast devsel, latency 0, IRQ 51, IOMMU group 0 Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Memory at e8000000 (64-bit, prefetchable) [size=128M] Memory at f0000000 (64-bit, prefetchable) [size=32M] I/O ports at e000 [size=128] Expansion ROM at 000c0000 [disabled] [size=128K] Capabilities: [60] Power Management version 3 Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [78] Express Legacy Endpoint, MSI 00 Capabilities: [100] Virtual Channel Capabilities: [128] Power Budgeting <?> Capabilities: [600] Vendor Specific Information: ID=0001 Rev=1 Len=024 <?> Capabilities: [900] Secondary PCI Express Kernel driver in use: nouveau Kernel modules: nouveau -- You may reply to this email to add a comment. You are receiving this mail because: You are on the CC list for the bug. You are watching the assignee of the bug.

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[Bug 212635] New: nouveau 0000:04:00.0: fifo: fault 00 [READ] at 0000000000380000 engine 00 [GR] client 14 [HUB/SCC] reason 02 [PTE] on channel 5 [007fabf000 X[570]]
by bugzilla-daemon＠bugzilla.kernel.org 18 Apr '22

18 Apr '22

https://bugzilla.kernel.org/show_bug.cgi?id=212635 Bug ID: 212635 Summary: nouveau 0000:04:00.0: fifo: fault 00 [READ] at 0000000000380000 engine 00 [GR] client 14 [HUB/SCC] reason 02 [PTE] on channel 5 [007fabf000 X[570]] Product: Drivers Version: 2.5 Kernel Version: 5.11.12 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: erhard_f(a)mailbox.org Regression: No Created attachment 296315 --> https://bugzilla.kernel.org/attachment.cgi?id=296315&action=edit dmesg (kernel 5.11.12) Happened during browsing on Firefox, WebGL conformance tests were running in the background (https://www.khronos.org/registry/webgl/sdk/tests/webgl-conformance-tests.ht…). The screen went blank, but I got to desktop back again and the machine stayed usable. [...] nouveau 0000:04:00.0: fifo: fault 00 [READ] at 0000000000380000 engine 00 [GR] client 14 [HUB/SCC] reason 02 [PTE] on channel 5 [007fabf000 X[570]] nouveau 0000:04:00.0: fifo: channel 5: killed nouveau 0000:04:00.0: fifo: runlist 0: scheduled for recovery nouveau 0000:04:00.0: fifo: engine 0: scheduled for recovery nouveau 0000:04:00.0: X[570]: channel 5 killed! nouveau 0000:04:00.0: fifo: fault 00 [READ] at 0000000000380000 engine 00 [GR] client 14 [HUB/SCC] reason 02 [PTE] on channel 5 [007fabf000 X[570]] nouveau 0000:04:00.0: fifo: channel 5: killed nouveau 0000:04:00.0: fifo: runlist 0: scheduled for recovery nouveau 0000:04:00.0: fifo: engine 0: scheduled for recovery nouveau 0000:04:00.0: X[570]: channel 5 killed! nouveau 0000:04:00.0: fifo: fault 00 [READ] at 0000000000380000 engine 00 [GR] client 14 [HUB/SCC] reason 02 [PTE] on channel 5 [007fabf000 X[570]] nouveau 0000:04:00.0: fifo: channel 5: killed nouveau 0000:04:00.0: fifo: runlist 0: scheduled for recovery nouveau 0000:04:00.0: fifo: engine 0: scheduled for recovery nouveau 0000:04:00.0: X[570]: channel 5 killed! nouveau 0000:04:00.0: fifo: fault 00 [READ] at 0000000000380000 engine 00 [GR] client 14 [HUB/SCC] reason 02 [PTE] on channel 5 [007fabf000 X[570]] nouveau 0000:04:00.0: fifo: channel 5: killed nouveau 0000:04:00.0: fifo: runlist 0: scheduled for recovery nouveau 0000:04:00.0: fifo: engine 0: scheduled for recovery nouveau 0000:04:00.0: X[570]: channel 5 killed! # inxi -b System: Kernel: 5.11.12-gentoo-Excavator x86_64 bits: 64 Desktop: MATE 1.24.0 Distro: Gentoo Base System release 2.7 Machine: Type: Desktop Mobo: ASRock model: A320M-HDV R3.0 serial: M80-BA024200938 UEFI: American Megatrends v: P3.10 date: 06/26/2019 CPU: Info: Quad Core AMD A10-9700E RADEON R7 10 COMPUTE CORES 4C+6G [MCP] speed: 3300 MHz min/max: 800/3000 MHz Graphics: Device-1: NVIDIA GK208B [GeForce GT 710] driver: nouveau v: kernel Display: x11 server: X.Org 1.20.10 driver: modesetting resolution: 1920x1080~60Hz OpenGL: renderer: NV106 v: 4.3 Mesa 20.3.5 Network: Device-1: Realtek RTL8111/8168/8411 PCI Express Gigabit Ethernet driver: r8169 # lspci 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Root Complex 00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) I/O Memory Management Unit 00:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Host Bridge 00:02.4 PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Root Port 00:02.5 PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Root Port 00:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Host Bridge 00:03.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Root Port 00:08.0 Encryption controller: Advanced Micro Devices, Inc. [AMD] Carrizo Platform Security Processor 00:09.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Carrizo Audio Dummy Host Bridge 00:09.2 Audio device: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Audio Controller 00:10.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller (rev 20) 00:11.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 49) 00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 49) 00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 4a) 00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 11) 00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Function 0 00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Function 1 00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Function 2 00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Function 3 00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Function 4 00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) Processor Function 5 01:00.0 USB controller: Advanced Micro Devices, Inc. [AMD] Device 43bc (rev 02) 01:00.1 SATA controller: Advanced Micro Devices, Inc. [AMD] Device 43b8 (rev 02) 01:00.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 43b3 (rev 02) 02:04.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 02:06.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 02:07.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] 300 Series Chipset PCIe Port (rev 02) 04:00.0 VGA compatible controller: NVIDIA Corporation GK208B [GeForce GT 710] (rev a1) 04:00.1 Audio device: NVIDIA Corporation GK208 HDMI/DP Audio Controller (rev a1) 05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 15) 06:00.0 Non-Volatile memory controller: Sandisk Corp WD Black 2019/PC SN750 NVMe SSD 07:00.0 USB controller: ASMedia Technology Inc. ASM2142 USB 3.1 Host Controller -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

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[PATCH v5 1/2] dt-bindings: Add DT schema for Arm Mali Valhall GPU
by Nick Fan 14 Apr '22

14 Apr '22

Add devicetree schema for Arm Mali Valhall GPU Define a compatible string for the Mali Valhall GPU for Mediatek's SoC platform. Signed-off-by: Nick Fan <Nick.Fan(a)mediatek.com> --- .../bindings/gpu/arm,mali-valhall.yaml | 217 ++++++++++++++++++ 1 file changed, 217 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml new file mode 100644 index 000000000000..275c14ad173a --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall.yaml @@ -0,0 +1,217 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2020 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-valhall.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Valhall GPU + +maintainers: + - Rob Herring <robh(a)kernel.org> + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + + compatible: + items: + - enum: + - mediatek,mt8192-mali + - const: arm,mali-valhall + + reg: + maxItems: 1 + + interrupts: + items: + - description: GPU interrupt + - description: MMU interrupt + - description: Job interrupt + + interrupt-names: + items: + - const: gpu + - const: mmu + - const: job + + clocks: + minItems: 1 + + power-domains: + minItems: 1 + maxItems: 5 + + mali-supply: true + sram-supply: true + + operating-points-v2: true + opp_table: true + + "#cooling-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8192-mali + then: + properties: + power-domains: + minItems: 5 + maxItems: 5 + + power-domain-names: + items: + - const: core0 + - const: core1 + - const: core2 + - const: core3 + - const: core4 + + required: + - sram-supply + - power-domains + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gpu@13000000 { + compatible = "mediatek,mt8192-mali", "arm,mali-valhall"; + reg = <0x13000000 0x4000>; + interrupts = + <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = + "gpu", + "mmu", + "job"; + + clocks = <&mfgcfg 0>; + + power-domains = + <&spm 4>, + <&spm 5>, + <&spm 6>, + <&spm 7>, + <&spm 8>; + + operating-points-v2 = <&gpu_opp_table>; + mali-supply = <&mt6315_7_vbuck1>; + sram-supply = <&mt6359_vsram_others_ldo_reg>; + gpu_opp_table: opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp-358000000 { + opp-hz = /bits/ 64 <358000000>; + opp-microvolt = <606250>, + <750000>; + }; + + opp-399000000 { + opp-hz = /bits/ 64 <399000000>; + opp-microvolt = <618750>, + <750000>; + }; + + opp-440000000 { + opp-hz = /bits/ 64 <440000000>; + opp-microvolt = <631250>, + <750000>; + }; + + opp-482000000 { + opp-hz = /bits/ 64 <482000000>; + opp-microvolt = <643750>, + <750000>; + }; + + opp-523000000 { + opp-hz = /bits/ 64 <523000000>; + opp-microvolt = <656250>, + <750000>; + }; + + opp-564000000 { + opp-hz = /bits/ 64 <564000000>; + opp-microvolt = <668750>, + <750000>; + }; + + opp-605000000 { + opp-hz = /bits/ 64 <605000000>; + opp-microvolt = <681250>, + <750000>; + }; + + opp-647000000 { + opp-hz = /bits/ 64 <647000000>; + opp-microvolt = <693750>, + <750000>; + }; + + opp-688000000 { + opp-hz = /bits/ 64 <688000000>; + opp-microvolt = <706250>, + <750000>; + }; + + opp-724000000 { + opp-hz = /bits/ 64 <724000000>; + opp-microvolt = <725000>, + <750000>; + }; + + opp-760000000 { + opp-hz = /bits/ 64 <760000000>; + opp-microvolt = <743750>, + <750000>; + }; + + opp-795000000 { + opp-hz = /bits/ 64 <795000000>; + opp-microvolt = <762500>, + <762500>; + }; + + opp-831000000 { + opp-hz = /bits/ 64 <831000000>; + opp-microvolt = <781250>, + <781250>; + }; + + opp-855000000 { + opp-hz = /bits/ 64 <855000000>; + opp-microvolt = <793750>, + <793750>; + }; + + opp-902000000 { + opp-hz = /bits/ 64 <902000000>; + opp-microvolt = <818750>, + <818750>; + }; + + opp-950000000 { + opp-hz = /bits/ 64 <950000000>; + opp-microvolt = <843750>, + <843750>; + }; + }; + }; +... -- 2.18.0

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[Bug 211425] New: [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 20secs aborting
by bugzilla-daemon＠bugzilla.kernel.org 11 Apr '22

11 Apr '22

https://bugzilla.kernel.org/show_bug.cgi?id=211425 Bug ID: 211425 Summary: [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 20secs aborting Product: Drivers Version: 2.5 Kernel Version: 5.10.10 Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: high Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: icedragon.aw(a)web.de Regression: No Reproducible: Every times when I switched my monitor off and on again, then my screen keeps black for round about a minute - the DP port seem to be in a kind of suspend state. After a minute I can try to switch my monitor off and on again or switching between the linux consoles, then my screen comes back. If I try this earlier than after a minute I get no success. My dmesg output shows the following errors (triggered by this event): [Di Jan 26 12:59:17 2021] [drm] amdgpu_dm_irq_schedule_work FAILED src 2 [Di Jan 26 12:59:19 2021] [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 20secs aborting [Di Jan 26 12:59:19 2021] [drm:amdgpu_atom_execute_table_locked] *ERROR* atombios stuck executing B200 (len 3615, WS 8, PS 0) @ 0xB34E [Di Jan 26 12:59:19 2021] [drm:amdgpu_atom_execute_table_locked] *ERROR* atombios stuck executing B0F4 (len 268, WS 4, PS 0) @ 0xB147 [Di Jan 26 12:59:19 2021] [drm:dcn10_link_encoder_enable_dp_output] *ERROR* dcn10_link_encoder_enable_dp_output: Failed to execute VBIOS command table! [Di Jan 26 12:59:41 2021] [drm:atom_op_jump] *ERROR* atombios stuck in loop for more than 20secs aborting [Di Jan 26 12:59:41 2021] [drm:amdgpu_atom_execute_table_locked] *ERROR* atombios stuck executing B200 (len 3615, WS 8, PS 0) @ 0xB6EA [Di Jan 26 12:59:41 2021] [drm:amdgpu_atom_execute_table_locked] *ERROR* atombios stuck executing B0F4 (len 268, WS 4, PS 0) @ 0xB147 [Di Jan 26 12:59:41 2021] [drm:dcn10_link_encoder_enable_dp_output] *ERROR* dcn10_link_encoder_enable_dp_output: Failed to execute VBIOS command table! [Di Jan 26 12:59:42 2021] [drm] amdgpu_dm_irq_schedule_work FAILED src 2 I observe such issues with switching monitor off and on again at least since 5.10.4 - I have not tested this with an older kernel version, because at this time of 5.10.4 I changed my system from an intel processor to this AMD system: System: Kubuntu 20.10, Ryzon 7 PRO 4750G - using only integrated GPU (Vega10): Jan 24 17:41:38 localhost kernel: [ 0.000000] Linux version 5.10.10-aw (root@icehome) (gcc (Ubuntu 10.2.0-13ubuntu1) 10.2.0, GNU ld (GNU Binutils for Ubuntu) 2.35.1) #1 SMP PREEMPT Sun Jan 24 17:36:28 CET 2021 Jan 24 17:41:38 localhost kernel: [ 0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-5.10.10-aw root=UUID=6ff371aa-4315-475d-b8ec-b0a642c9eb5b ro nosplash video=1920x1080 Jan 24 17:41:38 localhost kernel: [ 0.000000] KERNEL supported cpus: Jan 24 17:41:38 localhost kernel: [ 0.000000] AMD AuthenticAMD ... -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

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[Bug 211807] New: [drm:drm_dp_mst_dpcd_read] *ERROR* mstb 000000004e6288dd port 3: DPCD read on addr 0x60 for 1 bytes NAKed
by bugzilla-daemon＠bugzilla.kernel.org 07 Apr '22

07 Apr '22

https://bugzilla.kernel.org/show_bug.cgi?id=211807 Bug ID: 211807 Summary: [drm:drm_dp_mst_dpcd_read] *ERROR* mstb 000000004e6288dd port 3: DPCD read on addr 0x60 for 1 bytes NAKed Product: Drivers Version: 2.5 Kernel Version: 5.10.16 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: low Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: kernelbugs(a)equaeghe.nospammail.net Regression: No In my logs, I see the following error: [drm:drm_dp_mst_dpcd_read] *ERROR* mstb 000000004e6288dd port 3: DPCD read on addr 0x60 for 1 bytes NAKed It has not caused any detected issues, but I guess that if the kernel complains this loudy, it is good to report it. This is on a laptop with a Ryzen Pro 4750U APU. I custom-build the kernel, so do not hesitate to request changing some config options to investigate. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

2 21

[PATCH] drm: sti: fix spelling mistake: rejec -> rejection
by Colin King 07 Apr '22

07 Apr '22

From: Colin Ian King <colin.king(a)canonical.com> In other places of the driver the string hdmi_rejection_pll is used instead of the truncated hdmi_rejec_pll, so use this string instead to be consistent. Signed-off-by: Colin Ian King <colin.king(a)canonical.com> --- drivers/gpu/drm/sti/sti_hdmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sti/sti_hdmi.c b/drivers/gpu/drm/sti/sti_hdmi.c index 814560ead4e1..e2018e4a3ec5 100644 --- a/drivers/gpu/drm/sti/sti_hdmi.c +++ b/drivers/gpu/drm/sti/sti_hdmi.c @@ -886,7 +886,7 @@ static void sti_hdmi_pre_enable(struct drm_bridge *bridge) if (clk_prepare_enable(hdmi->clk_tmds)) DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n"); if (clk_prepare_enable(hdmi->clk_phy)) - DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n"); + DRM_ERROR("Failed to prepare/enable hdmi_rejection_pll clk\n"); hdmi->enabled = true; -- 2.20.1

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[PATCH v5 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
by Liu Ying 27 Mar '22

27 Mar '22

Hi, This series adds i.MX8qxp LVDS PHY mode support for the Mixel PHY in the Freescale i.MX8qxp SoC. The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp SCU firmware. The PHY driver would call a SCU function to configure the mode. The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC, where it appears to be a single MIPI DPHY. Patch 1/5 sets PHY mode in the Northwest Logic MIPI DSI host controller bridge driver, since i.MX8qxp SoC embeds this controller IP to support MIPI DSI displays together with the Mixel PHY. Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions and through a custom structure added to the generic PHY configuration union. Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema. Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC. Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver. Welcome comments, thanks. v4->v5: * Align kernel-doc style of include/linux/phy/phy-lvds.h to include/linux/phy/phy.h for patch 2/5. (Vinod) * Trivial tweaks on patch 2/5. * Drop Robert's R-b tag on patch 2/5. v3->v4: * Add all R-b tags received from v3 on relevant patches and respin. (Robert) v2->v3: * Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido) * Improve the 'clock-names' property in the PHY dt binding. v1->v2: * Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido) * Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido) * Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver. Liu Ying (5): drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_enable() phy: Add LVDS configuration options dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support .../devicetree/bindings/phy/mixel,mipi-dsi-phy.txt | 29 --- .../bindings/phy/mixel,mipi-dsi-phy.yaml | 107 ++++++++ drivers/gpu/drm/bridge/nwl-dsi.c | 6 + drivers/phy/freescale/phy-fsl-imx8-mipi-dphy.c | 269 ++++++++++++++++++++- include/linux/phy/phy-lvds.h | 32 +++ include/linux/phy/phy.h | 4 + 6 files changed, 407 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml create mode 100644 include/linux/phy/phy-lvds.h -- 2.7.4

2 9

[RFC PATCH 00/11] drm/bridge: ti-sn65dsi86: Support DisplayPort mode
by Laurent Pinchart 04 Mar '22

04 Mar '22

Hello, Despite the SN65DSI86 being a DSI to eDP bridge, it can also operate in DisplayPort mode. This patch series adds support for this feature to the ti-sn65dsi86 driver. The series starts with miscellaneous fixes and improvements in patch 01/11 to 04/11. Patch 05/11 then moves to the panel-bridge helper, and is followed by patches 06/11 and 07/11 that refactor the code to prepare for the next steps. As my goal is to use the sn65dsi86 with the R-Car DU driver, which requires DRM_BRIDGE_ATTACH_NO_CONNECTOR support, the series continues with support for this feature. In patch 08/11 the bridge connector operations are added, and in 09/11 the connector creation is made optional. Patch 10/11 then implements supports for DisplayPort mode, enabled automatically when the next component in the pipeline isn't a panel. Finally, patch 11/11 adds hotplug detection support, which isn't very useful for eDP, but is needed for DisplayPort. This series is an RFC as I haven't been able to test it fully yet. The platform I'm working on is missing support for three other components in the display pipeline (I'm on it), which are required in order to run tests. I would however like to receive feedback on the approach already, in case problems would need to be solved. Laurent Pinchart (11): dt-bindings: drm/bridge: ti-sn65dsi8: Make enable GPIO optional drm/bridge: ti-sn65dsi86: Make enable GPIO optional drm/bridge: ti-sn65dsi86: Unregister AUX adapter in remove() drm/bridge: ti-sn65dsi86: Use bitmask to store valid rates drm/bridge: ti-sn65dsi86: Wrap panel with panel-bridge drm/bridge: ti-sn65dsi86: Group code in sections drm/bridge: ti-sn65dsi86: Split connector creation to a function drm/bridge: ti-sn65dsi86: Implement bridge connector operations drm/bridge: ti-sn65dsi86: Make connector creation optional drm/bridge: ti-sn65dsi86: Support DisplayPort (non-eDP) mode drm/bridge: ti-sn65dsi86: Support hotplug detection .../bindings/display/bridge/ti,sn65dsi86.yaml | 1 - drivers/gpu/drm/bridge/ti-sn65dsi86.c | 266 ++++++++++++------ 2 files changed, 183 insertions(+), 84 deletions(-) -- Regards, Laurent Pinchart

8 55

[PATCH v3 RESEND 00/24] drm/exynos: add support for GSCALER planes on Exynos5433
by Andrzej Hajda 03 Mar '22

03 Mar '22

Hi Inki, GSCALERs in Exynos SoCs support conversion between wide range of image formats, plus scaling and rotation. Driver already supports mem2mem mode - via ExynosDRM IPP framework. This patchset adds support for mem to display mode - framebuffers can be converted, scaled and send directly to Display Controller. From DRM framework's point of view every GSCALER exposes drm_plane which can be connected to display controller (display panel or TV). The feature is not well documented so the development was quite difficult - a process of trial and error, vendor code analysis, guessing from datasheets. Hopefully most of the issues were solved. I have developed and tested it on TM2 device with panel and TV paths. The patchset contains three parts: 1. Preparatory patches - mostly cleanup and refactoring of drm_crtc and drm_plane related structures, to allow usage of planes which are not physically bound to crtcs (01-13). 2. Adding local path support to GSCALER and DECON (14-20). 3. Few fixes of bugs existing already in the code but discovered due to added local path support (21-23). The patchset is based on exynos_drm_next plus my patchset adding zpos to DECON and FIMD - 'drm/exynos: add support for dynamic zpos in DECON and FIMD' - it is required to allow set z-pos position of GSCALER planes. To simplify tests I have also created branch containing all required patches: Repo: https://git.tizen.org/cgit/platform/kernel/linux-exynos Branch: sandbox/ahajda/dev/exynos-drm-local-path This is v2 version of the patchset. In this version I have moved code setting cursor plane in crtc to separate patch together with code disabling fast cursor updates - hardware does not support it. To keep bisectability DTS patches should be applied before subsequent ones. It is rebased on today's exynos-drm-next. Please be aware that DTS patches has been already applied to samsung-soc tree, I left them here to simplify testing on exynos-drm-next, which is not in sync with samsung-soc, for this reason I have moved them on the beginning of the patchset. Regards Andrzej Andrzej Hajda (24): arm64: dts: exynos: configure GSCALER related clocks arm64: dts: exynos: add DSD/GSD clocks to DECONs and GSCALERs drm/exynos: remove exynos_drm_plane.h header drm/exynos: remove spare macro drm/exynos: drop exynos_drm_plane_config structure drm/exynos: add exynos_drm_crtc_init function drm/exynos/decon5433: embed exynos_drm_crtc directly into context drm/exynos/decon7: embed exynos_drm_crtc directly into context drm/exynos/fimd: embed exynos_drm_crtc directly into context drm/exynos/mixer: embed exynos_drm_crtc directly into context drm/exynos/vidi: embed exynos_drm_crtc directly into context drm/exynos: remove standalone exynos_drm_crtc leftovers drm/exynos/vidi: remove encoder_to_vidi helper drm/exynos: unify plane type assignment drm/exynos: set primary plane in exynos_drm_crtc_init drm/exynos: set cursor plane in exynos_drm_crtc_init drm/exynos: add plane update/disable callbacks for planes drm/exynos: add GSCALER plane capability drm/exynos/gscaler: fix id assignement drm/exynos/gscaler: add local path support drm/exynos/decon5433: add local path support drm/exynos/decon5433: wait for finish previous update drm/exynos/gscaler: change supported color format BGRX8888 to XBGR8888 drm/exynos/gscaler: fix handling YVU420 pixel format .../dts/exynos/exynos5433-tm2-common.dtsi | 6 + arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 6 +- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 25 +- drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 162 ++++++++----- drivers/gpu/drm/exynos/exynos7_drm_decon.c | 66 +++-- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 46 ++-- drivers/gpu/drm/exynos/exynos_drm_crtc.h | 7 +- drivers/gpu/drm/exynos/exynos_drm_drv.c | 1 - drivers/gpu/drm/exynos/exynos_drm_drv.h | 50 ++-- drivers/gpu/drm/exynos/exynos_drm_fb.c | 10 +- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 85 +++---- drivers/gpu/drm/exynos/exynos_drm_gsc.c | 229 ++++++++++++++---- drivers/gpu/drm/exynos/exynos_drm_plane.c | 84 ++++--- drivers/gpu/drm/exynos/exynos_drm_plane.h | 14 -- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 48 ++-- drivers/gpu/drm/exynos/exynos_mixer.c | 95 +++----- drivers/gpu/drm/exynos/regs-decon5433.h | 6 + drivers/gpu/drm/exynos/regs-gsc.h | 6 + 18 files changed, 538 insertions(+), 408 deletions(-) delete mode 100644 drivers/gpu/drm/exynos/exynos_drm_plane.h -- 2.17.1

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dri-devel May 2021