dri-devel July 2021

dri-devel@lists.freedesktop.org

321 participants
829 discussions

[PATCH 0/1] Increase timeout in i915_gem_contexts selftests
by Matthew Brost 19 Aug '21

19 Aug '21

Patch says it all. Seeing a failure in CI [1] and locally on certain TGL machines with GuC submission enabled. Let's fix this so we can enable CI on TGL with GuC submission. Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> [1] https://patchwork.freedesktop.org/series/92984/#rev4 Matthew Brost (1): drm/i915/selftests: Increase timeout in i915_gem_contexts selftests drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.28.0

2 2

[PATCH] drm/stm: ltdc: improve pm_runtime to stop clocks
by Raphael GALLAIS-POU - foss 19 Aug '21

19 Aug '21

Bugzilla ticket: https://intbugzilla.st.com/show_bug.cgi?id=60620 Gerrit patch: https://gerrit.st.com/c/mpu/oe/st/linux-stm32/+/208093/ In the LTDC driver, pm_runtime_get_sync was wrongly used and caused the LTDC pixel clock to be systematically enabled in the clock summary. After one simple use of the LTDC by activating and deactivating, the clock summary results as below: ~# cat /sys/kernel/debug/clk/clk_summary | grep ltdc ltdc_px 1 1 0 29700000 0 0 50000 N ltdc 0 0 0 133250000 0 0 50000 N By doing so, pm_runtime_get_sync only increments the clock counter when the driver was in not active, displaying the right information when the LTDC is not in use, resulting of the below clock summary after deactivation of the LTDC. ~# cat /sys/kernel/debug/clk/clk_summary | grep ltdc ltdc_px 0 0 0 29700000 0 0 50000 N ltdc 0 0 0 133250000 0 0 50000 N The clocks are activated either by the crtc_set_nofb function or by the crtc_atomic_enable function. A check of pm_runtime activity must be done before set clocks on. This check must also be done for others functions which access registers. Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou(a)foss.st.com> --- drivers/gpu/drm/stm/ltdc.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 08b71248044d..bf9d18023698 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -425,10 +425,17 @@ static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc, { struct ltdc_device *ldev = crtc_to_ltdc(crtc); struct drm_device *ddev = crtc->dev; + int ret; DRM_DEBUG_DRIVER("\n"); - pm_runtime_get_sync(ddev->dev); + if (!pm_runtime_active(ddev->dev)) { + ret = pm_runtime_get_sync(ddev->dev); + if (ret) { + DRM_ERROR("Failed to set mode, cannot get sync\n"); + return; + } + } /* Sets the background color value */ reg_write(ldev->regs, LTDC_BCCR, BCCR_BCBLACK); @@ -783,6 +790,7 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane, struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, plane); struct drm_framebuffer *fb = newstate->fb; + struct drm_device *ddev = plane->dev; u32 lofs = plane->index * LAY_OFS; u32 x0 = newstate->crtc_x; u32 x1 = newstate->crtc_x + newstate->crtc_w - 1; @@ -792,6 +800,11 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane, u32 val, pitch_in_bytes, line_length, paddr, ahbp, avbp, bpcr; enum ltdc_pix_fmt pf; + if (!pm_runtime_active(ddev->dev)) { + DRM_DEBUG_DRIVER("crtc not activated"); + return; + } + if (!newstate->crtc || !fb) { DRM_DEBUG_DRIVER("fb or crtc NULL"); return; @@ -897,8 +910,14 @@ static void ltdc_plane_atomic_disable(struct drm_plane *plane, struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, plane); struct ltdc_device *ldev = plane_to_ltdc(plane); + struct drm_device *ddev = plane->dev; u32 lofs = plane->index * LAY_OFS; + if (!pm_runtime_active(ddev->dev)) { + DRM_DEBUG_DRIVER("crtc already deactivated"); + return; + } + /* disable layer */ reg_clear(ldev->regs, LTDC_L1CR + lofs, LXCR_LEN); -- 2.24.3

4 6

[PATCH] backlight: pwm_bl: Improve bootloader/kernel device handover
by Daniel Thompson 19 Aug '21

19 Aug '21

Currently there are (at least) two problems in the way pwm_bl starts managing the enable_gpio pin. Both occur when the backlight is initially off and the driver finds the pin not already in output mode and, as a result, unconditionally switches it to output-mode and asserts the signal. Problem 1: This could cause the backlight to flicker since, at this stage in driver initialisation, we have no idea what the PWM and regulator are doing (an unconfigured PWM could easily "rest" at 100% duty cycle). Problem 2: This will cause us not to correctly honour the post_pwm_on_delay (which also risks flickers). Fix this by moving the code to configure the GPIO output mode until after we have examines the handover state. That allows us to initialize enable_gpio to off if the backlight is currently off and on if the backlight is on. Reported-by: Marek Vasut <marex(a)denx.de> Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org> Cc: stable(a)vger.kernel.org Acked-by: Marek Vasut <marex(a)denx.de> Tested-by: Marek Vasut <marex(a)denx.de> --- drivers/video/backlight/pwm_bl.c | 54 +++++++++++++++++--------------- 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c index e48fded3e414..8d8959a70e44 100644 --- a/drivers/video/backlight/pwm_bl.c +++ b/drivers/video/backlight/pwm_bl.c @@ -409,6 +409,33 @@ static bool pwm_backlight_is_linear(struct platform_pwm_backlight_data *data) static int pwm_backlight_initial_power_state(const struct pwm_bl_data *pb) { struct device_node *node = pb->dev->of_node; + bool active = true; + + /* + * If the enable GPIO is present, observable (either as input + * or output) and off then the backlight is not currently active. + * */ + if (pb->enable_gpio && gpiod_get_value_cansleep(pb->enable_gpio) == 0) + active = false; + + if (!regulator_is_enabled(pb->power_supply)) + active = false; + + if (!pwm_is_enabled(pb->pwm)) + active = false; + + /* + * Synchronize the enable_gpio with the observed state of the + * hardware. + */ + if (pb->enable_gpio) + gpiod_direction_output(pb->enable_gpio, active); + + /* + * Do not change pb->enabled here! pb->enabled essentially + * tells us if we own one of the regulator's use counts and + * right now we do not. + */ /* Not booted with device tree or no phandle link to the node */ if (!node || !node->phandle) @@ -420,20 +447,7 @@ static int pwm_backlight_initial_power_state(const struct pwm_bl_data *pb) * assume that another driver will enable the backlight at the * appropriate time. Therefore, if it is disabled, keep it so. */ - - /* if the enable GPIO is disabled, do not enable the backlight */ - if (pb->enable_gpio && gpiod_get_value_cansleep(pb->enable_gpio) == 0) - return FB_BLANK_POWERDOWN; - - /* The regulator is disabled, do not enable the backlight */ - if (!regulator_is_enabled(pb->power_supply)) - return FB_BLANK_POWERDOWN; - - /* The PWM is disabled, keep it like this */ - if (!pwm_is_enabled(pb->pwm)) - return FB_BLANK_POWERDOWN; - - return FB_BLANK_UNBLANK; + return active ? FB_BLANK_UNBLANK: FB_BLANK_POWERDOWN; } static int pwm_backlight_probe(struct platform_device *pdev) @@ -486,18 +500,6 @@ static int pwm_backlight_probe(struct platform_device *pdev) goto err_alloc; } - /* - * If the GPIO is not known to be already configured as output, that - * is, if gpiod_get_direction returns either 1 or -EINVAL, change the - * direction to output and set the GPIO as active. - * Do not force the GPIO to active when it was already output as it - * could cause backlight flickering or we would enable the backlight too - * early. Leave the decision of the initial backlight state for later. - */ - if (pb->enable_gpio && - gpiod_get_direction(pb->enable_gpio) != 0) - gpiod_direction_output(pb->enable_gpio, 1); - pb->power_supply = devm_regulator_get(&pdev->dev, "power"); if (IS_ERR(pb->power_supply)) { ret = PTR_ERR(pb->power_supply); base-commit: 2734d6c1b1a089fb593ef6a23d4b70903526fe0c -- 2.30.2

2 3

[PATCH 0/4] drm/i915/guc: Improve CTB error handling
by Michal Wajdeczko 19 Aug '21

19 Aug '21

There was a gap in handling MMIO result from CTB (de)registration and while fixing it improve some other error reports. Signed-off-by: Michal Wajdeczko <michal.wajdeczko(a)intel.com> Michal Wajdeczko (4): drm/i915/guc: Verify result from CTB (de)register action drm/i915/guc: Print error name on CTB (de)registration failure drm/i915/guc: Print error name on CTB send failure drm/i915/guc: Move and improve error message for missed CTB reply drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 30 ++++++++++++++--------- 1 file changed, 18 insertions(+), 12 deletions(-) -- 2.25.1

2 12

[PATCH] drm/dp: follow DP link CTS spec to read link status back
by Lee Shawn C 19 Aug '21

19 Aug '21

Refer to DP link CTS 1.2/1.4 spec, the following test case request source read DPCD 200h - 205h to get latest link status from sink. (4.3.2.4) Handling of IRQ HPD Pulse with No Error Status Bits Set (400.3.2.1) Successful Link Re-training After IRQ HPD Pulse Due to Loss of Symbol Lock: HBR2 Extension (400.3.2.2) Successful Link Re-training After IRQ HPD Pulse Due to Loss of Clock Recovery Lock: HBR2 Extension (400.3.2.3) Successful Link Re-training After IRQ HPD Pulse Due to Loss of Inter-lane Alignment Lock: HBR2 Extension So far, DRM DP driver just read back the link status from 202h to 207h. DPR-120 would judge source can't pass these cases and shows below error messages. "Test FAILED, Source DUT does not read DPCD registers 200h-205h within 100 ms". Cc: Jani Nikula <jani.nikula(a)intel.com> Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Cc: Lyude Paul <lyude(a)redhat.com> Cc: Cooper Chiou <cooper.chiou(a)intel.com> Cc: William Tseng <william.tseng(a)intel.com> Signed-off-by: Lee Shawn C <shawn.c.lee(a)intel.com> --- drivers/gpu/drm/drm_dp_helper.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 24bbc710c825..2b4d1f498ce3 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -410,17 +410,19 @@ int drm_dp_dpcd_read_phy_link_status(struct drm_dp_aux *aux, u8 link_status[DP_LINK_STATUS_SIZE]) { int ret; + u8 full_link_stat[DP_LINK_STATUS_SIZE + 2]; if (dp_phy == DP_PHY_DPRX) { ret = drm_dp_dpcd_read(aux, - DP_LANE0_1_STATUS, - link_status, - DP_LINK_STATUS_SIZE); + DP_SINK_COUNT, + full_link_stat, + DP_LINK_STATUS_SIZE + 2); if (ret < 0) return ret; - WARN_ON(ret != DP_LINK_STATUS_SIZE); + memcpy(link_status, full_link_stat + 2, DP_LINK_STATUS_SIZE); + WARN_ON(ret != DP_LINK_STATUS_SIZE + 2); return 0; } -- 2.17.1

4 7

[PATCH] drm/msm/dpu: add support for alpha blending properties
by Dmitry Baryshkov 18 Aug '21

18 Aug '21

Add support for alpha blending properties. Setup the plane blend state according to those properties. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 43 ++++++++++++++++------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 10 ++++-- 2 files changed, 37 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 9a5c70c87cc8..768012243b44 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -30,12 +30,6 @@ #include "dpu_core_perf.h" #include "dpu_trace.h" -#define DPU_DRM_BLEND_OP_NOT_DEFINED 0 -#define DPU_DRM_BLEND_OP_OPAQUE 1 -#define DPU_DRM_BLEND_OP_PREMULTIPLIED 2 -#define DPU_DRM_BLEND_OP_COVERAGE 3 -#define DPU_DRM_BLEND_OP_MAX 4 - /* layer mixer index on dpu_crtc */ #define LEFT_MIXER 0 #define RIGHT_MIXER 1 @@ -146,20 +140,43 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer, { struct dpu_hw_mixer *lm = mixer->hw_lm; uint32_t blend_op; + uint32_t fg_alpha, bg_alpha; - /* default to opaque blending */ - blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | - DPU_BLEND_BG_ALPHA_BG_CONST; + fg_alpha = pstate->base.alpha >> 8; + bg_alpha = 0xff - fg_alpha; - if (format->alpha_enable) { + /* default to opaque blending */ + if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE || + !format->alpha_enable) { + blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | + DPU_BLEND_BG_ALPHA_BG_CONST; + } else if (pstate->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) { + blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | + DPU_BLEND_BG_ALPHA_FG_PIXEL; + if (fg_alpha != 0xff) { + bg_alpha = fg_alpha; + blend_op |= DPU_BLEND_BG_MOD_ALPHA | + DPU_BLEND_BG_INV_MOD_ALPHA; + } else { + blend_op |= DPU_BLEND_BG_INV_ALPHA; + } + } else { /* coverage blending */ blend_op = DPU_BLEND_FG_ALPHA_FG_PIXEL | - DPU_BLEND_BG_ALPHA_FG_PIXEL | - DPU_BLEND_BG_INV_ALPHA; + DPU_BLEND_BG_ALPHA_FG_PIXEL; + if (fg_alpha != 0xff) { + bg_alpha = fg_alpha; + blend_op |= DPU_BLEND_FG_MOD_ALPHA | + DPU_BLEND_FG_INV_MOD_ALPHA | + DPU_BLEND_BG_MOD_ALPHA | + DPU_BLEND_BG_INV_MOD_ALPHA; + } else { + blend_op |= DPU_BLEND_BG_INV_ALPHA; + } } lm->ops.setup_blend_config(lm, pstate->stage, - 0xFF, 0, blend_op); + fg_alpha, bg_alpha, blend_op); DRM_DEBUG_ATOMIC("format:%p4cc, alpha_en:%u blend_op:0x%x\n", &format->base.pixel_format, format->alpha_enable, blend_op); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index ec4a6f04394a..c989621209aa 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -1339,9 +1339,7 @@ static void dpu_plane_reset(struct drm_plane *plane) return; } - pstate->base.plane = plane; - - plane->state = &pstate->base; + __drm_atomic_helper_plane_reset(plane, &pstate->base); } #ifdef CONFIG_DEBUG_FS @@ -1647,6 +1645,12 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev, if (ret) DPU_ERROR("failed to install zpos property, rc = %d\n", ret); + drm_plane_create_alpha_property(plane); + drm_plane_create_blend_mode_property(plane, + BIT(DRM_MODE_BLEND_PIXEL_NONE) | + BIT(DRM_MODE_BLEND_PREMULTI) | + BIT(DRM_MODE_BLEND_COVERAGE)); + drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, DRM_MODE_ROTATE_0 | -- 2.30.2

2 2

[PATCH] drm/ttm: optimize the pool shrinker a bit v3
by Christian König 18 Aug '21

18 Aug '21

Switch back to using a spinlock again by moving the IOMMU unmap outside of the locked region. v2: Add a comment explaining why we need sync_shrinkers(). v3: Drop sync_shrinkers() and use an SRCU instead. Signed-off-by: Christian König <christian.koenig(a)amd.com> --- drivers/gpu/drm/ttm/ttm_pool.c | 45 ++++++++++++++++++++-------------- 1 file changed, 27 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c index cb38b1a17b09..cee664c487b5 100644 --- a/drivers/gpu/drm/ttm/ttm_pool.c +++ b/drivers/gpu/drm/ttm/ttm_pool.c @@ -70,7 +70,8 @@ static struct ttm_pool_type global_uncached[MAX_ORDER]; static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER]; static struct ttm_pool_type global_dma32_uncached[MAX_ORDER]; -static struct mutex shrinker_lock; +static spinlock_t shrinker_lock; +DEFINE_STATIC_SRCU(shrinker_srcu); static struct list_head shrinker_list; static struct shrinker mm_shrinker; @@ -263,9 +264,9 @@ static void ttm_pool_type_init(struct ttm_pool_type *pt, struct ttm_pool *pool, spin_lock_init(&pt->lock); INIT_LIST_HEAD(&pt->pages); - mutex_lock(&shrinker_lock); + spin_lock(&shrinker_lock); list_add_tail(&pt->shrinker_list, &shrinker_list); - mutex_unlock(&shrinker_lock); + spin_unlock(&shrinker_lock); } /* Remove a pool_type from the global shrinker list and free all pages */ @@ -273,9 +274,9 @@ static void ttm_pool_type_fini(struct ttm_pool_type *pt) { struct page *p; - mutex_lock(&shrinker_lock); + spin_lock(&shrinker_lock); list_del(&pt->shrinker_list); - mutex_unlock(&shrinker_lock); + spin_unlock(&shrinker_lock); while ((p = ttm_pool_type_take(pt))) ttm_pool_free_page(pt->pool, pt->caching, pt->order, p); @@ -313,24 +314,27 @@ static struct ttm_pool_type *ttm_pool_select_type(struct ttm_pool *pool, static unsigned int ttm_pool_shrink(void) { struct ttm_pool_type *pt; - unsigned int num_freed; + unsigned int num_pages; struct page *p; + int idx; - mutex_lock(&shrinker_lock); + idx = srcu_read_lock(&shrinker_srcu); + + spin_lock(&shrinker_lock); pt = list_first_entry(&shrinker_list, typeof(*pt), shrinker_list); + list_move_tail(&pt->shrinker_list, &shrinker_list); + spin_unlock(&shrinker_lock); p = ttm_pool_type_take(pt); if (p) { ttm_pool_free_page(pt->pool, pt->caching, pt->order, p); - num_freed = 1 << pt->order; + num_pages = 1 << pt->order; } else { - num_freed = 0; + num_pages = 0; } - list_move_tail(&pt->shrinker_list, &shrinker_list); - mutex_unlock(&shrinker_lock); - - return num_freed; + srcu_read_unlock(&shrinker_srcu, idx); + return num_pages; } /* Return the allocation order based for a page */ @@ -530,6 +534,11 @@ void ttm_pool_fini(struct ttm_pool *pool) for (j = 0; j < MAX_ORDER; ++j) ttm_pool_type_fini(&pool->caching[i].orders[j]); } + + /* We removed the pool types from the LRU, but we need to also make sure + * that no shrinker is concurrently freeing pages from the pool. + */ + synchronize_srcu(&shrinker_srcu); } /* As long as pages are available make sure to release at least one */ @@ -604,7 +613,7 @@ static int ttm_pool_debugfs_globals_show(struct seq_file *m, void *data) { ttm_pool_debugfs_header(m); - mutex_lock(&shrinker_lock); + spin_lock(&shrinker_lock); seq_puts(m, "wc\t:"); ttm_pool_debugfs_orders(global_write_combined, m); seq_puts(m, "uc\t:"); @@ -613,7 +622,7 @@ static int ttm_pool_debugfs_globals_show(struct seq_file *m, void *data) ttm_pool_debugfs_orders(global_dma32_write_combined, m); seq_puts(m, "uc 32\t:"); ttm_pool_debugfs_orders(global_dma32_uncached, m); - mutex_unlock(&shrinker_lock); + spin_unlock(&shrinker_lock); ttm_pool_debugfs_footer(m); @@ -640,7 +649,7 @@ int ttm_pool_debugfs(struct ttm_pool *pool, struct seq_file *m) ttm_pool_debugfs_header(m); - mutex_lock(&shrinker_lock); + spin_lock(&shrinker_lock); for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i) { seq_puts(m, "DMA "); switch (i) { @@ -656,7 +665,7 @@ int ttm_pool_debugfs(struct ttm_pool *pool, struct seq_file *m) } ttm_pool_debugfs_orders(pool->caching[i].orders, m); } - mutex_unlock(&shrinker_lock); + spin_unlock(&shrinker_lock); ttm_pool_debugfs_footer(m); return 0; @@ -693,7 +702,7 @@ int ttm_pool_mgr_init(unsigned long num_pages) if (!page_pool_size) page_pool_size = num_pages; - mutex_init(&shrinker_lock); + spin_lock_init(&shrinker_lock); INIT_LIST_HEAD(&shrinker_list); for (i = 0; i < MAX_ORDER; ++i) { -- 2.25.1

3 4

[PATCH 0/1] Fix gem_ctx_persistence failures with GuC submission
by Matthew Brost 18 Aug '21

18 Aug '21

Should fix below failures with GuC submission for the following tests: gem_exec_balancer --r noheartbeat gem_ctx_persistence --r heartbeat-close Not going to fix: gem_ctx_persistence --r heartbeat-many gem_ctx_persistence --r heartbeat-stop As the above tests change the heartbeat value to 0 (off) after the context is closed and we have no way to detect that with GuC submission unless we keep a list of closed but running contexts which seems like overkill for a non-real world use case. We likely should just skip these tests with GuC submission. Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> Matthew Brost (1): drm/i915: Check if engine has heartbeat when closing a context drivers/gpu/drm/i915/gem/i915_gem_context.c | 5 +++-- drivers/gpu/drm/i915/gt/intel_context_types.h | 2 ++ drivers/gpu/drm/i915/gt/intel_engine.h | 21 ++----------------- .../drm/i915/gt/intel_execlists_submission.c | 14 +++++++++++++ .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 6 +++++- .../gpu/drm/i915/gt/uc/intel_guc_submission.h | 2 -- 6 files changed, 26 insertions(+), 24 deletions(-) -- 2.28.0

4 15

[PATCH] drm/vc4: hdmi: make vc4_hdmi_codec_pdata static
by Jiapeng Chong 18 Aug '21

18 Aug '21

This symbol is not used outside of vc4_hdmi.c, so marks it static. Fix the following sparse warning: drivers/gpu/drm/vc4/vc4_hdmi.c:1479:25: warning: symbol 'vc4_hdmi_codec_pdata' was not declared. Should it be static? Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong(a)linux.alibaba.com> --- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index b20530c..ca08b64 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -1476,7 +1476,7 @@ static int vc4_hdmi_audio_get_eld(struct device *dev, void *data, .audio_startup = vc4_hdmi_audio_startup, }; -struct hdmi_codec_pdata vc4_hdmi_codec_pdata = { +static struct hdmi_codec_pdata vc4_hdmi_codec_pdata = { .ops = &vc4_hdmi_codec_ops, .max_i2s_channels = 8, .i2s = 1, -- 1.8.3.1

2 1

[PATCH v2] drm/fourcc: introduce DRM_FOURCC_STANDALONE guard
by Emil Velikov 18 Aug '21

18 Aug '21

Currently, the drm_fourcc.h header depends on drm.h for __u32 and __u64. At the same time drm.h pulls a lot of unneeded symbols. Add new guard DRM_FOURCC_STANDALONE, which when set will use local declaration of said symbols. When used on linux - we pull linux/types.h which is used either way. On other platforms, BSDs et al, we need a couple of typedefs. Since those can trigger a warning in some corner-cases*, add some GCC magic to silence them. Note that incorrect type redefinitions will still be flagged, and the GCC pragma is ignored by other compilers. *Corner-case: If one sets DRM_FOURCC_STANDALONE and compiles with C99 or earlier while also using -pedantic _and_ the header lives outside of the standard /usr/include (like BSDs normally do). v2: - Add corner-case handling, based on popular demand. Cc: James Park <james.park(a)lagfreegames.com> Cc: Pekka Paalanen <pekka.paalanen(a)collabora.com> Cc: Simon Ser <contact(a)emersion.fr> Signed-off-by: Emil Velikov <emil.l.velikov(a)gmail.com> --- include/uapi/drm/drm.h | 10 ++++++++++ include/uapi/drm/drm_fourcc.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 808b48a93330..cd78950e05ce 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -53,6 +53,15 @@ typedef unsigned int drm_handle_t; #include <stdint.h> #include <sys/ioccom.h> #include <sys/types.h> + +/* + * When using C99 -pedantic the typedefs will trigger a warning. + * If the header is considered a system one (-isystem) those will be + * ignored, yet on the target platforms BSDs, et al - the headers live + * in a non-system location. + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" typedef int8_t __s8; typedef uint8_t __u8; typedef int16_t __s16; @@ -63,6 +72,7 @@ typedef int64_t __s64; typedef uint64_t __u64; typedef size_t __kernel_size_t; typedef unsigned long drm_handle_t; +#pragma GCC diagnostic pop #endif diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 6f0628eb13a6..84a1f96cc4ef 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -24,7 +24,36 @@ #ifndef DRM_FOURCC_H #define DRM_FOURCC_H +/* + * Define DRM_FOURCC_STANDALONE you're interested only FOURCC and do not want + * to pull drm.h into your application. + */ +#ifdef DRM_FOURCC_STANDALONE +#if defined(__linux__) + +#include <linux/types.h> + +#else /* One of the BSDs */ + +#include <stdint.h> + +/* + * When using C99 -pedantic the typedefs will trigger a warning. + * If the header is considered a system one (-isystem) those will be + * ignored, yet on the target platforms BSDs, et al - the headers live + * in a non-system location. + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +typedef uint32_t __u32; +typedef uint64_t __u64; +#pragma GCC diagnostic pop + +#endif /* __linux __ */ + +#else #include "drm.h" +#endif /* DRM_FOURCC_STANDALONE */ #if defined(__cplusplus) extern "C" { -- 2.30.0

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dri-devel July 2021