dri-devel August 2021

dri-devel@lists.freedesktop.org

324 participants
762 discussions

Re: [PATCH 04/21] drm/i915/gvt: move the gvt code into kvmgt.ko
by Joonas Lahtinen 09 Aug '21

09 Aug '21

Quoting Christoph Hellwig (2021-07-21 18:53:38) > Instead of having an option to build the gvt code into the main i915 > module, just move it into the kvmgt.ko module. This only requires > a new struct with three entries that the main i915 module needs to > request before enabling VGPU passthrough operations. > > This also conveniently streamlines the GVT initialization and avoids > the need for the global device pointer. > > Signed-off-by: Christoph Hellwig <hch(a)lst.de> Hi, Thanks for putting the work into this. This conversion has been requested for a long time. For clarity, should we call the module i915_kvmgt? How far would we be from dynamically modprobing/rmmoding the kvmgt module in order to eliminate the enable_gvt parameter? <SNIP> > + > +/* > + * Exported here so that the exports only get created when GVT support is > + * actually enabled. > + */ > +EXPORT_SYMBOL_NS_GPL(i915_gem_object_alloc, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_object_create_shmem, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_object_init, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_object_ggtt_pin_ww, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_object_pin_map, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_object_set_to_cpu_domain, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(__i915_gem_object_flush_map, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(__i915_gem_object_set_pages, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_gtt_insert, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_prime_export, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_ww_ctx_init, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_ww_ctx_backoff, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_gem_ww_ctx_fini, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_ppgtt_create, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_request_add, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_request_create, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_request_wait, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_reserve_fence, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_unreserve_fence, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_vm_release, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(i915_vma_move_to_active, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_context_create, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_context_unpin, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(__intel_context_do_pin, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_ring_begin, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_get, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_runtime_pm_put_unchecked, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_for_reg, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_get, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(intel_uncore_forcewake_put, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(shmem_pin_map, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(shmem_unpin_map, I915_GVT); > +EXPORT_SYMBOL_NS_GPL(__px_dma, I915_GVT); This list is also a concern. At the least the double underscore functions should be eliminated from being exported. Zhi and Zhenyu, can we have some further patches to clean that up? Regards, Joonas

1 0

Patch "drm/amdgpu: fix checking pmops when PM_SLEEP is not enabled" has been added to the 5.13-stable tree
by gregkh＠linuxfoundation.org 09 Aug '21

09 Aug '21

This is a note to let you know that I've just added the patch titled drm/amdgpu: fix checking pmops when PM_SLEEP is not enabled to the 5.13-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=sum… The filename of the patch is: drm-amdgpu-fix-checking-pmops-when-pm_sleep-is-not-enabled.patch and it can be found in the queue-5.13 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable(a)vger.kernel.org> know about it. >From 5706cb3c910cc8283f344bc37a889a8d523a2c6d Mon Sep 17 00:00:00 2001 From: Randy Dunlap <rdunlap(a)infradead.org> Date: Thu, 29 Jul 2021 20:03:47 -0700 Subject: drm/amdgpu: fix checking pmops when PM_SLEEP is not enabled MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Randy Dunlap <rdunlap(a)infradead.org> commit 5706cb3c910cc8283f344bc37a889a8d523a2c6d upstream. 'pm_suspend_target_state' is only available when CONFIG_PM_SLEEP is set/enabled. OTOH, when both SUSPEND and HIBERNATION are not set, PM_SLEEP is not set, so this variable cannot be used. ../drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: In function ‘amdgpu_acpi_is_s0ix_active’: ../drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:1046:11: error: ‘pm_suspend_target_state’ undeclared (first use in this function); did you mean ‘__KSYM_pm_suspend_target_state’? return pm_suspend_target_state == PM_SUSPEND_TO_IDLE; ^~~~~~~~~~~~~~~~~~~~~~~ __KSYM_pm_suspend_target_state Also use shorter IS_ENABLED(CONFIG_foo) notation for checking the 2 config symbols. Fixes: 91e273712ab8dd ("drm/amdgpu: Check pmops for desired suspend state") Signed-off-by: Randy Dunlap <rdunlap(a)infradead.org> Cc: Alex Deucher <alexander.deucher(a)amd.com> Cc: Christian König <christian.koenig(a)amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan(a)amd.com> Cc: amd-gfx(a)lists.freedesktop.org Cc: dri-devel(a)lists.freedesktop.org Cc: linux-next(a)vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher(a)amd.com> Cc: stable(a)vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> --- drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c @@ -904,7 +904,7 @@ void amdgpu_acpi_fini(struct amdgpu_devi */ bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) { -#if defined(CONFIG_AMD_PMC) || defined(CONFIG_AMD_PMC_MODULE) +#if IS_ENABLED(CONFIG_AMD_PMC) && IS_ENABLED(CONFIG_PM_SLEEP) if (acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0) { if (adev->flags & AMD_IS_APU) return pm_suspend_target_state == PM_SUSPEND_TO_IDLE; Patches currently in stable-queue which might be from rdunlap(a)infradead.org are queue-5.13/drm-i915-fix-i915_globals_exit-section-mismatch-erro.patch queue-5.13/drm-amdgpu-fix-checking-pmops-when-pm_sleep-is-not-enabled.patch

1 0

[PATCH] DRM: i915: i915_perf: Fixed compiler warning
by Julius Victorian 09 Aug '21

09 Aug '21

From: Julius <julius.victorian.home(a)gmail.com> Fixed compiler warning: "left shift of negative value" Signed-off-by: Julius Victorian <julius.victorian.home(a)gmail.com> --- drivers/gpu/drm/i915/i915_perf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 9f94914958c3..7b852974241e 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -2804,7 +2804,7 @@ get_default_sseu_config(struct intel_sseu *out_sseu, * all available subslices per slice. */ out_sseu->subslice_mask = - ~(~0 << (hweight8(out_sseu->subslice_mask) / 2)); + ~(~0U << (hweight8(out_sseu->subslice_mask) / 2)); out_sseu->slice_mask = 0x1; } } -- 2.30.2

1 0

[GIT PULL FOR v5.15] Xilinx ZynqMP DPSUB miscellaneous fixes
by Laurent Pinchart 09 Aug '21

09 Aug '21

Hi Dave and Daniel, The following changes since commit 49f7844b08844ac7029f997702099c552566262b: Merge tag 'drm-misc-next-2021-08-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2021-08-06 06:59:30 +1000) are available in the Git repository at: git://linuxtv.org/pinchartl/media.git tags/drm-xilinx-dpsub-20210809 for you to fetch changes up to 6ebfd22c969044bda7b5c3f0a20a958c7ff656b9: drm/xlnx/zynqmp_disp: Fix incorrectly named enum 'zynqmp_disp_layer_id' (2021-08-09 02:28:05 +0300) ---------------------------------------------------------------- - Miscellaneous fixes in ZynqMP DPSUB driver ---------------------------------------------------------------- Dylan Yip (1): drm: xlnx: zynqmp_dpsub: Update dependencies for ZynqMP DP Laurent Pinchart (4): drm: xlnx: zynqmp_dpsub: Pass disp structure to all internal functions drm: xlnx: zynqmp_dpsub: Fix graphics layer blending drm: xlnx: zynqmp_dpsub: Add global alpha support drm: xlnx: zynqmp_dpsub: Expose plane ordering to userspace Lee Jones (1): drm/xlnx/zynqmp_disp: Fix incorrectly named enum 'zynqmp_disp_layer_id' Quanyang Wang (3): drm: xlnx: zynqmp_dpsub: Call pm_runtime_get_sync before setting pixel clock drm: xlnx: zynqmp: release reset to DP controller before accessing DP registers drm: xlnx: zynqmp: Add zynqmp_disp_layer_is_video() to simplify the code drivers/gpu/drm/xlnx/Kconfig | 2 + drivers/gpu/drm/xlnx/zynqmp_disp.c | 322 ++++++++++++++++++------------------- drivers/gpu/drm/xlnx/zynqmp_dp.c | 22 +-- 3 files changed, 174 insertions(+), 172 deletions(-) -- Regards, Laurent Pinchart

1 0

[PATCH] drm/panel/tianma-tl057fvxp01: add panel for Motorola Moto G6
by Julian Braha 08 Aug '21

08 Aug '21

This is a 5.7" 2160x1080 panel found on the Motorola Moto G6. There may be other smartphones using it, as well. Signed-off-by: Julian Braha <julianbraha(a)gmail.com> --- drivers/gpu/drm/panel/Kconfig | 7 ++ drivers/gpu/drm/panel/Makefile | 1 + .../gpu/drm/panel/panel-tianma-tl057fvxp01.c | 92 +++++++++++++++++++ 3 files changed, 100 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-tianma-tl057fvxp01.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index beb581b96ecd..9e8a5fffa626 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -557,6 +557,13 @@ config DRM_PANEL_TDO_TL070WSH30 24 bit RGB per pixel. It provides a MIPI DSI interface to the host, a built-in LED backlight and touch controller. +config DRM_PANEL_TIANMA_TL057FVXP01 + tristate "Tianma TL057FVXP01 panel" + select DRM_PANEL_MIPI_DSI_COMMON + help + Say Y here if you want to enable support for the Tianma TL057FVXP01 + 2160x1080 5.7" panel (found on the Motorola Moto G6). + config DRM_PANEL_TPO_TD028TTEC1 tristate "Toppoly (TPO) TD028TTEC1 panel driver" depends on OF && SPI diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index c8132050bcec..9bdc2a12e719 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -57,6 +57,7 @@ obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o obj-$(CONFIG_DRM_PANEL_SONY_ACX424AKP) += panel-sony-acx424akp.o obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o obj-$(CONFIG_DRM_PANEL_TDO_TL070WSH30) += panel-tdo-tl070wsh30.o +obj-$(CONFIG_DRM_PANEL_TIANMA_TL057FVXP01) += panel-tianma-tl057fvxp01.o obj-$(CONFIG_DRM_PANEL_TPO_TD028TTEC1) += panel-tpo-td028ttec1.o obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o diff --git a/drivers/gpu/drm/panel/panel-tianma-tl057fvxp01.c b/drivers/gpu/drm/panel/panel-tianma-tl057fvxp01.c new file mode 100644 index 000000000000..903ce8f35b75 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-tianma-tl057fvxp01.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2021 Julian Braha <julianbraha(a)gmail.com> + * Copyright (c) 2021, The Linux Foundation. All rights reserved. + * Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/module.h> +#include <linux/of.h> + +#include <video/mipi_display.h> + +#include "panel-mipi-dsi-common.h" + +static void tianma_tl057fvxp01_reset(struct gpio_desc *reset_gpio) +{ + gpiod_set_value_cansleep(reset_gpio, 0); + usleep_range(5000, 6000); + gpiod_set_value_cansleep(reset_gpio, 1); + usleep_range(1000, 2000); + gpiod_set_value_cansleep(reset_gpio, 0); + usleep_range(10000, 11000); +} + +static int tianma_tl057fvxp01_on(struct mipi_dsi_device *dsi) +{ + struct device *dev = &dsi->dev; + int ret; + + dsi_dcs_write_seq(dsi, 0x00, 0x00); + dsi_dcs_write_seq(dsi, 0xff, 0x19, 0x11, 0x01); + dsi_dcs_write_seq(dsi, 0x00, 0x80); + dsi_dcs_write_seq(dsi, 0xff, 0x19, 0x11); + dsi_dcs_write_seq(dsi, 0x00, 0xb0); + dsi_dcs_write_seq(dsi, 0xb3, 0x04, 0x38, 0x08, 0x70); + dsi_dcs_write_seq(dsi, 0x00, 0x00); + dsi_dcs_write_seq(dsi, 0xff, 0xff, 0xff, 0xff); + dsi_dcs_write_seq(dsi, 0x35, 0x00); + dsi_dcs_write_seq(dsi, 0x51, 0xcc, 0x08); + dsi_dcs_write_seq(dsi, 0x53, 0x2c); + dsi_dcs_write_seq(dsi, 0x55, 0x01); + + ret = mipi_dsi_dcs_exit_sleep_mode(dsi); + if (ret < 0) { + dev_err(dev, "Failed to exit sleep mode: %d\n", ret); + return ret; + } + msleep(120); + + ret = mipi_dsi_dcs_set_display_on(dsi); + if (ret < 0) { + dev_err(dev, "Failed to set display on: %d\n", ret); + return ret; + } + usleep_range(10000, 11000); + + return 0; +} + +static const struct panel_mipi_dsi_info tianma_tl057fvxp01_info = { + .mode = { + .clock = (1080 + 53 + 4 + 53) * (2160 + 14 + 1 + 11) * 60 / 1000, + .hdisplay = 1080, + .hsync_start = 1080 + 53, + .hsync_end = 1080 + 53 + 4, + .htotal = 1080 + 53 + 4 + 53, + .vdisplay = 2160, + .vsync_start = 2160 + 14, + .vsync_end = 2160 + 14 + 1, + .vtotal = 2160 + 14 + 1 + 11, + .width_mm = 62, + .height_mm = 110, + }, + + .reset = tianma_tl057fvxp01_reset, + .power_on = tianma_tl057fvxp01_on, + + .lanes = 4, + .format = MIPI_DSI_FMT_RGB888, + .mode_flags = MIPI_DSI_MODE_VIDEO + | MIPI_DSI_MODE_VIDEO_BURST + | MIPI_DSI_CLOCK_NON_CONTINUOUS + | MIPI_DSI_MODE_LPM +}; + +MIPI_DSI_PANEL_DRIVER(tianma_tl057fvxp01, "tianma-tl057fvxp01", "tianma,tl057fvxp01"); + +MODULE_AUTHOR("Julian Braha <julianbraha(a)gmail.com>"); +MODULE_DESCRIPTION("Tianma TL057FVXP01 panel driver"); +MODULE_LICENSE("GPL v2"); -- 2.25.1

2 1

[PATCH v2] drm/msm: Implement mmap as GEM object function
by Thomas Zimmermann 07 Aug '21

07 Aug '21

Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The respective msm functions are being removed. The file_operations structure fops is now being created by the helper macro DEFINE_DRM_GEM_FOPS(). v2: * rebase onto latest upstream * remove declaration of msm_gem_mmap_obj() from msm_fbdev.c Signed-off-by: Thomas Zimmermann <tzimmermann(a)suse.de> --- drivers/gpu/drm/msm/msm_drv.c | 14 ++--------- drivers/gpu/drm/msm/msm_drv.h | 1 - drivers/gpu/drm/msm/msm_fbdev.c | 12 ++-------- drivers/gpu/drm/msm/msm_gem.c | 37 ++++++++++------------------- drivers/gpu/drm/msm/msm_gem.h | 3 --- drivers/gpu/drm/msm/msm_gem_prime.c | 11 --------- 6 files changed, 16 insertions(+), 62 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 9b8fa2ad0d84..a4d238e8d377 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -1004,17 +1004,7 @@ static const struct drm_ioctl_desc msm_ioctls[] = { DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUERY, msm_ioctl_submitqueue_query, DRM_RENDER_ALLOW), }; -static const struct file_operations fops = { - .owner = THIS_MODULE, - .open = drm_open, - .release = drm_release, - .unlocked_ioctl = drm_ioctl, - .compat_ioctl = drm_compat_ioctl, - .poll = drm_poll, - .read = drm_read, - .llseek = no_llseek, - .mmap = msm_gem_mmap, -}; +DEFINE_DRM_GEM_FOPS(fops); static const struct drm_driver msm_driver = { .driver_features = DRIVER_GEM | @@ -1034,7 +1024,7 @@ static const struct drm_driver msm_driver = { .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_import_sg_table = msm_gem_prime_import_sg_table, - .gem_prime_mmap = msm_gem_prime_mmap, + .gem_prime_mmap = drm_gem_prime_mmap, #ifdef CONFIG_DEBUG_FS .debugfs_init = msm_debugfs_init, #endif diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 1a48a709ffb3..1a42903db347 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -309,7 +309,6 @@ void msm_gem_shrinker_cleanup(struct drm_device *dev); struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj); int msm_gem_prime_vmap(struct drm_gem_object *obj, struct dma_buf_map *map); void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct dma_buf_map *map); -int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, struct dma_buf_attachment *attach, struct sg_table *sg); int msm_gem_prime_pin(struct drm_gem_object *obj); diff --git a/drivers/gpu/drm/msm/msm_fbdev.c b/drivers/gpu/drm/msm/msm_fbdev.c index 67fae60f2fa5..0daaeb54ff6f 100644 --- a/drivers/gpu/drm/msm/msm_fbdev.c +++ b/drivers/gpu/drm/msm/msm_fbdev.c @@ -8,13 +8,12 @@ #include <drm/drm_crtc.h> #include <drm/drm_fb_helper.h> #include <drm/drm_fourcc.h> +#include <drm/drm_prime.h> #include "msm_drv.h" #include "msm_gem.h" #include "msm_kms.h" -extern int msm_gem_mmap_obj(struct drm_gem_object *obj, - struct vm_area_struct *vma); static int msm_fbdev_mmap(struct fb_info *info, struct vm_area_struct *vma); /* @@ -48,15 +47,8 @@ static int msm_fbdev_mmap(struct fb_info *info, struct vm_area_struct *vma) struct drm_fb_helper *helper = (struct drm_fb_helper *)info->par; struct msm_fbdev *fbdev = to_msm_fbdev(helper); struct drm_gem_object *bo = msm_framebuffer_bo(fbdev->fb, 0); - int ret = 0; - ret = drm_gem_mmap_obj(bo, bo->size, vma); - if (ret) { - pr_err("%s:drm_gem_mmap_obj fail\n", __func__); - return ret; - } - - return msm_gem_mmap_obj(bo, vma); + return drm_gem_prime_mmap(bo, vma); } static int msm_fbdev_create(struct drm_fb_helper *helper, diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 141178754231..519a9601b219 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -218,31 +218,6 @@ static pgprot_t msm_gem_pgprot(struct msm_gem_object *msm_obj, pgprot_t prot) return prot; } -int msm_gem_mmap_obj(struct drm_gem_object *obj, - struct vm_area_struct *vma) -{ - struct msm_gem_object *msm_obj = to_msm_bo(obj); - - vma->vm_flags &= ~VM_PFNMAP; - vma->vm_flags |= VM_MIXEDMAP; - vma->vm_page_prot = msm_gem_pgprot(msm_obj, vm_get_page_prot(vma->vm_flags)); - - return 0; -} - -int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma) -{ - int ret; - - ret = drm_gem_mmap(filp, vma); - if (ret) { - DBG("mmap failed: %d", ret); - return ret; - } - - return msm_gem_mmap_obj(vma->vm_private_data, vma); -} - static vm_fault_t msm_gem_fault(struct vm_fault *vmf) { struct vm_area_struct *vma = vmf->vma; @@ -1114,6 +1089,17 @@ void msm_gem_free_object(struct drm_gem_object *obj) kfree(msm_obj); } +static int msm_gem_object_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) +{ + struct msm_gem_object *msm_obj = to_msm_bo(obj); + + vma->vm_flags &= ~VM_PFNMAP; + vma->vm_flags |= VM_MIXEDMAP; + vma->vm_page_prot = msm_gem_pgprot(msm_obj, vm_get_page_prot(vma->vm_flags)); + + return 0; +} + /* convenience method to construct a GEM buffer object, and userspace handle */ int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file, uint32_t size, uint32_t flags, uint32_t *handle, @@ -1151,6 +1137,7 @@ static const struct drm_gem_object_funcs msm_gem_object_funcs = { .get_sg_table = msm_gem_prime_get_sg_table, .vmap = msm_gem_prime_vmap, .vunmap = msm_gem_prime_vunmap, + .mmap = msm_gem_object_mmap, .vm_ops = &vm_ops, }; diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 405f8411e395..aab548720bee 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -112,9 +112,6 @@ struct msm_gem_object { }; #define to_msm_bo(x) container_of(x, struct msm_gem_object, base) -int msm_gem_mmap_obj(struct drm_gem_object *obj, - struct vm_area_struct *vma); -int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma); uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj); int msm_gem_get_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); diff --git a/drivers/gpu/drm/msm/msm_gem_prime.c b/drivers/gpu/drm/msm/msm_gem_prime.c index 9880348a4dc7..fc94e061d6a7 100644 --- a/drivers/gpu/drm/msm/msm_gem_prime.c +++ b/drivers/gpu/drm/msm/msm_gem_prime.c @@ -39,17 +39,6 @@ void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct dma_buf_map *map) msm_gem_put_vaddr(obj); } -int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) -{ - int ret; - - ret = drm_gem_mmap_obj(obj, obj->size, vma); - if (ret < 0) - return ret; - - return msm_gem_mmap_obj(vma->vm_private_data, vma); -} - struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, struct dma_buf_attachment *attach, struct sg_table *sg) { -- 2.32.0

2 1

[PATCH 0/4] Enable GuC submission by default on DG1
by Matthew Brost 07 Aug '21

07 Aug '21

Minimum set of patches to enable GuC submission on DG1 and enable it by default. A little difficult to test as IGTs do not work with DG1 due to a bunch of uAPI features being disabled (e.g. relocations, caching memory options, etc...). Tested with the loading the driver and 'live' selftests. Submissions seem to work. Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> Daniele Ceraolo Spurio (1): drm/i915/guc: put all guc objects in lmem when available Matthew Brost (2): drm/i915/guc: Add DG1 GuC / HuC firmware defs drm/i915/guc: Enable GuC submission by default on DG1 Venkata Sandeep Dhanalakota (1): drm/i915: Do not define vma on stack drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 26 +++++++ drivers/gpu/drm/i915/gem/i915_gem_lmem.h | 4 + drivers/gpu/drm/i915/gt/uc/intel_guc.c | 9 ++- drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 11 ++- drivers/gpu/drm/i915/gt/uc/intel_huc.c | 14 +++- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 90 ++++++++++++++++++++--- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 + 8 files changed, 138 insertions(+), 20 deletions(-) -- 2.28.0

4 14

[PATCH 1/2] drm/msm: Add adreno_is_a640_family()
by Rob Clark 07 Aug '21

07 Aug '21

From: Rob Clark <robdclark(a)chromium.org> Combine adreno_is_a640() and adreno_is_a680(). Signed-off-by: Rob Clark <robdclark(a)chromium.org> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 5 ++--- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 +++++++-------- drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 9 ++------- 4 files changed, 12 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index ab6b22264c2b..a7c58018959f 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -521,8 +521,7 @@ static void a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu) if (adreno_is_a650(adreno_gpu) || adreno_is_a660_family(adreno_gpu)) pdc_in_aop = true; - else if (adreno_is_a618(adreno_gpu) || adreno_is_a640(adreno_gpu) || - adreno_is_a680(adreno_gpu)) + else if (adreno_is_a618(adreno_gpu) || adreno_is_a640_family(adreno_gpu)) pdc_address_offset = 0x30090; else pdc_address_offset = 0x30080; @@ -1527,7 +1526,7 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) SZ_16M - SZ_16K, 0x04000); if (ret) goto err_memory; - } else if (adreno_is_a640(adreno_gpu) || adreno_is_a680(adreno_gpu)) { + } else if (adreno_is_a640_family(adreno_gpu)) { ret = a6xx_gmu_memory_alloc(gmu, &gmu->icache, SZ_256K - SZ_16K, 0x04000); if (ret) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 6ddd9010cc4b..be62f492538c 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -683,7 +683,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu) if (adreno_is_a618(adreno_gpu)) return; - if (adreno_is_a640(adreno_gpu) || adreno_is_a680(adreno_gpu)) + if (adreno_is_a640_family(adreno_gpu)) amsbc = 1; if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) { @@ -764,7 +764,7 @@ static bool a6xx_ucode_check_version(struct a6xx_gpu *a6xx_gpu, * a660 targets have all the critical security fixes from the start */ if (adreno_is_a618(adreno_gpu) || adreno_is_a630(adreno_gpu) || - adreno_is_a640(adreno_gpu) || adreno_is_a680(adreno_gpu)) { + adreno_is_a640_family(adreno_gpu)) { /* * If the lowest nibble is 0xa that is an indication that this * microcode has been patched. The actual version is in dword @@ -904,8 +904,8 @@ static int a6xx_hw_init(struct msm_gpu *gpu) a6xx_set_hwcg(gpu, true); /* VBIF/GBIF start*/ - if (adreno_is_a640(adreno_gpu) || adreno_is_a650_family(adreno_gpu) || - adreno_is_a680(adreno_gpu)) { + if (adreno_is_a640_family(adreno_gpu) || + adreno_is_a650_family(adreno_gpu)) { gpu_write(gpu, REG_A6XX_GBIF_QSB_SIDE0, 0x00071620); gpu_write(gpu, REG_A6XX_GBIF_QSB_SIDE1, 0x00071620); gpu_write(gpu, REG_A6XX_GBIF_QSB_SIDE2, 0x00071620); @@ -943,8 +943,8 @@ static int a6xx_hw_init(struct msm_gpu *gpu) gpu_write(gpu, REG_A6XX_UCHE_FILTER_CNTL, 0x804); gpu_write(gpu, REG_A6XX_UCHE_CACHE_WAYS, 0x4); - if (adreno_is_a640(adreno_gpu) || adreno_is_a650_family(adreno_gpu) || - adreno_is_a680(adreno_gpu)) + if (adreno_is_a640_family(adreno_gpu) || + adreno_is_a650_family(adreno_gpu)) gpu_write(gpu, REG_A6XX_CP_ROQ_THRESHOLDS_2, 0x02000140); else gpu_write(gpu, REG_A6XX_CP_ROQ_THRESHOLDS_2, 0x010000c0); @@ -961,8 +961,7 @@ static int a6xx_hw_init(struct msm_gpu *gpu) */ if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) gpu_write(gpu, REG_A6XX_PC_DBG_ECO_CNTL, 0x00300200); - else if (adreno_is_a640(adreno_gpu) || adreno_is_a680(adreno_gpu) || - adreno_is_7c3(adreno_gpu)) + else if (adreno_is_a640_family(adreno_gpu) || adreno_is_7c3(adreno_gpu)) gpu_write(gpu, REG_A6XX_PC_DBG_ECO_CNTL, 0x00200200); else if (adreno_is_a650(adreno_gpu) || adreno_is_a660(adreno_gpu)) gpu_write(gpu, REG_A6XX_PC_DBG_ECO_CNTL, 0x00300200); diff --git a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c index 376d0d9809fa..d4c65bf0a1b7 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_hfi.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_hfi.c @@ -458,7 +458,7 @@ static int a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu) if (adreno_is_a618(adreno_gpu)) a618_build_bw_table(&msg); - else if (adreno_is_a640(adreno_gpu) || adreno_is_a680(adreno_gpu)) + else if (adreno_is_a640_family(adreno_gpu)) a640_build_bw_table(&msg); else if (adreno_is_a650(adreno_gpu)) a650_build_bw_table(&msg); diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 899cca8fc68a..225c277a6223 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -241,9 +241,9 @@ static inline int adreno_is_a630(struct adreno_gpu *gpu) return gpu->revn == 630; } -static inline int adreno_is_a640(struct adreno_gpu *gpu) +static inline int adreno_is_a640_family(struct adreno_gpu *gpu) { - return gpu->revn == 640; + return (gpu->revn == 640) || (gpu->revn == 680); } static inline int adreno_is_a650(struct adreno_gpu *gpu) @@ -274,11 +274,6 @@ static inline int adreno_is_a650_family(struct adreno_gpu *gpu) adreno_is_a660_family(gpu); } -static inline int adreno_is_a680(struct adreno_gpu *gpu) -{ - return gpu->revn == 680; -} - int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value); const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname); -- 2.31.1

1 1

[PATCH] drm/amd/display/dc/dce112/dce112_resource: Drop redundant null-pointer check in bw_calcs_data_update_from_pplib()
by Tuo Li 07 Aug '21

07 Aug '21

The variable dc->bw_vbios is guaranteed to be not NULL by its callers. Thus the null-pointer check can be dropped. Reported-by: TOTE Robot <oslab(a)tsinghua.edu.cn> Signed-off-by: Tuo Li <islituo(a)gmail.com> --- drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c index ee55cda854bf..3fc8e6b664f9 100644 --- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c @@ -1064,7 +1064,7 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc) struct dm_pp_clock_levels clks = {0}; int memory_type_multiplier = MEMORY_TYPE_MULTIPLIER_CZ; - if (dc->bw_vbios && dc->bw_vbios->memory_type == bw_def_hbm) + if (dc->bw_vbios->memory_type == bw_def_hbm) memory_type_multiplier = MEMORY_TYPE_HBM; /*do system clock TODO PPLIB: after PPLIB implement, -- 2.25.1

1 0

Re: [PATCH v4 3/3] drm/loongson: Add interrupt driver for LS7A
by Sam Ravnborg 07 Aug '21

07 Aug '21

Hi lichenyang, On Fri, Jul 30, 2021 at 05:41:48PM +0800, lichenyang wrote: > Add LS7A DC vsync interrupt enable and close function, and > register irq_handler function interface. > Add vbrank event processing flow. s/vbrank/vblank/ > > v4: > - Replace drm_irq_install with devm_request_irq. > - Delete the irq_ hooks in drm_driver. > > v3: > - Improve code readability. > - Use the to_pci_dev function to get pci_dev. > > v2: > - Added error handling in the loongson_drm_load function. > > Signed-off-by: lichenyang <lichenyang(a)loongson.cn> Patch looks good, Acked-by: Sam Ravnborg <sam(a)ravnborg.org> But then I am not to fluent in the vblank stuff, so I hope someone else takes a look too. Sam

1 0

← Newer
1
...
61
62
63
64
65
66
67
...
77
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel August 2021