dri-devel August 2021

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[Resend v3] drm/msm/disp/dpu1: add safe lut config in dpu driver
by Kalyan Thota 04 Aug '21

04 Aug '21

Add safe lut configuration for all the targets in dpu driver as per QOS recommendation. Issue reported on SC7280: With wait-for-safe feature in smmu enabled, RT client buffer levels are checked to be safe before smmu invalidation. Since display was always set to unsafe it was delaying the invalidaiton process thus impacting the performance on NRT clients such as eMMC and NVMe. Validated this change on SC7280, With this change eMMC performance has improved significantly. Changes in v2: - Add fixes tag (Sai) - CC stable kernel (Dimtry) Changes in v3: - Correct fixes tag with appropriate hash (stephen) - Resend patch adding reviewed by tag - Resend patch adding correct format for pushing into stable tree (Greg) Fixes: 591e34a091d1 ("drm/msm/disp/dpu1: add support for display for SC7280 target") Cc: stable(a)vger.kernel.org Signed-off-by: Kalyan Thota <kalyan_t(a)codeaurora.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org> (sc7280, sc7180) --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index d01c4c9..2e482cd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -974,6 +974,7 @@ static const struct dpu_perf_cfg sdm845_perf_data = { .amortizable_threshold = 25, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sdm845_qos_linear), .entries = sdm845_qos_linear @@ -1001,6 +1002,7 @@ static const struct dpu_perf_cfg sc7180_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xff, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1028,6 +1030,7 @@ static const struct dpu_perf_cfg sm8150_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff8, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sm8150_qos_linear), .entries = sm8150_qos_linear @@ -1056,6 +1059,7 @@ static const struct dpu_perf_cfg sm8250_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 35, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1084,6 +1088,7 @@ static const struct dpu_perf_cfg sc7280_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xffff, 0xffff, 0x0}, + .safe_lut_tbl = {0xff00, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), .entries = sc7180_qos_macrotile -- 2.7.4

1 0

[Resend v3] drm/msm/disp/dpu1: add safe lut config in dpu driver
by Kalyan Thota 04 Aug '21

04 Aug '21

Add safe lut configuration for all the targets in dpu driver as per QOS recommendation. Issue reported on SC7280: With wait-for-safe feature in smmu enabled, RT client buffer levels are checked to be safe before smmu invalidation. Since display was always set to unsafe it was delaying the invalidaiton process thus impacting the performance on NRT clients such as eMMC and NVMe. Validated this change on SC7280, With this change eMMC performance has improved significantly. Changes in v2: - Add fixes tag (Sai) - CC stable kernel (Dimtry) Changes in v3: - Correct fixes tag with appropriate hash (stephen) - Resend patch adding reviewed by tag Fixes: 591e34a091d1 ("drm/msm/disp/dpu1: add support for display for SC7280 target") Signed-off-by: Kalyan Thota <kalyan_t(a)codeaurora.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org> (sc7280, sc7180) --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index d01c4c9..2e482cd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -974,6 +974,7 @@ static const struct dpu_perf_cfg sdm845_perf_data = { .amortizable_threshold = 25, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sdm845_qos_linear), .entries = sdm845_qos_linear @@ -1001,6 +1002,7 @@ static const struct dpu_perf_cfg sc7180_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xff, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1028,6 +1030,7 @@ static const struct dpu_perf_cfg sm8150_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff8, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sm8150_qos_linear), .entries = sm8150_qos_linear @@ -1056,6 +1059,7 @@ static const struct dpu_perf_cfg sm8250_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 35, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1084,6 +1088,7 @@ static const struct dpu_perf_cfg sc7280_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xffff, 0xffff, 0x0}, + .safe_lut_tbl = {0xff00, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), .entries = sc7180_qos_macrotile -- 2.7.4

2 1

[v3] drm/msm/disp/dpu1: add safe lut config in dpu driver
by Kalyan Thota 04 Aug '21

04 Aug '21

Add safe lut configuration for all the targets in dpu driver as per QOS recommendation. Issue reported on SC7280: With wait-for-safe feature in smmu enabled, RT client buffer levels are checked to be safe before smmu invalidation. Since display was always set to unsafe it was delaying the invalidaiton process thus impacting the performance on NRT clients such as eMMC and NVMe. Validated this change on SC7280, With this change eMMC performance has improved significantly. Changes in v1: - Add fixes tag (Sai) - CC stable kernel (Dimtry) Changes in v2: - Correct fixes tag with appropriate hash (stephen) Fixes: 591e34a091d1 (drm/msm/disp/dpu1: add support for display for SC7280 target) Signed-off-by: Kalyan Thota <kalyan_t(a)codeaurora.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org> (sc7280, sc7180) --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index d01c4c9..2e482cd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -974,6 +974,7 @@ static const struct dpu_perf_cfg sdm845_perf_data = { .amortizable_threshold = 25, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sdm845_qos_linear), .entries = sdm845_qos_linear @@ -1001,6 +1002,7 @@ static const struct dpu_perf_cfg sc7180_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xff, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1028,6 +1030,7 @@ static const struct dpu_perf_cfg sm8150_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff8, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sm8150_qos_linear), .entries = sm8150_qos_linear @@ -1056,6 +1059,7 @@ static const struct dpu_perf_cfg sm8250_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 35, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1084,6 +1088,7 @@ static const struct dpu_perf_cfg sc7280_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xffff, 0xffff, 0x0}, + .safe_lut_tbl = {0xff00, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), .entries = sc7180_qos_macrotile -- 2.7.4

2 1

[PATCH] drm/msm/gpu: fix link failure with QCOM_SCM=m
by Arnd Bergmann 04 Aug '21

04 Aug '21

From: Arnd Bergmann <arnd(a)arndb.de> Another missed dependency when SCM is a loadable module and adreno is built-in: drivers/gpu/drm/msm/adreno/adreno_gpu.o: In function `adreno_zap_shader_load': adreno_gpu.c:(.text+0x1e8): undefined reference to `qcom_scm_is_available' drivers/gpu/drm/msm/adreno/a5xx_gpu.o: In function `a5xx_hw_init': a5xx_gpu.c:(.text+0x28a6): undefined reference to `qcom_scm_set_remote_state' Change it so the dependency on QCOM_SCM and QCOM_MDT_LOADER can be ignored if we are not building for ARCH_QCOM, but prevent the link error during compile testing when SCM is a loadable module and ARCH_QCOM is disabled. Fixes: a9e2559c931d ("drm/msm/gpu: Move zap shader loading to adreno") Fixes: 5ea4dba68305 ("drm/msm/a6xx: add CONFIG_QCOM_LLCC dependency") Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- drivers/gpu/drm/msm/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 52536e7adb95..69fbfe4568b2 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -9,14 +9,14 @@ config DRM_MSM depends on QCOM_OCMEM || QCOM_OCMEM=n depends on QCOM_LLCC || QCOM_LLCC=n depends on QCOM_COMMAND_DB || QCOM_COMMAND_DB=n + depends on QCOM_SCM || (QCOM_SCM=n && ARCH_QCOM=n) + depends on QCOM_MDT_LOADER || ARCH_QCOM=n select IOMMU_IO_PGTABLE - select QCOM_MDT_LOADER if ARCH_QCOM select REGULATOR select DRM_KMS_HELPER select DRM_PANEL select SHMEM select TMPFS - select QCOM_SCM if ARCH_QCOM select WANT_DEV_COREDUMP select SND_SOC_HDMI_CODEC if SND_SOC select SYNC_FILE -- 2.29.2

2 1

[v2] drm/msm/disp/dpu1: add safe lut config in dpu driver
by Kalyan Thota 04 Aug '21

04 Aug '21

Add safe lut configuration for all the targets in dpu driver as per QOS recommendation. Issue reported on SC7280: With wait-for-safe feature in smmu enabled, RT client buffer levels are checked to be safe before smmu invalidation. Since display was always set to unsafe it was delaying the invalidaiton process thus impacting the performance on NRT clients such as eMMC and NVMe. Validated this change on SC7280, With this change eMMC performance has improved significantly. Changes in v1: - Add fixes tag (Sai) - CC stable kernel (Dimtry) Fixes: cfacf946a464d4(drm/msm/disp/dpu1: add support for display for SC7280 target) Signed-off-by: Kalyan Thota <kalyan_t(a)codeaurora.org> Tested-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org> (sc7280, sc7180) --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index d01c4c9..2e482cd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -974,6 +974,7 @@ static const struct dpu_perf_cfg sdm845_perf_data = { .amortizable_threshold = 25, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sdm845_qos_linear), .entries = sdm845_qos_linear @@ -1001,6 +1002,7 @@ static const struct dpu_perf_cfg sc7180_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xff, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1028,6 +1030,7 @@ static const struct dpu_perf_cfg sm8150_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 24, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff8, 0xf000, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sm8150_qos_linear), .entries = sm8150_qos_linear @@ -1056,6 +1059,7 @@ static const struct dpu_perf_cfg sm8250_perf_data = { .min_dram_ib = 800000, .min_prefill_lines = 35, .danger_lut_tbl = {0xf, 0xffff, 0x0}, + .safe_lut_tbl = {0xfff0, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_linear), .entries = sc7180_qos_linear @@ -1084,6 +1088,7 @@ static const struct dpu_perf_cfg sc7280_perf_data = { .min_dram_ib = 1600000, .min_prefill_lines = 24, .danger_lut_tbl = {0xffff, 0xffff, 0x0}, + .safe_lut_tbl = {0xff00, 0xff00, 0xffff}, .qos_lut_tbl = { {.nentry = ARRAY_SIZE(sc7180_qos_macrotile), .entries = sc7180_qos_macrotile -- 2.7.4

4 3

Re: refactor the i915 GVT support
by Zhenyu Wang 04 Aug '21

04 Aug '21

On 2021.07.29 09:20:22 +0200, Christoph Hellwig wrote: > On Wed, Jul 28, 2021 at 02:59:25PM -0300, Jason Gunthorpe wrote: > > On Wed, Jul 28, 2021 at 01:38:58PM +0000, Wang, Zhi A wrote: > > > > > I guess those APIs you were talking about are KVM-only. For other > > > hypervisors, e.g. Xen, ARCN cannot use the APIs you mentioned. Not > > > sure if you have already noticed that VFIO is KVM-only right now. > > > > There is very little hard connection between VFIO and KVM, so no, I > > don't think that is completely true. > > The only connection is the SET_KVM notifier as far as I can tell. > Which is used by a total of two drivers, including i915/gvt. That > being said gvt does not only use vfio, but also does quite a few > direct cals to KVM. yeah, we mostly combined VFIO into hypervisor specific thing before, e.g interface to set vgpu edid, etc. along with kvm specific calls. > > > In an event, an in-tree version of other hypervisor support for GVT > > needs to go through enabling VFIO support so that the existing API > > multiplexers we have can be used properly, not adding a shim layer > > trying to recreate VFIO inside a GPU driver. > > Yes. And if we go back to actually looking at the series a lot of > it just removes entirely pointless indirect calls that go to generic > code and not even the kvm code, or questionable data structure designs. > If we were to support another upstream hypervisor we'd just need to > union a few fields in struct intel_gpu and maybe introduce a few > methods. Preferably in a way that avoids expensive indirect calls > in the fast path. ok, agree on that. Acked-by: Zhenyu Wang <zhenyuw(a)linux.intel.com> Thanks a lot for this effort!

2 2

[PATCH] drm/ast: Update the sequence of Clearing Fast-reset
by KuoHsiang Chou 04 Aug '21

04 Aug '21

[Bug][AST2500] If SCU00 is not unlocked, just enter its password again. It is unnecessary to clear AHB lock condition and restore WDT default setting again, before Fast-reset clearing. Signed-off-by: KuoHsiang Chou <kuohsiang_chou(a)aspeedtech.com> --- drivers/gpu/drm/ast/ast_post.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c index 1f0007daa005..4f194c5fd2c2 100644 --- a/drivers/gpu/drm/ast/ast_post.c +++ b/drivers/gpu/drm/ast/ast_post.c @@ -2030,7 +2030,6 @@ void ast_patch_ahb_2500(struct ast_private *ast) { u32 data; -patch_ahb_lock: /* Clear bus lock condition */ ast_moutdwm(ast, 0x1e600000, 0xAEED1A03); ast_moutdwm(ast, 0x1e600084, 0x00010000); @@ -2044,11 +2043,9 @@ void ast_patch_ahb_2500(struct ast_private *ast) ast_moutdwm(ast, 0x1E78500c, 0x00000033); udelay(1000); } - ast_moutdwm(ast, 0x1e6e2000, 0x1688A8A8); do { + ast_moutdwm(ast, 0x1e6e2000, 0x1688A8A8); data = ast_mindwm(ast, 0x1e6e2000); - if (data == 0xffffffff) - goto patch_ahb_lock; } while (data != 1); ast_moutdwm(ast, 0x1e6e207c, 0x08000000); /* clear fast reset */ } -- 2.18.4

3 20

[drm-intel:for-linux-next-fixes 2/2] WARNING: modpost: vmlinux.o(.text+0x12afa56): Section mismatch in reference from the function i915_globals_exit() to the function .exit.text:__i915_globals_flush()
by kernel test robot 03 Aug '21

03 Aug '21

tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes head: 1354d830cb8f9be966cc07fc61368af27ffb7c4a commit: 1354d830cb8f9be966cc07fc61368af27ffb7c4a [2/2] drm/i915: Call i915_globals_exit() if pci_register_device() fails config: x86_64-randconfig-a011-20210803 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 4f71f59bf3d9914188a11d0c41bedbb339d36ff5) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git remote add drm-intel git://anongit.freedesktop.org/drm-intel git fetch --no-tags drm-intel for-linux-next-fixes git checkout 1354d830cb8f9be966cc07fc61368af27ffb7c4a # save the attached .config to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross O=build_dir ARCH=x86_64 SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> All warnings (new ones prefixed by >>, old ones prefixed by <<): >> WARNING: modpost: vmlinux.o(.text+0x12afa56): Section mismatch in reference from the function i915_globals_exit() to the function .exit.text:__i915_globals_flush() The function i915_globals_exit() references a function in an exit section. Often the function __i915_globals_flush() has valid usage outside the exit section and the fix is to remove the __exit annotation of __i915_globals_flush. --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

1 0

[PATCH 0/8] arm: ep93xx: CCF conversion
by Nikita Shubin 03 Aug '21

03 Aug '21

This series series of patches converts ep93xx to Common Clock Framework. It consists of preparation patches to use clk_prepare_enable where it is needed, instead of clk_enable used in ep93xx drivers prior to CCF and a patch converting mach-ep93xx/clock.c to CCF. Link: https://lore.kernel.org/patchwork/cover/1445563/ Link: https://lore.kernel.org/patchwork/patch/1435884/ Alexander Sverdlin (7): iio: ep93xx: Prepare clock before using it spi: spi-ep93xx: Prepare clock before using it Input: ep93xx_keypad: Prepare clock before using it video: ep93xx: Prepare clock before using it dmaengine: ep93xx: Prepare clock before using it ASoC: cirrus: i2s: Prepare clock before using it pwm: ep93xx: Prepare clock before using it Nikita Shubin (1): ep93xx: clock: convert in-place to COMMON_CLK arch/arm/Kconfig | 2 +- arch/arm/mach-ep93xx/clock.c | 975 ++++++++++++++----------- arch/arm/mach-ep93xx/core.c | 2 +- arch/arm/mach-ep93xx/soc.h | 42 +- drivers/dma/ep93xx_dma.c | 6 +- drivers/iio/adc/ep93xx_adc.c | 6 +- drivers/input/keyboard/ep93xx_keypad.c | 4 +- drivers/pwm/pwm-ep93xx.c | 12 +- drivers/spi/spi-ep93xx.c | 4 +- drivers/video/fbdev/ep93xx-fb.c | 4 +- sound/soc/cirrus/ep93xx-i2s.c | 12 +- 11 files changed, 605 insertions(+), 464 deletions(-) base-commit: 64376a981a0e2e57c46efa63197c2ebb7dab35df -- 2.26.2

4 6

[drm-intel:for-linux-next-fixes 2/2] WARNING: modpost: vmlinux.o(.text.unlikely+0x105a3b): Section mismatch in reference from the function i915_globals_exit() to the function .exit.text:__i915_globals_flush()
by kernel test robot 03 Aug '21

03 Aug '21

tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes head: 1354d830cb8f9be966cc07fc61368af27ffb7c4a commit: 1354d830cb8f9be966cc07fc61368af27ffb7c4a [2/2] drm/i915: Call i915_globals_exit() if pci_register_device() fails config: i386-allyesconfig (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce (this is a W=1 build): git remote add drm-intel git://anongit.freedesktop.org/drm-intel git fetch --no-tags drm-intel for-linux-next-fixes git checkout 1354d830cb8f9be966cc07fc61368af27ffb7c4a # save the attached .config to linux build tree mkdir build_dir make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com> All warnings (new ones prefixed by >>, old ones prefixed by <<): >> WARNING: modpost: vmlinux.o(.text.unlikely+0x105a3b): Section mismatch in reference from the function i915_globals_exit() to the function .exit.text:__i915_globals_flush() The function i915_globals_exit() references a function in an exit section. Often the function __i915_globals_flush() has valid usage outside the exit section and the fix is to remove the __exit annotation of __i915_globals_flush. --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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dri-devel August 2021