dri-devel September 2021

dri-devel@lists.freedesktop.org

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817 discussions

[PATCH v11 00/16] Add Mediatek Soc DRM (vdosys0) support for mt8195
by jason-jh.lin 25 Oct '21

25 Oct '21

Change in v11: - rebase on kernel-5.15-rc1 - change mbox label to gce0 for dts node of vdosys0 - change ovl compatibale to mt8192 to set smi_id_en=true in driver data - move common module from display folder to common folder, such as AAL, COCLOR, CCORR and MUTEX Change in v10: - rebase on "drm/mediatek: add support for mediatek SOC MT8192" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=529489 - rebase on "soc: mediatek: mmsys: add mt8192 mmsys support" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=524857 - fix some typo and "mediatek" start with capital in every dt-bindings - move mutex yaml from dfisplay folder to soc folder - separate merge additional propoerties to an individual dt-bindings patch Change in v9: - separate power and gce properties of mmsys into another dt-binding patch - rebase on "Separate aal module" series https://patchwork.kernel.org/project/linux-mediatek/list/?series=516463 - keep mtk_ddp_clk_enable/disable in the same place - change mtk_dsc_start config register to mtk_drm_ddp_write_mask - remove the 0 setting of merge fifo config function - add CCORR driver data for mt8195 Change in v8: - add DP_INTF0 mux into mmsys routing table - add DP_INTF0 mutex mod and enum into add/remove comp function - remove bypass DSC enum in mtk_ddp_comp_init Change in v7: - add dt=binding of mmsys and disp path into this series - separate th modidfication of alphabetic order, remove unused define and rename the define of register offset to individual patch - add comment for MERGE ultra and preultra setting Change in v6: - adjust alphabetic order for mediatek-drm - move the patch that add mt8195 support for mediatek-drm as the lastest patch - add MERGE define for const varriable Change in v5: - add power-domain property into vdosys0 and vdosys1 dts node. - add MT8195 prifix and remove unused VDO1 define in mt8195-mmsys.h Change in v4: - extract dt-binding patches to another patch series https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597 - squash DSC module into mtk_drm_ddp_comp.c - add coment and simplify MERGE config function Change in v3: - change mmsys and display dt-bindings document from txt to yaml - add MERGE additional description in display dt-bindings document - fix mboxes-cells number of vdosys0 node in dts - drop mutex eof convert define - remove pm_runtime apis in DSC and MERGE - change DSC and MERGE enum to alphabetic order Change in v2: - add DSC yaml file - add mt8195 drm driver porting parts in to one patch - remove useless define, variable, structure member and function - simplify DSC and MERGE file and switch threre order jason-jh.lin (16): dt-bindings: arm: mediatek: mmsys: add power and gce properties dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding dt-bindings: display: mediatek: disp: split each block to individual yaml dt-bindings: display: mediatek: dsc: add yaml for mt8195 SoC binding dt-bindings: display: mediatek: merge: add additional prop for mt8195 dt-bindings: display: mediatek: add mt8195 SoC binding for vdosys0 dt-bindings: arm: mediatek: move common module from display folder arm64: dts: mt8195: add display node for vdosys0 soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 soc: mediatek: add mtk-mutex support for mt8195 vdosys0 drm/mediatek: remove unused define in mtk_drm_ddp_comp.c drm/mediatek: rename the define of register offset drm/mediatek: adjust to the alphabetic order for mediatek-drm drm/mediatek: add DSC support for mediatek-drm drm/mediatek: add MERGE support for mediatek-drm drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 .../bindings/arm/mediatek/mediatek,aal.yaml | 79 ++++++ .../bindings/arm/mediatek/mediatek,ccorr.yaml | 78 ++++++ .../bindings/arm/mediatek/mediatek,color.yaml | 88 +++++++ .../bindings/arm/mediatek/mediatek,mmsys.yaml | 32 ++- .../bindings/arm/mediatek/mediatek,mutex.yaml | 81 ++++++ .../bindings/arm/mediatek/mediatek,wdma.yaml | 88 +++++++ .../display/mediatek/mediatek,disp.txt | 219 ---------------- .../display/mediatek/mediatek,dither.yaml | 79 ++++++ .../display/mediatek/mediatek,dsc.yaml | 71 ++++++ .../display/mediatek/mediatek,gamma.yaml | 80 ++++++ .../display/mediatek/mediatek,merge.yaml | 102 ++++++++ .../display/mediatek/mediatek,od.yaml | 53 ++++ .../display/mediatek/mediatek,ovl-2l.yaml | 91 +++++++ .../display/mediatek/mediatek,ovl.yaml | 106 ++++++++ .../display/mediatek/mediatek,postmask.yaml | 72 ++++++ .../display/mediatek/mediatek,rdma.yaml | 120 +++++++++ .../display/mediatek/mediatek,split.yaml | 58 +++++ .../display/mediatek/mediatek,ufoe.yaml | 61 +++++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 111 ++++++++ drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 + drivers/gpu/drm/mediatek/mtk_disp_merge.c | 239 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 222 +++++++++------- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 26 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 152 ++++++----- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + drivers/soc/mediatek/mt8195-mmsys.h | 114 +++++++++ drivers/soc/mediatek/mtk-mmsys.c | 11 + drivers/soc/mediatek/mtk-mutex.c | 95 ++++++- include/linux/soc/mediatek/mtk-mmsys.h | 9 + 31 files changed, 2172 insertions(+), 381 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,aal.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ccorr.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,color.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mutex.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,wdma.yaml delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_merge.c create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h -- 2.18.0

5 30

[PATCH v8 00/12] Clean up "mediatek,larb"
by Yong Wu 25 Oct '21

25 Oct '21

MediaTek IOMMU block diagram always like below: M4U | smi-common | ------------- | | ... | | larb1 larb2 | | vdec venc All the consumer connect with smi-larb, then connect with smi-common. When the consumer works, it should enable the smi-larb's power which also need enable the smi-common's power firstly. Thus, Firstly, use the device link connect the consumer and the smi-larbs. then add device link between the smi-larb and smi-common. After adding the device_link, then "mediatek,larb" property can be removed. the iommu consumer don't need call the mtk_smi_larb_get/put to enable the power and clock of smi-larb and smi-common. About the MM dt-binding/dtsi patches, I guess they should go together, thus I don't split them for each a MM module and each a SoC. Base on a jpeg dtbing patchset[1] that already got the necessary R-b. [1] https://lore.kernel.org/linux-mediatek/20210702102304.3346429-1-hsinyi@chro… Change notes: v8: 1) Rebase on v5.15-rc1. 2) Don't rebase the below mdp patchset that may still need more discuss. https://lore.kernel.org/linux-mediatek/20210709022324.1607884-1-eizan@chrom… 3) Add Frank's Tested-by. Remove Dafna's Tested-by as he requested. v7: https://lore.kernel.org/linux-mediatek/20210730025238.22456-1-yong.wu@media… 1) Fix a arm32 boot fail issue. reported from Frank. 2) Add a return fail in the mtk drm. suggested by Dafna. v6: https://lore.kernel.org/linux-mediatek/20210714025626.5528-1-yong.wu@mediat… 1) rebase on v5.14-rc1. 2) Fix the issue commented in v5 from Dafna and Hsin-Yi. 3) Remove the patches about using pm_runtime_resume_and_get since they have already been merged by other patches. v5: https://lore.kernel.org/linux-mediatek/20210410091128.31823-1-yong.wu@media… 1) Base v5.12-rc2. 2) Remove changing the mtk-iommu to module_platform_driver patch, It have already been a independent patch. v4: https://lore.kernel.org/linux-mediatek/1590826218-23653-1-git-send-email-yo… base on v5.7-rc1. 1) Move drm PM patch before smi patchs. 2) Change builtin_platform_driver to module_platform_driver since we may need build as module. 3) Rebase many patchset as above. v3: https://lore.kernel.org/linux-iommu/1567503456-24725-1-git-send-email-yong.… 1) rebase on v5.3-rc1 and the latest mt8183 patchset. 2) Use device_is_bound to check whether the driver is ready from Matthias. 3) Add DL_FLAG_STATELESS flag when calling device_link_add and explain the reason in the commit message[3/14]. 4) Add a display patch[12/14] into this series. otherwise it may affect display HW fastlogo even though it don't happen in mt8183. v2: https://lore.kernel.org/linux-iommu/1560171313-28299-1-git-send-email-yong.… 1) rebase on v5.2-rc1. 2) Move adding device_link between the consumer and smi-larb into iommu_add_device from Robin. 3) add DL_FLAG_AUTOREMOVE_CONSUMER even though the smi is built-in from Evan. 4) Remove the shutdown callback in iommu. v1: https://lore.kernel.org/linux-iommu/1546318276-18993-1-git-send-email-yong.… Yong Wu (11): dt-binding: mediatek: Get rid of mediatek, larb for multimedia HW iommu/mediatek-v1: Free the existed fwspec if the master dev already has iommu/mediatek: Add probe_defer for smi-larb iommu/mediatek: Add device_link between the consumer and the larb devices media: mtk-jpeg: Get rid of mtk_smi_larb_get/put media: mtk-mdp: Get rid of mtk_smi_larb_get/put drm/mediatek: Get rid of mtk_smi_larb_get/put media: mtk-vcodec: Get rid of mtk_smi_larb_get/put memory: mtk-smi: Get rid of mtk_smi_larb_get/put arm: dts: mediatek: Get rid of mediatek,larb for MM nodes arm64: dts: mediatek: Get rid of mediatek,larb for MM nodes Yongqiang Niu (1): drm/mediatek: Add pm runtime support for ovl and rdma .../display/mediatek/mediatek,disp.txt | 9 ---- .../bindings/media/mediatek-jpeg-decoder.yaml | 9 ---- .../bindings/media/mediatek-jpeg-encoder.yaml | 9 ---- .../bindings/media/mediatek-mdp.txt | 8 ---- .../bindings/media/mediatek-vcodec.txt | 4 -- arch/arm/boot/dts/mt2701.dtsi | 2 - arch/arm/boot/dts/mt7623n.dtsi | 5 --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 16 ------- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 6 --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 8 +++- drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 9 +++- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 15 ++++--- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 36 +-------------- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 - drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +-- drivers/iommu/mtk_iommu.c | 24 +++++++++- drivers/iommu/mtk_iommu_v1.c | 31 ++++++++++++- .../media/platform/mtk-jpeg/mtk_jpeg_core.c | 45 +------------------ .../media/platform/mtk-jpeg/mtk_jpeg_core.h | 2 - drivers/media/platform/mtk-mdp/mtk_mdp_comp.c | 40 ----------------- drivers/media/platform/mtk-mdp/mtk_mdp_comp.h | 2 - drivers/media/platform/mtk-mdp/mtk_mdp_core.c | 1 - .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 37 +++------------ .../platform/mtk-vcodec/mtk_vcodec_drv.h | 3 -- .../platform/mtk-vcodec/mtk_vcodec_enc.c | 1 - .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 44 +++--------------- drivers/memory/mtk-smi.c | 14 ------ include/soc/mediatek/smi.h | 20 --------- 28 files changed, 90 insertions(+), 316 deletions(-) -- 2.18.0

2 22

[PATCH 00/30] drm/i915/gem: ioctl clean-ups (v9)
by Jason Ekstrand 22 Oct '21

22 Oct '21

Overview: --------- This patch series attempts to clean up some of the IOCTL mess we've created over the last few years. The most egregious bit being context mutability. In summary, this series: 1. Drops two never-used context params: RINGSIZE and NO_ZEROMAP 2. Drops the entire CONTEXT_CLONE API 3. Implements SINGLE_TIMELINE with a syncobj instead of actually sharing intel_timeline between engines. 4. Adds a few sanity restrictions to the balancing/bonding API. 5. Implements a proto-ctx mechanism so that the engine set and VM can only be set early on in the lifetime of a context, before anything ever executes on it. This effectively makes the VM and engine set immutable. This series has been tested with IGT as well as the Iris, ANV, and the Intel media driver doing an 8K decode (this uses bonding/balancing). I've also done quite a bit of git archeology to ensure that nothing in here will break anything that's already shipped at some point in history. It's possible I've missed something, but I've dug quite a bit. Details and motivation: ----------------------- In very broad strokes, there's an effort going on right now within Intel to try and clean up and simplify i915 anywhere we can. We obviously don't want to break any shipping userspace but, as can be seen by this series, there's a lot i915 theoretically supports which userspace doesn't actually need. Some of this, like the two context params used here, were simply oversights where we went through the usual API review process and merged the i915 bits but the userspace bits never landed for some reason. Not all are so innocent, however. For instance, there's an entire context cloning API which allows one to create a context with certain parameters "cloned" from some other context. This entire API has never been used by any userspace except IGT and there were never patches to any other userspace to use it. It never should have landed. Also, when we added support for setting explicit engine sets and sharing VMs across contexts, people decided to do so via SET_CONTEXT_PARAM. While this allowed them to re-use existing API, it did so at the cost of making those states mutable which leads to a plethora of potential race conditions. There were even IGT tests merged to cover some of theses: - gem_vm_create@async-destroy and gem_vm_create@destroy-race which test swapping out the VM on a running context. - gem_ctx_persistence@replace* which test whether a client can escape a non-persistent context by submitting a hanging batch and then swapping out the engine set before the hang is detected. - api_intel_bb@bb-with-vm which tests the that intel_bb_assign_vm works properly. This API is never used by any other IGT test. There is also an entire deferred flush and set state framework in i915_gem_cotnext.c which exists for safely swapping out the VM while there is work in-flight on a context. So, clearly people knew that this API was inherently racy and difficult to implement but they landed it anyway. Why? The best explanation I've been given is because it makes the API more "unified" or "symmetric" for this stuff to go through SET_CONTEXT_PARAM. It's not because any userspace actually wants to be able to swap out the VM or the set of engines on a running context. That would be utterly insane. This patch series cleans up this particular mess by introducing the concept of a i915_gem_proto_context data structure which contains context creation information. When you initially call GEM_CONTEXT_CREATE, a proto-context in created instead of an actual context. Then, the first time something is done on the context besides SET_CONTEXT_PARAM, an actual context is created. This allows us to keep the old drivers which use SET_CONTEXT_PARAM to set up the engine set (see also media) while ensuring that, once you have an i915_gem_context, the VM and the engine set are immutable state. Eventually, there are more clean-ups I'd like to do on top of this which should make working with contexts inside i915 simpler and safer: 1. Move the GEM handle -> vma LUT from i915_gem_context into either i915_ppgtt or drm_i915_file_private depending on whether or not the hardware has a full PPGTT. 2. Move the delayed context destruction code into intel_context or a per-engine wrapper struct rather than i915_gem_context. 3. Get rid of the separation between context close and context destroy 4. Get rid of the RCU on i915_gem_context However, these should probably be done as a separate patch series as this one is already starting to get longish, especially if you consider the 89 IGT patches that go along with it. Test-with: 20210707210215.351483-1-jason(a)jlekstrand.net Jason Ekstrand (30): drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE drm/i915: Stop storing the ring size in the ring pointer (v3) drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem (v2) drm/i915/gem: Return void from context_apply_all drm/i915: Drop the CONTEXT_CLONE API (v2) drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4) drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES drm/i915/gem: Disallow bonding of virtual engines (v3) drm/i915/gem: Remove engine auto-magic with FENCE_SUBMIT (v2) drm/i915/request: Remove the hook from await_execution drm/i915/gem: Disallow creating contexts with too many engines drm/i915: Stop manually RCU banging in reset_stats_ioctl (v2) drm/i915/gem: Add a separate validate_priority helper drm/i915: Add gem/i915_gem_context.h to the docs drm/i915/gem: Add an intermediate proto_context struct (v5) drm/i915/gem: Rework error handling in default_engines drm/i915/gem: Optionally set SSEU in intel_context_set_gem drm/i915: Add an i915_gem_vm_lookup helper drm/i915/gem: Make an alignment check more sensible drm/i915/gem: Use the proto-context to handle create parameters (v5) drm/i915/gem: Return an error ptr from context_lookup drm/i915/gt: Drop i915_address_space::file (v2) drm/i915/gem: Delay context creation (v3) drm/i915/gem: Don't allow changing the VM on running contexts (v4) drm/i915/gem: Don't allow changing the engine set on running contexts (v3) drm/i915/selftests: Take a VM in kernel_context() i915/gem/selftests: Assign the VM at context creation in igt_shared_ctx_exec drm/i915/gem: Roll all of context creation together drm/i915: Finalize contexts in GEM_CONTEXT_CREATE on version 13+ Documentation/gpu/i915.rst | 2 + drivers/gpu/drm/i915/Makefile | 1 - drivers/gpu/drm/i915/gem/i915_gem_context.c | 2926 ++++++++--------- drivers/gpu/drm/i915/gem/i915_gem_context.h | 3 + .../gpu/drm/i915/gem/i915_gem_context_types.h | 196 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 31 +- .../drm/i915/gem/selftests/i915_gem_context.c | 127 +- .../gpu/drm/i915/gem/selftests/mock_context.c | 67 +- .../gpu/drm/i915/gem/selftests/mock_context.h | 4 +- drivers/gpu/drm/i915/gt/intel_context.c | 3 +- drivers/gpu/drm/i915/gt/intel_context.h | 5 - drivers/gpu/drm/i915/gt/intel_context_param.c | 63 - drivers/gpu/drm/i915/gt/intel_context_param.h | 6 +- drivers/gpu/drm/i915/gt/intel_context_types.h | 1 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 7 - .../drm/i915/gt/intel_execlists_submission.c | 114 - .../drm/i915/gt/intel_execlists_submission.h | 8 +- drivers/gpu/drm/i915/gt/intel_gtt.h | 11 - drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +- drivers/gpu/drm/i915/gt/intel_migrate.c | 3 +- drivers/gpu/drm/i915/gt/selftest_execlists.c | 251 +- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- drivers/gpu/drm/i915/gt/selftest_timeline.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 7 +- drivers/gpu/drm/i915/i915_drv.h | 82 +- drivers/gpu/drm/i915/i915_perf.c | 4 +- drivers/gpu/drm/i915/i915_request.c | 42 +- drivers/gpu/drm/i915/i915_request.h | 4 +- .../drm/i915/selftests/i915_mock_selftests.h | 1 - drivers/gpu/drm/i915/selftests/mock_gtt.c | 1 - include/uapi/drm/i915_drm.h | 40 +- 33 files changed, 1681 insertions(+), 2340 deletions(-) delete mode 100644 drivers/gpu/drm/i915/gt/intel_context_param.c -- 2.31.1

3 32

[PATCH v9 0/4] drm: LogiCVC display controller support
by Paul Kocialkowski 22 Oct '21

22 Oct '21

This series introduces support for the LogiCVC display controller. The controller is a bit unusual since it is usually loaded as programmable logic on Xilinx FPGAs or Zynq-7000 SoCs. More details are presented on the main commit for the driver. More information about the controller is available on the dedicated web page: https://www.logicbricks.com/Products/logiCVC-ML.aspx Note that this driver has rather simple connector management, which was not converted to drm_panel_bridge to keep the ability to enable the panel at first vblank but also to support DVI. Changes since v8: - Rebased on top of the latest drm-misc-next; - Dropped useless phandle-based syscon regmap support; - Switched to a single-port graph description; - Updated the device-tree schema to the port schema and added a description for the port. Change since v7: - Replaced DRM_INFO/DRM_ERROR/DRM_DEBUG_DRIVER with fashions using drm_device; - Fixed yaml binding alignment issue; - Renamed logicvc-display name to the generic "display" name; - Added patternProperties match for display in the parent mfd binding; - Used drm_atomic_get_new_crtc_state when needed; - Checked mode in mode_valid instead of atomic_check; - Switched to drmm_mode_config_init; - Removed useless logicvc_connector_destroy wrapper; - Removed useless drm_dev_put calls; - Removed atomic_commit_tail that enables the panel and streamlined the logic; - Reworked Makefile cosmetics; - Fixed checkpatch issues. Changes since v6: - Updated to the latest DRM internal API changes; - Used an enum to index dt properties instead of the name string. Changes since v5: - Subclass DRM device and use devm_drm_dev_alloc for allocation; - Removed call to drm_mode_config_cleanup (done automatically with devm); - Some related code cleanups; - Bring back not-for-merge patch adding colorkey support. Changes since v4: - Updated to internal DRM API changes (rebased on drm-misc-next); - Added Kconfig dependency on OF; - Added MAINTAINERS entry; - Used drm_err and dev_err instead of DRM_ERROR where possible; - Various cosmetic changes. Changes since v3: - Rebased on latest drm-misc; - Improved event lock wrapping; - Added collect tag; - Added color-key support patch (not for merge, for reference only). Changes since v2: - Fixed and slightly improved dt schema. Changes since v1: - Switched dt bindings documentation to dt schema; - Described more possible dt parameters; - Added support for the lvds-3bit interface; - Added support for grabbing syscon regmap from parent node; - Removed layers count property and count layers child nodes instead. Paul Kocialkowski (4): dt-bindings: display: Document the Xylon LogiCVC display controller dt-bindings: mfd: logicvc: Add patternProperties for the display drm: Add support for the LogiCVC display controller NOTFORMERGE: drm/logicvc: Add plane colorkey support .../display/xylon,logicvc-display.yaml | 302 +++++++ .../bindings/mfd/xylon,logicvc.yaml | 3 + MAINTAINERS | 6 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/logicvc/Kconfig | 9 + drivers/gpu/drm/logicvc/Makefile | 9 + drivers/gpu/drm/logicvc/logicvc_crtc.c | 280 +++++++ drivers/gpu/drm/logicvc/logicvc_crtc.h | 21 + drivers/gpu/drm/logicvc/logicvc_drm.c | 471 +++++++++++ drivers/gpu/drm/logicvc/logicvc_drm.h | 67 ++ drivers/gpu/drm/logicvc/logicvc_interface.c | 214 +++++ drivers/gpu/drm/logicvc/logicvc_interface.h | 28 + drivers/gpu/drm/logicvc/logicvc_layer.c | 767 ++++++++++++++++++ drivers/gpu/drm/logicvc/logicvc_layer.h | 71 ++ drivers/gpu/drm/logicvc/logicvc_mode.c | 80 ++ drivers/gpu/drm/logicvc/logicvc_mode.h | 15 + drivers/gpu/drm/logicvc/logicvc_of.c | 185 +++++ drivers/gpu/drm/logicvc/logicvc_of.h | 46 ++ drivers/gpu/drm/logicvc/logicvc_regs.h | 88 ++ 20 files changed, 2665 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml create mode 100644 drivers/gpu/drm/logicvc/Kconfig create mode 100644 drivers/gpu/drm/logicvc/Makefile create mode 100644 drivers/gpu/drm/logicvc/logicvc_crtc.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_crtc.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_drm.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_drm.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_interface.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_interface.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_layer.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_layer.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_mode.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_mode.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_of.c create mode 100644 drivers/gpu/drm/logicvc/logicvc_of.h create mode 100644 drivers/gpu/drm/logicvc/logicvc_regs.h -- 2.32.0

4 11

[PATCH v5 0/7] drm/sun4i: Add support for dual-link LVDS on the A20
by Maxime Ripard 22 Oct '21

22 Oct '21

Hi, This is a fourth attempt at supporting the LVDS dual-link output on the Allwinner A20. Let me know what you think, Maxime Changes from v4: - Rebased on 5.15 Changes from v3: - Reintroduce the endpoint sanity check (and make of_graph_get_port_by_id const in the process) - Make a few doc fixes - Fix device_node leakage - Changed allwinner,lvds-companion to more generic link-companion - Rebased on 5.11 Changes from v2: - Added the DT binding description - Split the patch to enable the A20 - Reworked a bit the error messages Changes from v1: - Reworked the DT bindings - Refactored a bit the panel registration in the tcon code. Maxime Ripard (7): of: Make of_graph_get_port_by_id take a const device_node drm/of: Change the prototype of drm_of_lvds_get_dual_link_pixel_order dt-bindings: display: sun4i: Add LVDS Dual-Link property drm/sun4i: tcon: Refactor the LVDS and panel probing drm/sun4i: tcon: Support the LVDS Dual-Link drm/sun4i: tcon: Enable the A20 dual-link output [DO NOT MERGE] ARM: dts: sun7i: Enable LVDS Dual-Link on the Cubieboard .../display/allwinner,sun4i-a10-tcon.yaml | 6 + arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 69 ++++++++ drivers/gpu/drm/drm_of.c | 138 +++++++++++---- drivers/gpu/drm/rcar-du/rcar_lvds.c | 8 +- drivers/gpu/drm/sun4i/sun4i_tcon.c | 164 ++++++++++-------- drivers/gpu/drm/sun4i/sun4i_tcon.h | 4 + drivers/of/property.c | 2 +- include/drm/drm_of.h | 16 +- include/linux/of_graph.h | 4 +- 9 files changed, 298 insertions(+), 113 deletions(-) -- 2.31.1

2 11

[PATCH] drm/rockchip: Implement mmap as GEM object function
by Thomas Zimmermann 21 Oct '21

21 Oct '21

Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The respective rockchip functions are being removed. The file_operations structure fops is now being created by the helper macro DEFINE_DRM_GEM_FOPS(). Signed-off-by: Thomas Zimmermann <tzimmermann(a)suse.de> --- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 13 +----- drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c | 3 +- drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 44 +++++-------------- drivers/gpu/drm/rockchip/rockchip_drm_gem.h | 7 --- 4 files changed, 15 insertions(+), 52 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index b730b8d5d949..2e3ab573a817 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -208,16 +208,7 @@ static void rockchip_drm_unbind(struct device *dev) drm_dev_put(drm_dev); } -static const struct file_operations rockchip_drm_driver_fops = { - .owner = THIS_MODULE, - .open = drm_open, - .mmap = rockchip_gem_mmap, - .poll = drm_poll, - .read = drm_read, - .unlocked_ioctl = drm_ioctl, - .compat_ioctl = drm_compat_ioctl, - .release = drm_release, -}; +DEFINE_DRM_GEM_FOPS(rockchip_drm_driver_fops); static const struct drm_driver rockchip_drm_driver = { .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC, @@ -226,7 +217,7 @@ static const struct drm_driver rockchip_drm_driver = { .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_import_sg_table = rockchip_gem_prime_import_sg_table, - .gem_prime_mmap = rockchip_gem_mmap_buf, + .gem_prime_mmap = drm_gem_prime_mmap, .fops = &rockchip_drm_driver_fops, .name = DRIVER_NAME, .desc = DRIVER_DESC, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c b/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c index 2fdc455c4ad7..d8418dd39d0e 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fbdev.c @@ -7,6 +7,7 @@ #include <drm/drm.h> #include <drm/drm_fb_helper.h> #include <drm/drm_fourcc.h> +#include <drm/drm_prime.h> #include <drm/drm_probe_helper.h> #include "rockchip_drm_drv.h" @@ -24,7 +25,7 @@ static int rockchip_fbdev_mmap(struct fb_info *info, struct drm_fb_helper *helper = info->par; struct rockchip_drm_private *private = to_drm_private(helper); - return rockchip_gem_mmap_buf(private->fbdev_bo, vma); + return drm_gem_prime_mmap(private->fbdev_bo, vma); } static const struct fb_ops rockchip_drm_fbdev_ops = { diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c index 7971f57436dd..63eb73b624aa 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c @@ -240,12 +240,22 @@ static int rockchip_drm_gem_object_mmap(struct drm_gem_object *obj, int ret; struct rockchip_gem_object *rk_obj = to_rockchip_obj(obj); + /* + * Set vm_pgoff (used as a fake buffer offset by DRM) to 0 and map the + * whole buffer from the start. + */ + vma->vm_pgoff = 0; + /* * We allocated a struct page table for rk_obj, so clear * VM_PFNMAP flag that was set by drm_gem_mmap_obj()/drm_gem_mmap(). */ + vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP; vma->vm_flags &= ~VM_PFNMAP; + vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags)); + vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot); + if (rk_obj->pages) ret = rockchip_drm_gem_object_mmap_iommu(obj, vma); else @@ -257,39 +267,6 @@ static int rockchip_drm_gem_object_mmap(struct drm_gem_object *obj, return ret; } -int rockchip_gem_mmap_buf(struct drm_gem_object *obj, - struct vm_area_struct *vma) -{ - int ret; - - ret = drm_gem_mmap_obj(obj, obj->size, vma); - if (ret) - return ret; - - return rockchip_drm_gem_object_mmap(obj, vma); -} - -/* drm driver mmap file operations */ -int rockchip_gem_mmap(struct file *filp, struct vm_area_struct *vma) -{ - struct drm_gem_object *obj; - int ret; - - ret = drm_gem_mmap(filp, vma); - if (ret) - return ret; - - /* - * Set vm_pgoff (used as a fake buffer offset by DRM) to 0 and map the - * whole buffer from the start. - */ - vma->vm_pgoff = 0; - - obj = vma->vm_private_data; - - return rockchip_drm_gem_object_mmap(obj, vma); -} - static void rockchip_gem_release_object(struct rockchip_gem_object *rk_obj) { drm_gem_object_release(&rk_obj->base); @@ -301,6 +278,7 @@ static const struct drm_gem_object_funcs rockchip_gem_object_funcs = { .get_sg_table = rockchip_gem_prime_get_sg_table, .vmap = rockchip_gem_prime_vmap, .vunmap = rockchip_gem_prime_vunmap, + .mmap = rockchip_drm_gem_object_mmap, .vm_ops = &drm_gem_cma_vm_ops, }; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h index 5a70a56cd406..47c1861eece0 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.h @@ -34,13 +34,6 @@ rockchip_gem_prime_import_sg_table(struct drm_device *dev, int rockchip_gem_prime_vmap(struct drm_gem_object *obj, struct dma_buf_map *map); void rockchip_gem_prime_vunmap(struct drm_gem_object *obj, struct dma_buf_map *map); -/* drm driver mmap file operations */ -int rockchip_gem_mmap(struct file *filp, struct vm_area_struct *vma); - -/* mmap a gem object to userspace. */ -int rockchip_gem_mmap_buf(struct drm_gem_object *obj, - struct vm_area_struct *vma); - struct rockchip_gem_object * rockchip_gem_create_object(struct drm_device *drm, unsigned int size, bool alloc_kmap); -- 2.32.0

4 5

[PATCH v6 0/6] Add Unisoc's drm kms module
by Kevin Tang 21 Oct '21

21 Oct '21

ChangeList: RFC v1: 1. only upstream modeset and atomic at first commit. 2. remove some unused code; 3. use alpha and blend_mode properties; 3. add yaml support; 4. remove auto-adaptive panel driver; 5. bugfix RFC v2: 1. add sprd crtc and plane module for KMS, preparing for multi crtc&encoder 2. remove gem drivers, use generic CMA handlers 3. remove redundant "module_init", all the sub modules loading by KMS RFC v3: 1. multi crtc&encoder design have problem, so rollback to v1 RFC v4: 1. update to gcc-linaro-7.5.0 2. update to Linux 5.6-rc3 3. remove pm_runtime support 4. add COMPILE_TEST, remove unused kconfig 5. "drm_dev_put" on drm_unbind 6. fix some naming convention issue 7. remove semaphore lock for crtc flip 8. remove static variables RFC v5: 1. optimize encoder and connector code implementation 2. use "platform_get_irq" and "platform_get_resource" 3. drop useless function return type, drop unless debug log 4. custom properties should be separate, so drop it 5. use DRM_XXX replase pr_xxx 6. drop dsi&dphy hal callback ops 7. drop unless callback ops checking 8. add comments for sprd dpu structure RFC v6: 1. Access registers via readl/writel 2. Checking for unsupported KMS properties (format, rotation, blend_mode, etc) on plane_check ops 3. Remove always true checks for dpu core ops RFC v7: 1. Fix DTC unit name warnings 2. Fix the problem of maintainers 3. Call drmm_mode_config_init to mode config init 4. Embed drm_device in sprd_drm and use devm_drm_dev_alloc 5. Replace DRM_XXX with drm_xxx on KMS module, but not suitable for other subsystems 6. Remove plane_update stuff, dpu handles all the HW update in crtc->atomic_flush 7. Dsi&Dphy Code structure adjustment, all move to "sprd/" v0: 1. Remove dpu_core_ops stuff layer for sprd drtc driver, but dpu_layer need to keeping. Because all the HW update in crtc->atomic_flush, we need temporary storage all layers for the dpu pageflip of atomic_flush. 2. Add ports subnode with port@X. v1: 1. Remove dphy and dsi graph binding, merge the dphy driver into the dsi. 2. Add commit messages for Unisoc's virtual nodes. v2: 1. Use drm_xxx to replace all DRM_XXX. 2. Use kzalloc to replace devm_kzalloc for sprd_dsi/sprd_dpu structure init. 3. Remove dpu_core_ops midlayer. v3: 1. Remove dpu_layer midlayer and commit layers by aotmic_update v4: 1. Move the devm_drm_dev_alloc to master_ops->bind function. 2. The managed drmm_mode_config_init() it is no longer necessary for drivers to explicitly call drm_mode_config_cleanup, so delete it. 3. Use drmm_helpers to allocate crtc ,planes and encoder. 4. Move allocate crtc ,planes, encoder to bind funtion. 5. Move rotation enum definitions to crtc layer reg bitfields. v5: 1. Remove subdir-ccflgas-y for Makefile. 2. Keep the selects sorted by alphabet for Kconfig. 3. Fix the checkpatch warnings. 4. Use mode_set_nofb instead of mode_valid callback. 5. Follow the OF-Graph bindings, use of_graph_get_port_by_id instead of of_parse_phandle. 6. Use zpos to represent the layer position. 7. Rebase to last drm misc branch. 8. Remove panel_in port for dsi node. 9. Drop the dsi ip file prefix. 10. Add Signed-off-by for dsi&dphy patch. 11. Use the mode_flags of mipi_dsi_device to setup crtc DPI and EDPI mode. v6: 1. Disable and clear interrupts before register dpu IRQ 2. Init dpi config used by crtc_state->adjusted_mode on mode_set_nofb 3. Remove enable_irq and disable_irq function call. 4. Remove drm_format_info function call. 5. Redesign the way to access the dsi register. 6. Reduce the dsi_context member variables. Kevin Tang (6): dt-bindings: display: add Unisoc's drm master bindings drm/sprd: add Unisoc's drm kms master dt-bindings: display: add Unisoc's dpu bindings drm/sprd: add Unisoc's drm display controller driver dt-bindings: display: add Unisoc's mipi dsi controller bindings drm/sprd: add Unisoc's drm mipi dsi&dphy driver .../display/sprd/sprd,display-subsystem.yaml | 64 + .../display/sprd/sprd,sharkl3-dpu.yaml | 77 + .../display/sprd/sprd,sharkl3-dsi-host.yaml | 88 ++ drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/sprd/Kconfig | 13 + drivers/gpu/drm/sprd/Makefile | 6 + drivers/gpu/drm/sprd/megacores_pll.c | 317 +++++ drivers/gpu/drm/sprd/megacores_pll.h | 146 ++ drivers/gpu/drm/sprd/sprd_dpu.c | 954 +++++++++++++ drivers/gpu/drm/sprd/sprd_dpu.h | 109 ++ drivers/gpu/drm/sprd/sprd_drm.c | 207 +++ drivers/gpu/drm/sprd/sprd_drm.h | 19 + drivers/gpu/drm/sprd/sprd_dsi.c | 1260 +++++++++++++++++ drivers/gpu/drm/sprd/sprd_dsi.h | 94 ++ 15 files changed, 3357 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml create mode 100644 drivers/gpu/drm/sprd/Kconfig create mode 100644 drivers/gpu/drm/sprd/Makefile create mode 100644 drivers/gpu/drm/sprd/megacores_pll.c create mode 100644 drivers/gpu/drm/sprd/megacores_pll.h create mode 100644 drivers/gpu/drm/sprd/sprd_dpu.c create mode 100644 drivers/gpu/drm/sprd/sprd_dpu.h create mode 100644 drivers/gpu/drm/sprd/sprd_drm.c create mode 100644 drivers/gpu/drm/sprd/sprd_drm.h create mode 100644 drivers/gpu/drm/sprd/sprd_dsi.c create mode 100644 drivers/gpu/drm/sprd/sprd_dsi.h -- 2.29.0

3 16

[PATCH 0/2] Update 128b/132b MST Slot Information
by Fangzhi Zuo 20 Oct '21

20 Oct '21

128b/132b MST start slot information is not the same as 8b/10b. Update based on encoding format after link detection or topology change. Fangzhi Zuo (2): drm: Update MST First Link Slot Information Based on Encoding Format drm/amdgpu: Example Usage in AMDGPU .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 10 +++++++ .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 2 ++ drivers/gpu/drm/drm_dp_mst_topology.c | 27 ++++++++++++++----- include/drm/drm_dp_mst_helper.h | 9 +++++++ 5 files changed, 44 insertions(+), 8 deletions(-) -- 2.25.1

8 28

[PATCH] drm: mxsfb: Fix NULL pointer dereference crash on unload
by Marek Vasut 19 Oct '21

19 Oct '21

The mxsfb->crtc.funcs may already be NULL when unloading the driver, in which case calling mxsfb_irq_disable() via drm_irq_uninstall() from mxsfb_unload() leads to NULL pointer dereference. Since all we care about is masking the IRQ and mxsfb->base is still valid, just use that to clear and mask the IRQ. Fixes: ae1ed00932819 ("drm: mxsfb: Stop using DRM simple display pipeline helper") Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Daniel Abrecht <public(a)danielabrecht.ch> Cc: Emil Velikov <emil.l.velikov(a)gmail.com> Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> Cc: Sam Ravnborg <sam(a)ravnborg.org> Cc: Stefan Agner <stefan(a)agner.ch> --- drivers/gpu/drm/mxsfb/mxsfb_drv.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c b/drivers/gpu/drm/mxsfb/mxsfb_drv.c index ec0432fe1bdf8..86d78634a9799 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_drv.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c @@ -173,7 +173,11 @@ static void mxsfb_irq_disable(struct drm_device *drm) struct mxsfb_drm_private *mxsfb = drm->dev_private; mxsfb_enable_axi_clk(mxsfb); - mxsfb->crtc.funcs->disable_vblank(&mxsfb->crtc); + + /* Disable and clear VBLANK IRQ */ + writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); + writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); + mxsfb_disable_axi_clk(mxsfb); } -- 2.33.0

3 5

[PATCH v13 00/35] NVIDIA Tegra power management patches for 5.16
by Dmitry Osipenko 19 Oct '21

19 Oct '21

This series adds runtime PM support to Tegra drivers and enables core voltage scaling for Tegra20/30 SoCs, resolving overheating troubles. All patches in this series are interdependent and should go via Tegra tree. Changelog: v13: - Fixed compile-test error reported by build bot by reverting the mmc/ patch to v11. The sdhci_suspend/resume_host() functions aren't available with the disabled CONFIG_PM_SLEEP, some code needs the ifdef. - Added last r-b from Rob Herring for the DT patches. - Corrected clk/ PM domain-support patch by not using the devm_tegra_core_dev_init_opp_table_common() helper, which I utilized in v12. The clk driver implements its own power domain state syncing and common helper shouldn't be used. This fixes driver probing for some clocks on some devices. It was reported by Svyatoslav Ryhel for PLLE OPP error on T30 Asus Transformer tablet. v12: - Added r-b from Rob Herring to the host1x binding patch. - Added acks from Hans Verkuil to the video decoder patches. - In the v11 changelog I forgot to mention that the clk-binding patch was also changed with a corrected regex pattern and removed 'clocks' sub-node. This patch needs r-b or ack too. - Added new "Rename 3d power domains" patch to match the DT schema naming requirement. Thanks to David Heidelberg for spotting this problem. - Replaced #ifdef CONFIG_PM_SLEEP with maybe_unused in the MMC patch to make code cleaner. v11: - Added acks and r-b from Rob Herring, Mark Brown and Miquel Raynal that were given to v8. - Corrected order of the new memory controller reset entry in device-trees and host1x DT binding patch, which was requested by Rob Herring. - Switched consumer drivers to use power domain state syncing done by new Tegra's common OPP-initialization helper. - Made use of new devm_pm_runtime_enable() helper that was added to v5.15 kernel, where appropriate. - Added "fuse: Use resource-managed helpers" patch. - Converted Tegra20/30 clk drivers to a proper platform drivers, which was requested by Thierry Reding. - Removed clk-bulk API usage from the MMC patch, which was requested by Thierry Reding. - Changed CORE power domain name to "core" in a new patch "Change name of core power domain". - Misc small fixes for problems that I found since v8, like couple typos in error code paths and restored working RPM for Tegra DRM UAPI v1 that was removed in v8 by accident. v9-v10: Figured out remaining GENPD API changes with Ulf Hansson and Viresh Kumar. The OPP-sync helper that was used in v8 isn't needed anymore because GENPD API now allows consumer drivers to init rpm_pstate of power domains. v8: - Added new generic dev_pm_opp_sync() helper that syncs OPP state with hardware. All drivers changed to use it. This replaces GENPD attach_dev callback hacks that were used in v7. - Added new patch patch "soc/tegra: regulators: Prepare for suspend" that fixes dying Tegra20 SoC after enabling VENC power domain during resume from suspend. It matches to what downstream kernel does on suspend/resume. - After a second thought, I dropped patches which added RPM to memory drivers since hardware is always-on and RPM not needed. - Replaced the "dummy host1x driver" patch with new "Disable unused host1x hardware" patch, since it's a cleaner solution. Dmitry Osipenko (35): opp: Change type of dev_pm_opp_attach_genpd(names) argument soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() soc/tegra: pmc: Disable PMC state syncing soc/tegra: Don't print error message when OPPs not available dt-bindings: clock: tegra-car: Document new clock sub-nodes clk: tegra: Support runtime PM and power domain dt-bindings: host1x: Document OPP and power domain properties dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D gpu: host1x: Add runtime PM and OPP support gpu: host1x: Add host1x_channel_stop() drm/tegra: dc: Support OPP and SoC core voltage scaling drm/tegra: hdmi: Add OPP support drm/tegra: gr2d: Support generic power domain and runtime PM drm/tegra: gr3d: Support generic power domain and runtime PM drm/tegra: vic: Support system suspend usb: chipidea: tegra: Add runtime PM and OPP support bus: tegra-gmi: Add runtime PM and OPP support pwm: tegra: Add runtime PM and OPP support mmc: sdhci-tegra: Add runtime PM and OPP support mtd: rawnand: tegra: Add runtime PM and OPP support spi: tegra20-slink: Add OPP support media: dt: bindings: tegra-vde: Convert to schema media: dt: bindings: tegra-vde: Document OPP and power domain media: staging: tegra-vde: Support generic power domain soc/tegra: fuse: Reset hardware soc/tegra: fuse: Use resource-managed helpers soc/tegra: regulators: Prepare for suspend soc/tegra: pmc: Rename 3d power domains soc/tegra: pmc: Rename core power domain soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x ARM: tegra: Add Memory Client resets to Tegra30 GR2D, GR3D and Host1x ARM: tegra20/30: Disable unused host1x hardware .../bindings/clock/nvidia,tegra20-car.yaml | 37 + .../display/tegra/nvidia,tegra20-host1x.txt | 53 + .../bindings/media/nvidia,tegra-vde.txt | 64 - .../bindings/media/nvidia,tegra-vde.yaml | 119 ++ .../boot/dts/tegra20-acer-a500-picasso.dts | 1 + arch/arm/boot/dts/tegra20-colibri.dtsi | 3 +- arch/arm/boot/dts/tegra20-harmony.dts | 3 +- arch/arm/boot/dts/tegra20-paz00.dts | 1 + .../arm/boot/dts/tegra20-peripherals-opp.dtsi | 941 +++++++++++ arch/arm/boot/dts/tegra20-seaboard.dts | 3 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 3 +- arch/arm/boot/dts/tegra20-trimslice.dts | 9 + arch/arm/boot/dts/tegra20-ventana.dts | 1 + arch/arm/boot/dts/tegra20.dtsi | 116 +- .../tegra30-asus-nexus7-grouper-common.dtsi | 1 + arch/arm/boot/dts/tegra30-beaver.dts | 1 + arch/arm/boot/dts/tegra30-cardhu.dtsi | 1 + arch/arm/boot/dts/tegra30-colibri.dtsi | 17 +- arch/arm/boot/dts/tegra30-ouya.dts | 1 + .../arm/boot/dts/tegra30-peripherals-opp.dtsi | 1412 +++++++++++++++++ arch/arm/boot/dts/tegra30.dtsi | 175 +- drivers/bus/tegra-gmi.c | 52 +- drivers/clk/tegra/Makefile | 1 + drivers/clk/tegra/clk-device.c | 230 +++ drivers/clk/tegra/clk-pll.c | 2 +- drivers/clk/tegra/clk-super.c | 2 +- drivers/clk/tegra/clk-tegra20.c | 77 +- drivers/clk/tegra/clk-tegra30.c | 116 +- drivers/clk/tegra/clk.c | 75 +- drivers/clk/tegra/clk.h | 2 + drivers/gpu/drm/tegra/dc.c | 74 + drivers/gpu/drm/tegra/dc.h | 2 + drivers/gpu/drm/tegra/gr2d.c | 155 +- drivers/gpu/drm/tegra/gr3d.c | 388 ++++- drivers/gpu/drm/tegra/hdmi.c | 16 +- drivers/gpu/drm/tegra/vic.c | 4 + drivers/gpu/host1x/channel.c | 8 + drivers/gpu/host1x/debug.c | 15 + drivers/gpu/host1x/dev.c | 151 +- drivers/gpu/host1x/dev.h | 3 +- drivers/gpu/host1x/hw/channel_hw.c | 44 +- drivers/gpu/host1x/intr.c | 3 - drivers/gpu/host1x/syncpt.c | 5 +- drivers/mmc/host/sdhci-tegra.c | 82 +- drivers/mtd/nand/raw/tegra_nand.c | 55 +- drivers/opp/core.c | 6 +- drivers/pwm/pwm-tegra.c | 88 +- drivers/soc/tegra/common.c | 4 +- drivers/soc/tegra/fuse/fuse-tegra.c | 51 +- drivers/soc/tegra/fuse/fuse-tegra20.c | 33 +- drivers/soc/tegra/fuse/fuse.h | 1 + drivers/soc/tegra/pmc.c | 27 +- drivers/soc/tegra/regulators-tegra20.c | 99 ++ drivers/soc/tegra/regulators-tegra30.c | 122 ++ drivers/spi/spi-tegra20-slink.c | 10 +- drivers/staging/media/tegra-vde/vde.c | 57 +- drivers/usb/chipidea/ci_hdrc_tegra.c | 53 +- include/linux/host1x.h | 1 + include/linux/pm_opp.h | 8 +- include/soc/tegra/common.h | 24 + 60 files changed, 4751 insertions(+), 357 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/nvidia,tegra-vde.txt create mode 100644 Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml create mode 100644 drivers/clk/tegra/clk-device.c -- 2.32.0

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dri-devel September 2021