dri-devel January 2022

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[PATCH v3 0/5] drm: Provide framebuffer vmap helpers
by Thomas Zimmermann 09 May '22

09 May '22

Add the new helpers drm_gem_fb_vmap() and drm_gem_fb_vunmap(), which provide vmap/vunmap for all BOs of a framebuffer. Convert shadow- plane helpers, gud and vkms. Callers of GEM vmap and vunmap functions used to do the minimum work or get some detail wrong. Therefore shadow-plane helpers were intro- duced to implement the details for all callers. The vmapping code in the shadow-plane helpers is also useful for gud and vkms. So it makes sense to provide rsp helpers. Simply call drm_gem_fb_vmap() to retrieve mappings of all of a framebuffer's BOs. Future work: besides the mapping's addresses, drm_gem_fb_vmap() should also return the mappings with the framebuffer data offset added. These are the addresses were the actual image data is located. A follow-up set of patches will implement this feature. v3: * free instances of struct vkms_writeback_job on cleanup or errors v2: * update commit message for first patch (Maxime) * fix error handling after DRM_FORMAT_MAX_PLANES changes (kernel test robot) * fix includes (kernel test robot) * use [static N] notations for array parameters Thomas Zimmermann (5): drm: Define DRM_FORMAT_MAX_PLANES drm/gem: Provide drm_gem_fb_{vmap,vunmap}() drm/gem: Clear mapping addresses for unused framebuffer planes drm/gud: Map framebuffer BOs with drm_gem_fb_vmap() drm/vkms: Map output framebuffer BOs with drm_gem_fb_vmap() drivers/gpu/drm/drm_gem_atomic_helper.c | 37 +------- drivers/gpu/drm/drm_gem_framebuffer_helper.c | 96 ++++++++++++++++++-- drivers/gpu/drm/gud/gud_pipe.c | 10 +- drivers/gpu/drm/vkms/vkms_composer.c | 2 +- drivers/gpu/drm/vkms/vkms_drv.h | 6 +- drivers/gpu/drm/vkms/vkms_writeback.c | 28 +++--- include/drm/drm_fourcc.h | 13 ++- include/drm/drm_framebuffer.h | 8 +- include/drm/drm_gem_atomic_helper.h | 3 +- include/drm/drm_gem_framebuffer_helper.h | 6 ++ 10 files changed, 139 insertions(+), 70 deletions(-) base-commit: 2bda1ca4d4acb4892556fec3a7ea1f02afcd40bb prerequisite-patch-id: c2b2f08f0eccc9f5df0c0da49fa1d36267deb11d prerequisite-patch-id: c67e5d886a47b7d0266d81100837557fda34cb24 -- 2.32.0

2 9

[Bug 214853] New: [amdgpu] UBSAN shows several null-ptr-deref in ../dc/bios/command_table2.c some array-index-out-of-bounds in ../dc/bios/bios_parser2.c and an invalid-load in ../amdgpu_dm/amdgpu_dm.c
by bugzilla-daemon＠bugzilla.kernel.org 09 May '22

09 May '22

https://bugzilla.kernel.org/show_bug.cgi?id=214853 Bug ID: 214853 Summary: [amdgpu] UBSAN shows several null-ptr-deref in ../dc/bios/command_table2.c some array-index-out-of-bounds in ../dc/bios/bios_parser2.c and an invalid-load in ../amdgpu_dm/amdgpu_dm.c Product: Drivers Version: 2.5 Kernel Version: 5.15-rc7 Hardware: All OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: erhard_f(a)mailbox.org CC: christian.koenig(a)amd.com Regression: No Created attachment 299337 --> https://bugzilla.kernel.org/attachment.cgi?id=299337&action=edit kernel dmesg (kernel 5.15-rc7, AMD FX-8370) [...] UBSAN: null-ptr-deref in drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table2.c:872:3 member access within null pointer of type 'struct atom_master_list_of_command_functions_v2_1' CPU: 3 PID: 234 Comm: systemd-udevd Not tainted 5.15.0-rc7-bdver2 #11 Hardware name: Gigabyte Technology Co., Ltd. To be filled by O.E.M./970-GAMING, BIOS F2 04/06/2016 Call Trace: dump_stack_lvl+0x8d/0xd9 ubsan_epilogue+0x5/0x44 __ubsan_handle_type_mismatch_v1+0x45/0x4a dal_firmware_parser_init_cmd_tbl+0x31c/0x37c [amdgpu] bios_parser2_construct+0x16f/0x9cb [amdgpu] firmware_parser_create+0x36/0x4c [amdgpu] dal_bios_parser_create+0xc/0x20 [amdgpu] dc_create+0x25d/0x764 [amdgpu] dm_hw_init+0x28a/0x697 [amdgpu] ? dev_printk_emit+0x4c/0x66 amdgpu_device_init+0x1847/0x1e13 [amdgpu] amdgpu_driver_load_kms+0x47/0x33d [amdgpu] amdgpu_pci_probe+0xeb/0x1a6 [amdgpu] pci_device_probe+0xa1/0x121 really_probe+0xe4/0x331 __driver_probe_device+0x84/0xe1 driver_probe_device+0x1a/0x6d __driver_attach+0xac/0xc3 ? driver_attach+0x15/0x15 bus_for_each_dev+0x8c/0xc0 bus_add_driver+0xf5/0x1f2 driver_register+0x66/0xe7 ? 0xffffffffc0ff2000 do_one_initcall+0x109/0x1f4 ? 0xffffffffc0ff2000 do_init_module+0x5c/0x1f1 load_module+0x193f/0x1ca9 ? kernel_read_file_from_fd+0x5b/0x7e __se_sys_finit_module+0xa7/0xce do_syscall_64+0x79/0xa3 ? lockdep_hardirqs_on_prepare+0xf6/0x1e3 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7fa99ef681e9 Code: 00 00 b8 ca 00 00 00 0f 05 eb ac 66 0f 1f 44 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 4f fc 0b 00 f7 d8 64 89 01 48 RSP: 002b:00007fff06041ba8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 RAX: ffffffffffffffda RBX: 000055f2d378be20 RCX: 00007fa99ef681e9 RDX: 0000000000000000 RSI: 00007fa99f0af97f RDI: 0000000000000018 RBP: 0000000000020000 R08: 0000000000000000 R09: fffffffffffffeb8 R10: 0000000000000018 R11: 0000000000000246 R12: 0000000000000000 R13: 000055f2d38eba60 R14: 00007fa99f0af97f R15: 0000000000000000 ================================================================================ ================================================================================ UBSAN: array-index-out-of-bounds in drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.c:384:3 index 8 is out of range for type 'struct atom_gpio_pin_assignment [8]' CPU: 3 PID: 234 Comm: systemd-udevd Not tainted 5.15.0-rc7-bdver2 #11 Hardware name: Gigabyte Technology Co., Ltd. To be filled by O.E.M./970-GAMING, BIOS F2 04/06/2016 Call Trace: dump_stack_lvl+0x8d/0xd9 ubsan_epilogue+0x5/0x44 __ubsan_handle_out_of_bounds+0x9e/0xa0 get_gpio_i2c_info+0xe0/0x17e [amdgpu] bios_parser_get_i2c_info+0x5b/0xfa [amdgpu] dal_ddc_service_create+0xa7/0x1a8 [amdgpu] dcn20_resource_construct+0x106e/0x10ba [amdgpu] ? find_held_lock+0x41/0xc1 ? slab_post_alloc_hook+0x5f/0x8a dcn20_create_resource_pool+0x39/0x6f [amdgpu] dc_create_resource_pool+0x164/0x213 [amdgpu] ? dal_gpio_service_create+0x8f/0x193 [amdgpu] dc_create+0x2b3/0x764 [amdgpu] dm_hw_init+0x28a/0x697 [amdgpu] ? dev_printk_emit+0x4c/0x66 amdgpu_device_init+0x1847/0x1e13 [amdgpu] amdgpu_driver_load_kms+0x47/0x33d [amdgpu] amdgpu_pci_probe+0xeb/0x1a6 [amdgpu] pci_device_probe+0xa1/0x121 really_probe+0xe4/0x331 __driver_probe_device+0x84/0xe1 driver_probe_device+0x1a/0x6d __driver_attach+0xac/0xc3 ? driver_attach+0x15/0x15 bus_for_each_dev+0x8c/0xc0 bus_add_driver+0xf5/0x1f2 driver_register+0x66/0xe7 ? 0xffffffffc0ff2000 do_one_initcall+0x109/0x1f4 ? 0xffffffffc0ff2000 do_init_module+0x5c/0x1f1 load_module+0x193f/0x1ca9 ? kernel_read_file_from_fd+0x5b/0x7e __se_sys_finit_module+0xa7/0xce do_syscall_64+0x79/0xa3 ? lockdep_hardirqs_on_prepare+0xf6/0x1e3 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7fa99ef681e9 Code: 00 00 b8 ca 00 00 00 0f 05 eb ac 66 0f 1f 44 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 4f fc 0b 00 f7 d8 64 89 01 48 RSP: 002b:00007fff06041ba8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 RAX: ffffffffffffffda RBX: 000055f2d378be20 RCX: 00007fa99ef681e9 RDX: 0000000000000000 RSI: 00007fa99f0af97f RDI: 0000000000000018 RBP: 0000000000020000 R08: 0000000000000000 R09: fffffffffffffeb8 R10: 0000000000000018 R11: 0000000000000246 R12: 0000000000000000 R13: 000055f2d38eba60 R14: 00007fa99f0af97f R15: 0000000000000000 [...] = UBSAN: invalid-load in drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5865:85 load of value 170 is not a valid value for type 'bool' (aka '_Bool') CPU: 5 PID: 234 Comm: systemd-udevd Not tainted 5.15.0-rc7-bdver2 #11 Hardware name: Gigabyte Technology Co., Ltd. To be filled by O.E.M./970-GAMING, BIOS F2 04/06/2016 Call Trace: dump_stack_lvl+0x8d/0xd9 ubsan_epilogue+0x5/0x44 __ubsan_handle_load_invalid_value+0x9e/0xa0 create_validate_stream_for_sink+0x6bb/0x777 [amdgpu] ? lockdep_hardirqs_on_prepare+0xf6/0x1e3 amdgpu_dm_connector_mode_valid+0x70/0x1b9 [amdgpu] ? drm_connector_list_update+0xba/0x121 [drm] drm_connector_mode_valid+0x34/0x42 [drm_kms_helper] drm_helper_probe_single_connector_modes+0x4d7/0x88e [drm_kms_helper] ? drm_client_modeset_probe+0x1fa/0x14c9 [drm] drm_client_modeset_probe+0x232/0x14c9 [drm] ? add_chain_block+0x165/0x22f ? __lock_acquire+0xc7c/0x1e4d ? rcu_read_lock_sched_held+0x45/0xa5 ? lock_acquire+0xcb/0x210 ? drm_fb_helper_initial_config+0x32/0x4f [drm_kms_helper] __drm_fb_helper_initial_config_and_unlock+0x3e/0x5f0 [drm_kms_helper] amdgpu_fbdev_init+0xee/0x110 [amdgpu] amdgpu_device_init+0x1996/0x1e13 [amdgpu] amdgpu_driver_load_kms+0x47/0x33d [amdgpu] amdgpu_pci_probe+0xeb/0x1a6 [amdgpu] pci_device_probe+0xa1/0x121 really_probe+0xe4/0x331 __driver_probe_device+0x84/0xe1 driver_probe_device+0x1a/0x6d __driver_attach+0xac/0xc3 ? driver_attach+0x15/0x15 bus_for_each_dev+0x8c/0xc0 bus_add_driver+0xf5/0x1f2 driver_register+0x66/0xe7 ? 0xffffffffc0ff2000 do_one_initcall+0x109/0x1f4 ? 0xffffffffc0ff2000 do_init_module+0x5c/0x1f1 load_module+0x193f/0x1ca9 ? kernel_read_file_from_fd+0x5b/0x7e __se_sys_finit_module+0xa7/0xce do_syscall_64+0x79/0xa3 ? lockdep_hardirqs_on_prepare+0xf6/0x1e3 entry_SYSCALL_64_after_hwframe+0x44/0xae RIP: 0033:0x7fa99ef681e9 Code: 00 00 b8 ca 00 00 00 0f 05 eb ac 66 0f 1f 44 00 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 4f fc 0b 00 f7 d8 64 89 01 48 RSP: 002b:00007fff06041ba8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 RAX: ffffffffffffffda RBX: 000055f2d378be20 RCX: 00007fa99ef681e9 RDX: 0000000000000000 RSI: 00007fa99f0af97f RDI: 0000000000000018 RBP: 0000000000020000 R08: 0000000000000000 R09: fffffffffffffeb8 R10: 0000000000000018 R11: 0000000000000246 R12: 0000000000000000 R13: 000055f2d38eba60 R14: 00007fa99f0af97f R15: 0000000000000000 -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

2 3

[PATCH] drm/ast: Atomic CR/SR reg R/W
by KuoHsiang Chou 03 May '22

03 May '22

1. Avoid IO-index racing 2. IO-index racing happened on resolustion switching and mouse moving at the same time 3. System hung while IO-index racing occurred. Signed-off-by: KuoHsiang Chou <kuohsiang_chou(a)aspeedtech.com> --- drivers/gpu/drm/ast/ast_main.c | 48 +++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 79a361867..1d8fa70c5 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -41,28 +41,52 @@ void ast_set_index_reg_mask(struct ast_private *ast, uint32_t base, uint8_t index, uint8_t mask, uint8_t val) { - u8 tmp; - ast_io_write8(ast, base, index); - tmp = (ast_io_read8(ast, base + 1) & mask) | val; - ast_set_index_reg(ast, base, index, tmp); + uint16_t volatile usData; + uint8_t volatile jData; + + do { + ast_io_write8(ast, base, index); + usData = ast_io_read16(ast, base); + } while ((uint8_t)(usData) != index); + + jData = (uint8_t)(usData >> 8); + jData &= mask; + jData |= val; + usData = ((uint16_t) jData << 8) | (uint16_t) index; + ast_io_write16(ast, base, usData); } uint8_t ast_get_index_reg(struct ast_private *ast, uint32_t base, uint8_t index) { - uint8_t ret; - ast_io_write8(ast, base, index); - ret = ast_io_read8(ast, base + 1); - return ret; + uint16_t volatile usData; + uint8_t volatile jData; + + do { + ast_io_write8(ast, base, index); + usData = ast_io_read16(ast, base); + } while ((uint8_t)(usData) != index); + + jData = (uint8_t)(usData >> 8); + + return jData; } uint8_t ast_get_index_reg_mask(struct ast_private *ast, uint32_t base, uint8_t index, uint8_t mask) { - uint8_t ret; - ast_io_write8(ast, base, index); - ret = ast_io_read8(ast, base + 1) & mask; - return ret; + uint16_t volatile usData; + uint8_t volatile jData; + + do { + ast_io_write8(ast, base, index); + usData = ast_io_read16(ast, base); + } while ((uint8_t)(usData) != index); + + jData = (uint8_t)(usData >> 8); + jData &= mask; + + return jData; } static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) -- 2.18.4

3 7

[PATCH] drm/rockchip: Support YUV formats with U/V swapped
by Chen-Yu Tsai 02 May '22

02 May '22

The VOP in Rockchip SoCs that support YUV planes also support swapping of the U and V elements. Supporting the swapped variants, especially NV21, would be beneficial for multimedia applications, as the hardware video decoders only output NV21, and supporting this pixel format in the display pipeline would allow the decoded video frames to be output directly. Add support for this to support the various formats that have U/V swapped. Signed-off-by: Chen-Yu Tsai <wenst(a)chromium.org> --- This was tested on an ROC-RK3399-PC with modetest only. Changes to all other SoC platforms were based on their respective TRMs. --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 20 +++++++++++++++++++- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 + drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 11 +++++++++++ 3 files changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 3e8d9e2d1b67..c75b39474977 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -262,6 +262,18 @@ static bool has_rb_swapped(uint32_t format) } } +static bool has_uv_swapped(uint32_t format) +{ + switch (format) { + case DRM_FORMAT_NV21: + case DRM_FORMAT_NV61: + case DRM_FORMAT_NV42: + return true; + default: + return false; + } +} + static enum vop_data_format vop_convert_format(uint32_t format) { switch (format) { @@ -277,10 +289,13 @@ static enum vop_data_format vop_convert_format(uint32_t format) case DRM_FORMAT_BGR565: return VOP_FMT_RGB565; case DRM_FORMAT_NV12: + case DRM_FORMAT_NV21: return VOP_FMT_YUV420SP; case DRM_FORMAT_NV16: + case DRM_FORMAT_NV61: return VOP_FMT_YUV422SP; case DRM_FORMAT_NV24: + case DRM_FORMAT_NV42: return VOP_FMT_YUV444SP; default: DRM_ERROR("unsupported format[%08x]\n", format); @@ -899,7 +914,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, unsigned long offset; dma_addr_t dma_addr; uint32_t val; - bool rb_swap; + bool rb_swap, uv_swap; int win_index = VOP_WIN_TO_INDEX(vop_win); int format; int is_yuv = fb->format->is_yuv; @@ -988,6 +1003,9 @@ static void vop_plane_atomic_update(struct drm_plane *plane, y2r_coefficients[i], bt601_yuv2rgb[i]); } + + uv_swap = has_uv_swapped(fb->format->format); + VOP_WIN_SET(vop, win, uv_swap, uv_swap); } if (win->phy->scl) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 857d97cdc67c..3aa95fdd427d 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -166,6 +166,7 @@ struct vop_win_phy { struct vop_reg gate; struct vop_reg format; struct vop_reg rb_swap; + struct vop_reg uv_swap; struct vop_reg act_info; struct vop_reg dsp_info; struct vop_reg dsp_st; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 1f7353f0684a..af2b07fafadf 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -46,8 +46,11 @@ static const uint32_t formats_win_full[] = { DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_NV12, + DRM_FORMAT_NV21, DRM_FORMAT_NV16, + DRM_FORMAT_NV61, DRM_FORMAT_NV24, + DRM_FORMAT_NV42, }; static const uint64_t format_modifiers_win_full[] = { @@ -272,6 +275,7 @@ static const struct vop_win_phy px30_win0_data = { .enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0), .format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1), .rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12), + .uv_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 15), .act_info = VOP_REG(PX30_WIN0_ACT_INFO, 0xffffffff, 0), .dsp_info = VOP_REG(PX30_WIN0_DSP_INFO, 0xffffffff, 0), .dsp_st = VOP_REG(PX30_WIN0_DSP_ST, 0xffffffff, 0), @@ -291,6 +295,7 @@ static const struct vop_win_phy px30_win1_data = { .enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0), .format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4), .rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12), + .uv_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 15), .dsp_info = VOP_REG(PX30_WIN1_DSP_INFO, 0xffffffff, 0), .dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0), .yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0), @@ -368,6 +373,7 @@ static const struct vop_win_phy rk3066_win0_data = { .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0), .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4), .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19), + .uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 22), .act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0), .dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0), @@ -386,6 +392,7 @@ static const struct vop_win_phy rk3066_win1_data = { .enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1), .format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7), .rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23), + .uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 26), .act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0), .dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0), @@ -489,6 +496,7 @@ static const struct vop_win_phy rk3188_win0_data = { .enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0), .format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3), .rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15), + .uv_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 18), .act_info = VOP_REG(RK3188_WIN0_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(RK3188_WIN0_DSP_INFO, 0x0fff0fff, 0), .dsp_st = VOP_REG(RK3188_WIN0_DSP_ST, 0x1fff1fff, 0), @@ -619,6 +627,7 @@ static const struct vop_win_phy rk3288_win01_data = { .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0), .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1), .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), + .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15), .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0), .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0), @@ -753,6 +762,7 @@ static const struct vop_win_phy rk3368_win01_data = { .enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0), .format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1), .rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12), + .uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15), .x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21), .y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22), .act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0), @@ -902,6 +912,7 @@ static const struct vop_win_phy rk3399_win01_data = { .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0), .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1), .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), + .uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15), .y_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 22), .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0), .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0), -- 2.34.1.703.g22d0c6ccf7-goog

2 1

[PATCH] drm/panel: panel-simple: Fix proper bpc for AM-1280800N3TZQW-T00H
by Jagan Teki 02 May '22

02 May '22

AM-1280800N3TZQW-T00H panel support 8 bpc not 6 bpc as per recent testing in i.MX8MM platform. Fix it. Fixes: bca684e69c4c ("drm/panel: simple: Add AM-1280800N3TZQW-T00H") Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- drivers/gpu/drm/panel/panel-simple.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index eb475a3a774b..cf3f21f649cb 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -719,7 +719,7 @@ static const struct drm_display_mode ampire_am_1280800n3tzqw_t00h_mode = { static const struct panel_desc ampire_am_1280800n3tzqw_t00h = { .modes = &ampire_am_1280800n3tzqw_t00h_mode, .num_modes = 1, - .bpc = 6, + .bpc = 8, .size = { .width = 217, .height = 136, -- 2.25.1

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[Bug 201991] New: amdgpu: clock management is disabled for the 4K resolution with polaris 10
by bugzilla-daemon＠bugzilla.kernel.org 29 Apr '22

29 Apr '22

https://bugzilla.kernel.org/show_bug.cgi?id=201991 Bug ID: 201991 Summary: amdgpu: clock management is disabled for the 4K resolution with polaris 10 Product: Drivers Version: 2.5 Kernel Version: 4.18.0,4.20.0-rc6, drm-next-4.21-wip Hardware: x86-64 OS: Linux Tree: Mainline Status: NEW Severity: enhancement Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: fin4478(a)hotmail.com Regression: No Created attachment 280019 --> https://bugzilla.kernel.org/attachment.cgi?id=280019&action=edit simple app for the amdgpu sys interface When the Xfce desktop is visible at 4K and idling, the engine clock is fixed at level 6: 1220MHz and you can not change that. The temperature is 38 C. When the monitor is sleeping, then the engine clock is 300Mhz. The automatic power management works with 2560x1600 and lower resolutions as espected. I tested with my python app and I have latest drivers, including firmware files. My monitor is ASUS VP28UQG and I use the display port. System: Host: ryzenpc Kernel: 4.20.0-rc6 x86_64 bits: 64 Desktop: Xfce 4.12.4 Distro: Debian GNU/Linux buster/sid Machine: Type: Desktop Mobo: ASUSTeK model: PRIME B350M-K v: Rev X.0x serial: <root required> UEFI [Legacy]: American Megatrends v: 4023 date: 08/20/2018 CPU: 6-Core: AMD Ryzen 5 1600 type: MT MCP speed: 2851 MHz Graphics: Device-1: AMD Ellesmere [Radeon RX 470/480] driver: amdgpu v: kernel Display: x11 server: X.Org 1.20.3 driver: amdgpu,ati unloaded: fbdev,modesetting,vesa resolution: 3840x2160~60Hz OpenGL: renderer: Radeon RX 570 Series (POLARIS10 DRM 3.27.0 4.20.0-rc6 LLVM 7.0.1) v: 4.5 Mesa 19.0.0-devel (git-9ebc00f 2018-12-13 bionic-oibaf-ppa) -- You are receiving this mail because: You are watching the assignee of the bug.

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[PATCH] drm/plane: Move range check for format_count earlier
by Steven Price 28 Apr '22

28 Apr '22

While the check for format_count > 64 in __drm_universal_plane_init() shouldn't be hit (it's a WARN_ON), in its current position it will then leak the plane->format_types array and fail to call drm_mode_object_unregister() leaking the modeset identifier. Move it to the start of the function to avoid allocating those resources in the first place. Signed-off-by: Steven Price <steven.price(a)arm.com> --- drivers/gpu/drm/drm_plane.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index 82afb854141b..fd0bf90fb4c2 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -249,6 +249,13 @@ static int __drm_universal_plane_init(struct drm_device *dev, if (WARN_ON(config->num_total_plane >= 32)) return -EINVAL; + /* + * First driver to need more than 64 formats needs to fix this. Each + * format is encoded as a bit and the current code only supports a u64. + */ + if (WARN_ON(format_count > 64)) + return -EINVAL; + WARN_ON(drm_drv_uses_atomic_modeset(dev) && (!funcs->atomic_destroy_state || !funcs->atomic_duplicate_state)); @@ -270,13 +277,6 @@ static int __drm_universal_plane_init(struct drm_device *dev, return -ENOMEM; } - /* - * First driver to need more than 64 formats needs to fix this. Each - * format is encoded as a bit and the current code only supports a u64. - */ - if (WARN_ON(format_count > 64)) - return -EINVAL; - if (format_modifiers) { const uint64_t *temp_modifiers = format_modifiers; -- 2.25.1

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[PATCH 1/2] drm/amdkfd: Use bitmap_zalloc() when applicable
by Christophe JAILLET 26 Apr '22

26 Apr '22

'kfd->gtt_sa_bitmap' is a bitmap. So use 'bitmap_zalloc()' to simplify code, improve the semantic and avoid some open-coded arithmetic in allocator arguments. Also change the corresponding 'kfree()' into 'bitmap_free()' to keep consistency. --- drivers/gpu/drm/amd/amdkfd/kfd_device.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c index e1294fba0c26..c5a0ce44a295 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c @@ -1252,8 +1252,6 @@ int kgd2kfd_schedule_evict_and_restore_process(struct mm_struct *mm, static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, unsigned int chunk_size) { - unsigned int num_of_longs; - if (WARN_ON(buf_size < chunk_size)) return -EINVAL; if (WARN_ON(buf_size == 0)) @@ -1264,11 +1262,8 @@ static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, kfd->gtt_sa_chunk_size = chunk_size; kfd->gtt_sa_num_of_chunks = buf_size / chunk_size; - num_of_longs = (kfd->gtt_sa_num_of_chunks + BITS_PER_LONG - 1) / - BITS_PER_LONG; - - kfd->gtt_sa_bitmap = kcalloc(num_of_longs, sizeof(long), GFP_KERNEL); - + kfd->gtt_sa_bitmap = bitmap_zalloc(kfd->gtt_sa_num_of_chunks, + GFP_KERNEL); if (!kfd->gtt_sa_bitmap) return -ENOMEM; @@ -1278,13 +1273,12 @@ static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size, mutex_init(&kfd->gtt_sa_lock); return 0; - } static void kfd_gtt_sa_fini(struct kfd_dev *kfd) { mutex_destroy(&kfd->gtt_sa_lock); - kfree(kfd->gtt_sa_bitmap); + bitmap_free(kfd->gtt_sa_bitmap); } static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr, -- 2.30.2

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[RFC 00/21] Renesas r8a7795/Salvator-X HDMI output prototype
by Ulrich Hecht 26 Apr '22

26 Apr '22

Hi! This is a prototype of HDMI output support for the Renesas r8a7795 SoC and Salvator-X board. It is based on the renesas-devel-20160516-v4.6 tree and includes the bridge API conversion patches to the adv7511 and rcar-du drivers written by Archit Taneja. The obvious issue with this series is the awkward binding of the dw-hdmi bridge IP, which can be seen in the "drm: rcar-du: Add dw_hdmi driver startup" patch. Any comments on how to implement this interface properly are much appreciated. Functionally, this series works as expected on both connectors, but EDID reading is currently broken. CU Uli Archit Taneja (2): drm: rcar-du: Remove i2c slave encoder interface for hdmi encoder drm: i2c: adv7511: Convert to drm_bridge Koji Matsuoka (12): media: vsp1: Set format to RPF input source drm: bridge/dw_hdmi: Fix R-Car Gen3 device support drm: rcar-du: Add R8A7795 device support drm: rcar-du: Add dw_hdmi driver startup drm: rcar-du: Add DPLL support drm: rcar-du: Fix display registers for R-Car Gen3 drm: rcar-du: Fix VSP plane number per devices drm: rcar-du: Fix VSP feed plane number drm: rcar-du: Add pixel format support drm: rcar-du: Fix display max size to 4096x2160 size arm64: dts: salvator-x: Add DU pins, HDMI connectors and encoder arm64: configs: Enable R-Car DU related config Kuninori Morimoto (1): arm64: defconfig: add VIDEO_RENESAS_FCP Ulrich Hecht (5): v4l: vsp1: Change VSP1 LIF linebuffer FIFO pinctrl: sh-pfc: r8a7795: Add DU support pinctrl: sh-pfc: r8a7795: Add HDMI CEC support arm64: dts: r8a7795: Add HDMI encoder support arm64: dts: r8a7795: add HDMI support to DU Vladimir Zapolskiy (1): drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 107 +++++ arch/arm64/boot/dts/renesas/r8a7795.dtsi | 33 +- arch/arm64/configs/defconfig | 15 + drivers/gpu/drm/bridge/dw-hdmi.c | 489 +++++++++++++++++++-- drivers/gpu/drm/i2c/adv7511.c | 224 ++++++---- drivers/gpu/drm/rcar-du/Kconfig | 2 + drivers/gpu/drm/rcar-du/Makefile | 3 +- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 97 +++- drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 12 +- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 20 +- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 6 +- drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 12 +- drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 13 +- drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 + drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c | 117 ----- drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h | 31 -- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c | 260 ++++++++--- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 68 ++- drivers/gpu/drm/rcar-du/rcar_du_kms.h | 1 + drivers/gpu/drm/rcar-du/rcar_du_plane.c | 8 +- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 7 +- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 19 + drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 51 ++- drivers/media/platform/vsp1/vsp1_drm.c | 6 + drivers/media/platform/vsp1/vsp1_lif.c | 6 +- drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 113 +++++ include/drm/bridge/dw_hdmi.h | 9 + 27 files changed, 1388 insertions(+), 346 deletions(-) delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.c delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_hdmicon.h -- 2.7.4

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[Bug 214991] New: VC4 DRM waiting for flip down makes UI freeze a while with kernel 5.15
by bugzilla-daemon＠bugzilla.kernel.org 22 Apr '22

22 Apr '22

https://bugzilla.kernel.org/show_bug.cgi?id=214991 Bug ID: 214991 Summary: VC4 DRM waiting for flip down makes UI freeze a while with kernel 5.15 Product: Drivers Version: 2.5 Kernel Version: 5.15 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: Video(DRI - non Intel) Assignee: drivers_video-dri(a)kernel-bugs.osdl.org Reporter: jhp(a)endlessos.org Regression: No Created attachment 299547 --> https://bugzilla.kernel.org/attachment.cgi?id=299547&action=edit Full dmesg log I tested Linux mainline kernel 5.15 (aarch64) with enabled VC4 on RPi 4B. I notice UI freezes a while (about 10 seconds) some times. The kernel shows the error message during the time: [drm:drm_crtc_commit_wait] *ERROR* flip_done timed out [drm:drm_atomic_helper_wait_for_flip_done] *ERROR* [CRTC:68:crtc-3] flip_done timed out [drm:drm_atomic_helper_wait_for_dependencies] *ERROR* [CRTC:68:crtc-3] commit wait timed out [drm:drm_crtc_commit_wait] *ERROR* flip_done timed out vc4-drm gpu: [drm] *ERROR* Timed out waiting for commit It is easy to reproduce this issue by invoking GL related things, for example es2gears. After detail test, I found it is related to these commits: f3c420fe19f8 ("drm/vc4: kms: Convert to atomic helpers") 82faa3276012 ("drm/vc4: kms: Remove async modeset semaphore") This issue cannot be reproduced after I revert the commits. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.

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