dri-devel April 2022

dri-devel@lists.freedesktop.org

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951 discussions

[PATCH] drm: fix typo in comment
by Raphael Gallais-Pou 04 May '22

04 May '22

Fix typo in a doxygen comment (replaced green by blue) in drm_color_mgmt.c Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou(a)foss.st.com> --- drivers/gpu/drm/drm_color_mgmt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index 9079fbe21d2f..17c6c3eefcd6 100644 --- a/drivers/gpu/drm/drm_color_mgmt.c +++ b/drivers/gpu/drm/drm_color_mgmt.c @@ -259,7 +259,7 @@ static bool drm_crtc_supports_legacy_gamma(struct drm_crtc *crtc) * @crtc: CRTC object * @red: red correction table * @green: green correction table - * @blue: green correction table + * @blue: blue correction table * @size: size of the tables * @ctx: lock acquire context * -- 2.25.1

2 1

[PATCH v5 0/4] Add mt8186 dsi compatoble & Convert dsi_dtbinding to .yaml
by Rex-BC Chen 04 May '22

04 May '22

Changes since v4: 1. Modify DSI dt-binding. 2. Add support for MT8186 DSI in mtk_drm_drv.c. Changes since v3: 1. Add dsi port property. 2. Fix some formatting. Changes since v2: 1. Added #address-cells, #size-cells two properties. 2. Fix some formatting issues. Changes since v1: 1. Delete the mediatek,dsi.txt & Add the mediatek,dsi.yaml. 2. Ignore the Move the getting bridge node function patch for V1. Rex-BC Chen (1): drm/mediatek: Add MT8186 DSI compatible for mtk_drm_drv.c Xinlei Lee (3): dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c .../display/mediatek/mediatek,dsi.txt | 62 --------- .../display/mediatek/mediatek,dsi.yaml | 123 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 + drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++ 4 files changed, 133 insertions(+), 62 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml -- 2.18.0

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[PATCH] drm/bridge: ite-it6505: add missing Kconfig option select
by Fabien Parent 04 May '22

04 May '22

The IT6505 is using functions provided by the DRM_DP_HELPER driver. In order to avoid having the bridge enabled but the helper disabled, let's add a select in order to be sure that the DP helper functions are always available. Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") Signed-off-by: Fabien Parent <fparent(a)baylibre.com> --- drivers/gpu/drm/bridge/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 007e5a282f67..2145b08f9534 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig @@ -78,6 +78,7 @@ config DRM_ITE_IT6505 tristate "ITE IT6505 DisplayPort bridge" depends on OF select DRM_KMS_HELPER + select DRM_DP_HELPER select EXTCON help ITE IT6505 DisplayPort bridge chip driver. -- 2.36.0

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[PATCH -next] drm: mediatek: mtk_dsi: Remove unnecessary print function dev_err()
by Yang Li 04 May '22

04 May '22

The print function dev_err() is redundant because platform_get_irq() already prints an error. Eliminate the follow coccicheck warning: ./drivers/gpu/drm/mediatek/mtk_dsi.c:1092:2-9: line 1092 is redundant because platform_get_irq() already prints an error Reported-by: Abaci Robot <abaci(a)linux.alibaba.com> Signed-off-by: Yang Li <yang.lee(a)linux.alibaba.com> --- drivers/gpu/drm/mediatek/mtk_dsi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index bced4c7d668e..704252ee1198 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -1089,7 +1089,6 @@ static int mtk_dsi_probe(struct platform_device *pdev) irq_num = platform_get_irq(pdev, 0); if (irq_num < 0) { - dev_err(&pdev->dev, "failed to get dsi irq_num: %d\n", irq_num); ret = irq_num; goto err_unregister_host; } -- 2.20.1.7.g153144c

2 1

[RFC PATCH 0/6] drm/dp: Improvements for DP AUX channel
by Douglas Anderson 03 May '22

03 May '22

This patch addresses pre-existing issues that came up during the review process of Sankeerth's series trying to add eDP for Qualcomm SoCs [1]. It's really sorta two series but jammed into one. The first two patches fix a problem with ps8640 when the panel doesn't finish probing right away. The rest of the patches attempt to improve how eDP panel drivers deal with the HPD signal. NOTE: if everyone hates the "generic driver" that I added in the first patch, I have a different version that just adds uses the Linux auxiliary bus stright in ps8640. I'm happy to switch back to that, but it seemed like a buncha copy-pasta that I was hoping to avoid. I haven't done a crazy amount of testing with this, but it seems to work and I wanted to get something out there. I'll try to do some more testing next week. This is why I added the tag "RFC". It's entirely possibled that I've actually caught all the bugs and this is great, but I just wanted to be sure. This _doesn't_ attempt to fix the Analogix driver. If this works out, ideally someone can post a patch up to do that. [1] https://lore.kernel.org/r/1648656179-10347-2-git-send-email-quic_sbillaka@q… Douglas Anderson (6): drm/dp: Helpers to make it easier for drivers to use DP AUX bus properly drm/bridge: parade-ps8640: Break probe in two to handle DP AUX better drm/dp: Add is_hpd_asserted() callback to struct drm_dp_aux drm/panel-edp: Take advantage of is_hpd_asserted() in struct drm_dp_aux drm/panel: atna33xc20: Take advantage of is_hpd_asserted() in struct drm_dp_aux drm/bridge: parade-ps8640: Provide is_hpd_asserted() in struct drm_dp_aux drivers/gpu/drm/bridge/parade-ps8640.c | 87 +++++---- drivers/gpu/drm/dp/drm_dp_aux_bus.c | 165 +++++++++++++++++- drivers/gpu/drm/panel/panel-edp.c | 37 +++- .../gpu/drm/panel/panel-samsung-atna33xc20.c | 35 +++- include/drm/dp/drm_dp_aux_bus.h | 58 ++++++ include/drm/dp/drm_dp_helper.h | 14 ++ 6 files changed, 353 insertions(+), 43 deletions(-) -- 2.35.1.1178.g4f1659d476-goog

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[PATCH v4] drm/hyperv: Add error message for fb size greater than allocated
by Saurabh Sengar 03 May '22

03 May '22

Add error message when the size of requested framebuffer is more than the allocated size by vmbus mmio region for framebuffer Signed-off-by: Saurabh Sengar <ssengar(a)linux.microsoft.com> --- v3 -> v4 : * Shorter error message * Alignment match for open parenthesis * Added -> Add (typo fix in commit message) drivers/gpu/drm/hyperv/hyperv_drm_modeset.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/hyperv/hyperv_drm_modeset.c b/drivers/gpu/drm/hyperv/hyperv_drm_modeset.c index e82b815..27f4fcb 100644 --- a/drivers/gpu/drm/hyperv/hyperv_drm_modeset.c +++ b/drivers/gpu/drm/hyperv/hyperv_drm_modeset.c @@ -123,8 +123,11 @@ static int hyperv_pipe_check(struct drm_simple_display_pipe *pipe, if (fb->format->format != DRM_FORMAT_XRGB8888) return -EINVAL; - if (fb->pitches[0] * fb->height > hv->fb_size) + if (fb->pitches[0] * fb->height > hv->fb_size) { + drm_err(&hv->dev, "fb size requested by %s for %dX%d (pitch %d) greater than %ld\n", + current->comm, fb->width, fb->height, fb->pitches[0], hv->fb_size); return -EINVAL; + } return 0; } -- 1.8.3.1

4 3

[PATCH v2] drm/doc: add rfc section for small BAR uapi
by Matthew Auld 03 May '22

03 May '22

Add an entry for the new uapi needed for small BAR on DG2+. v2: - Some spelling fixes and other small tweaks. (Akeem & Thomas) - Rework error capture interactions, including no longer needing NEEDS_CPU_ACCESS for objects marked for capture. (Thomas) - Add probed_cpu_visible_size. (Lionel) Signed-off-by: Matthew Auld <matthew.auld(a)intel.com> Cc: Thomas Hellström <thomas.hellstrom(a)linux.intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin(a)intel.com> Cc: Jon Bloomfield <jon.bloomfield(a)intel.com> Cc: Daniel Vetter <daniel.vetter(a)ffwll.ch> Cc: Jordan Justen <jordan.l.justen(a)intel.com> Cc: Kenneth Graunke <kenneth(a)whitecape.org> Cc: Akeem G Abodunrin <akeem.g.abodunrin(a)intel.com> Cc: mesa-dev(a)lists.freedesktop.org --- Documentation/gpu/rfc/i915_small_bar.h | 190 +++++++++++++++++++++++ Documentation/gpu/rfc/i915_small_bar.rst | 58 +++++++ Documentation/gpu/rfc/index.rst | 4 + 3 files changed, 252 insertions(+) create mode 100644 Documentation/gpu/rfc/i915_small_bar.h create mode 100644 Documentation/gpu/rfc/i915_small_bar.rst diff --git a/Documentation/gpu/rfc/i915_small_bar.h b/Documentation/gpu/rfc/i915_small_bar.h new file mode 100644 index 000000000000..7bfd0cf44d35 --- /dev/null +++ b/Documentation/gpu/rfc/i915_small_bar.h @@ -0,0 +1,190 @@ +/** + * struct __drm_i915_memory_region_info - Describes one region as known to the + * driver. + * + * Note this is using both struct drm_i915_query_item and struct drm_i915_query. + * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS + * at &drm_i915_query_item.query_id. + */ +struct __drm_i915_memory_region_info { + /** @region: The class:instance pair encoding */ + struct drm_i915_gem_memory_class_instance region; + + /** @rsvd0: MBZ */ + __u32 rsvd0; + + /** @probed_size: Memory probed by the driver (-1 = unknown) */ + __u64 probed_size; + + /** @unallocated_size: Estimate of memory remaining (-1 = unknown) */ + __u64 unallocated_size; + + union { + /** @rsvd1: MBZ */ + __u64 rsvd1[8]; + struct { + /** + * @probed_cpu_visible_size: Memory probed by the driver + * that is CPU accessible. (-1 = unknown). + * + * This will be always be <= @probed_size, and the + * remainder(if there is any) will not be CPU + * accessible. + */ + __u64 probed_cpu_visible_size; + }; + }; +}; + +/** + * struct __drm_i915_gem_create_ext - Existing gem_create behaviour, with added + * extension support using struct i915_user_extension. + * + * Note that new buffer flags should be added here, at least for the stuff that + * is immutable. Previously we would have two ioctls, one to create the object + * with gem_create, and another to apply various parameters, however this + * creates some ambiguity for the params which are considered immutable. Also in + * general we're phasing out the various SET/GET ioctls. + */ +struct __drm_i915_gem_create_ext { + /** + * @size: Requested size for the object. + * + * The (page-aligned) allocated size for the object will be returned. + * + * Note that for some devices we have might have further minimum + * page-size restrictions(larger than 4K), like for device local-memory. + * However in general the final size here should always reflect any + * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS + * extension to place the object in device local-memory. + */ + __u64 size; + /** + * @handle: Returned handle for the object. + * + * Object handles are nonzero. + */ + __u32 handle; + /** + * @flags: Optional flags. + * + * Supported values: + * + * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS - Signal to the kernel that + * the object will need to be accessed via the CPU. + * + * Only valid when placing objects in I915_MEMORY_CLASS_DEVICE, and + * only strictly required on platforms where only some of the device + * memory is directly visible or mappable through the CPU, like on DG2+. + * + * One of the placements MUST also be I915_MEMORY_CLASS_SYSTEM, to + * ensure we can always spill the allocation to system memory, if we + * can't place the object in the mappable part of + * I915_MEMORY_CLASS_DEVICE. + * + * Note that since the kernel only supports flat-CCS on objects that can + * *only* be placed in I915_MEMORY_CLASS_DEVICE, we therefore don't + * support I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS together with + * flat-CCS. + * + * Without this hint, the kernel will assume that non-mappable + * I915_MEMORY_CLASS_DEVICE is preferred for this object. Note that the + * kernel can still migrate the object to the mappable part, as a last + * resort, if userspace ever CPU faults this object, but this might be + * expensive, and so ideally should be avoided. + */ +#define I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS (1 << 0) + __u32 flags; + /** + * @extensions: The chain of extensions to apply to this object. + * + * This will be useful in the future when we need to support several + * different extensions, and we need to apply more than one when + * creating the object. See struct i915_user_extension. + * + * If we don't supply any extensions then we get the same old gem_create + * behaviour. + * + * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see + * struct drm_i915_gem_create_ext_memory_regions. + * + * For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see + * struct drm_i915_gem_create_ext_protected_content. + */ +#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0 +#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1 + __u64 extensions; +}; + +#define DRM_I915_QUERY_VMA_INFO 5 + +/** + * struct __drm_i915_query_vma_info + * + * Given a vm and GTT address, lookup the corresponding vma, returning its set + * of attributes. + * + * .. code-block:: C + * + * struct drm_i915_query_vma_info info = {}; + * struct drm_i915_query_item item = { + * .data_ptr = (uintptr_t)&info, + * .query_id = DRM_I915_QUERY_VMA_INFO, + * }; + * struct drm_i915_query query = { + * .num_items = 1, + * .items_ptr = (uintptr_t)&item, + * }; + * int err; + * + * // Unlike some other types of queries, there is no need to first query + * // the size of the data_ptr blob here, since we already know ahead of + * // time how big this needs to be. + * item.length = sizeof(info); + * + * // Next we fill in the vm_id and ppGTT address of the vma we wish + * // to query, before then firing off the query. + * info.vm_id = vm_id; + * info.offset = gtt_address; + * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query); + * if (err || item.length < 0) ... + * + * // If all went well we can now inspect the returned attributes. + * if (info.attributes & DRM_I915_QUERY_VMA_INFO_CPU_VISIBLE) ... + */ +struct __drm_i915_query_vma_info { + /** + * @vm_id: The given vm id that contains the vma. The id is the value + * returned by the DRM_I915_GEM_VM_CREATE. See struct + * drm_i915_gem_vm_control.vm_id. + */ + __u32 vm_id; + /** @pad: MBZ. */ + __u32 pad; + /** + * @offset: The corresponding ppGTT address of the vma which the kernel + * will use to perform the lookup. + */ + __u64 offset; + /** + * @attributes: The returned attributes for the given vma. + * + * Possible values: + * + * DRM_I915_QUERY_VMA_INFO_CPU_VISIBLE - Set if the pages backing the + * vma are currently CPU accessible. If this is not set then the vma is + * currently backed by I915_MEMORY_CLASS_DEVICE memory, which the CPU + * cannot directly access(this is only possible on discrete devices with + * a small BAR). Attempting to MMAP and fault such an object will + * require the kernel first synchronising any GPU work tied to the + * object, before then migrating the pages, either to the CPU accessible + * part of I915_MEMORY_CLASS_DEVICE, or I915_MEMORY_CLASS_SYSTEM, if the + * placements permit it. See I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS. + * + * Note that this is inherently racy. + */ +#define DRM_I915_QUERY_VMA_INFO_CPU_VISIBLE (1<<0) + __u64 attributes; + /** @rsvd: MBZ */ + __u32 rsvd[4]; +}; diff --git a/Documentation/gpu/rfc/i915_small_bar.rst b/Documentation/gpu/rfc/i915_small_bar.rst new file mode 100644 index 000000000000..be3d9bcdd86d --- /dev/null +++ b/Documentation/gpu/rfc/i915_small_bar.rst @@ -0,0 +1,58 @@ +========================== +I915 Small BAR RFC Section +========================== +Starting from DG2 we will have resizable BAR support for device local-memory(i.e +I915_MEMORY_CLASS_DEVICE), but in some cases the final BAR size might still be +smaller than the total probed_size. In such cases, only some subset of +I915_MEMORY_CLASS_DEVICE will be CPU accessible(for example the first 256M), +while the remainder is only accessible via the GPU. + +I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS flag +---------------------------------------------- +New gem_create_ext flag to tell the kernel that a BO will require CPU access. +This becomes important when placing an object in I915_MEMORY_CLASS_DEVICE, where +underneath the device has a small BAR, meaning only some portion of it is CPU +accessible. Without this flag the kernel will assume that CPU access is not +required, and prioritize using the non-CPU visible portion of +I915_MEMORY_CLASS_DEVICE. + +.. kernel-doc:: Documentation/gpu/rfc/i915_small_bar.h + :functions: __drm_i915_gem_create_ext + +probed_cpu_visible_size attribute +--------------------------------- +New struct__drm_i915_memory_region attribute which returns the total size of the +CPU accessible portion, for the particular region. This should only be +applicable for I915_MEMORY_CLASS_DEVICE. + +Vulkan will need this as part of creating a separate VkMemoryHeap with the +VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT set, to represent the CPU visible portion, +where the total size of the heap needs to be known. + +.. kernel-doc:: Documentation/gpu/rfc/i915_small_bar.h + :functions: __drm_i915_memory_region_info + +DRM_I915_QUERY_VMA_INFO query +----------------------------- +Query the attributes of some vma. Given a vm and GTT offset, find the +respective vma, and return its set of attributes. For now we only support +DRM_I915_QUERY_VMA_INFO_CPU_VISIBLE, which is set if the object/vma is +currently placed in memory that is accessible by the CPU. This should always be +set on devices where the CPU probed_cpu_visible_size of I915_MEMORY_CLASS_DEVICE +matches the probed_size. If this is not set then CPU faulting the object will +likely first require migrating the pages. + +.. kernel-doc:: Documentation/gpu/rfc/i915_small_bar.h + :functions: __drm_i915_query_vma_info + +Error Capture restrictions +-------------------------- +With error capture we have two new restrictions: + + 1) Error capture is best effort on small BAR systems; if the pages are not + CPU accessible, at the time of capture, then the kernel is free to skip + trying to capture them. + + 2) On discrete we now reject error capture on recoverable contexts. In the + future the kernel may want to blit during error capture, when for example + something is not currently CPU accessible. diff --git a/Documentation/gpu/rfc/index.rst b/Documentation/gpu/rfc/index.rst index 91e93a705230..5a3bd3924ba6 100644 --- a/Documentation/gpu/rfc/index.rst +++ b/Documentation/gpu/rfc/index.rst @@ -23,3 +23,7 @@ host such documentation: .. toctree:: i915_scheduler.rst + +.. toctree:: + + i915_small_bar.rst -- 2.34.1

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[PATCHv4] drm/amdgpu: disable ASPM on Intel Alder Lake based systems
by Richard Gong 03 May '22

03 May '22

Active State Power Management (ASPM) feature is enabled since kernel 5.14. There are some AMD GFX cards (such as WX3200 and RX640) that won't work with ASPM-enabled Intel Alder Lake based systems. Using these GFX cards as video/display output, Intel Alder Lake based systems will hang during suspend/resume. The issue was initially reported on one system (Dell Precision 3660 with BIOS version 0.14.81), but was later confirmed to affect at least 4 Alder Lake based systems. Add extra check to disable ASPM on Intel Alder Lake based systems. Fixes: 0064b0ce85bb ("drm/amd/pm: enable ASPM by default") Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885 Reported-by: kernel test robot <lkp(a)intel.com> Signed-off-by: Richard Gong <richard.gong(a)amd.com> --- v4: s/CONFIG_X86_64/CONFIG_X86 enhanced check logic v3: s/intel_core_asom_chk/aspm_support_quirk_check correct build error with W=1 option v2: correct commit description move the check from chip family to problematic platform --- drivers/gpu/drm/amd/amdgpu/vi.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index 039b90cdc3bc..b33e0a9bee65 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -81,6 +81,10 @@ #include "mxgpu_vi.h" #include "amdgpu_dm.h" +#if IS_ENABLED(CONFIG_X86) +#include <asm/intel-family.h> +#endif + #define ixPCIE_LC_L1_PM_SUBSTATE 0x100100C6 #define PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK 0x00000001L #define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK 0x00000002L @@ -1134,13 +1138,24 @@ static void vi_enable_aspm(struct amdgpu_device *adev) WREG32_PCIE(ixPCIE_LC_CNTL, data); } +static bool aspm_support_quirk_check(void) +{ + if (IS_ENABLED(CONFIG_X86)) { + struct cpuinfo_x86 *c = &cpu_data(0); + + return !(c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE); + } + + return true; +} + static void vi_program_aspm(struct amdgpu_device *adev) { u32 data, data1, orig; bool bL1SS = false; bool bClkReqSupport = true; - if (!amdgpu_device_should_use_aspm(adev)) + if (!amdgpu_device_should_use_aspm(adev) || !aspm_support_quirk_check()) return; if (adev->flags & AMD_IS_APU || -- 2.25.1

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[PATCH 0/4] drm/format-helper: Share common code among conversion helpers
by Thomas Zimmermann 03 May '22

03 May '22

Move all format-specific handling in per-line conversion functions and share the overall loop among conversion helpers. This is another step towards composable format conversion. Thomas Zimmermann (4): drm/format-helper: Implement drm_fb_swab() with per-line helpers drm/format-helper: Remove optional byte-swap from line convertion drm/format-helper: Unify the parameters of all per-line conversion helpers drm/format-helper: Share implementation among conversion helpers drivers/gpu/drm/drm_format_helper.c | 479 ++++++++++++---------------- 1 file changed, 198 insertions(+), 281 deletions(-) -- 2.36.0

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[PATCH v18 00/21] Add MediaTek SoC DRM (vdosys1) support for mt8195
by Nancy.Lin 03 May '22

03 May '22

The hardware path of vdosys1 with DPTx output need to go through by several modules, such as, OVL_ADAPTOR and MERGE. Add DRM and these modules support by the patches below: Changes in v18: - fix reviewer comment - fix rdma binding doc - fix ethdr binding doc - refine mmsys config cmdq support - refine merge reset control flow, get reset control in probe function - add ethdr reset control error handling and remove dbg log - rebase to vdosys0 series v20 (ref [5]) Changes in v17: - fix reviewer comment in v16 - separate ovl adaptor comp in mtk-mmsys and mtk-mutex - separate mmsys config API - move mdp_rdma binding yaml - fix ovl adaptor pm runtime get sync timing issue - rebase to vdosys0 series v19 (ref [5]) - rebase to [7] for modify vblank register change Changes in v16: - fix reviewer comment in v 15 - fix mtk_drm_ddp_comp.c alignment - fix vdosys0 mmsys num before adding vdosys1 patch Changes in v15: - fix ethdr uppercase hex number in dts Changes in v14: - remove MTK_MMSYS 64 bit dependency - add ethdr.yaml back and fix dt_schema check fail Resend v13 - add related maintainer in maillist Changes in v13: - fix reviewer comment in v12 - fix rdma dt-binding format - fix dts node naming - fix 32 bit build error - modify 64bit dependency for mtk-mmsys - rebase to vdosys0 series v16. (ref [5]) Changes in v12: - fix reviewer comment in v11 - modify mbox index - refine dma dev for ovl_adaptor sub driver Changes in v11: - remove ethdr vblank spin lock - refine ovl_adaptor print message Changes in v10: - refine ethdr reset control using devm_reset_control_array_get_optional_exclusive - fix ovl_adaptor mtk_ovl_adaptor_clk_enable error handle issue Changes in v9: - rebase on kernel-5.16-rc1 - rebase on vdosys0 series v13. (ref [5]) - fix ovl_adaptor sub driver is brought up unintentionally - fix clang build test fail- duplicate ethdr/mdp_rdma init_module/cleanup_module symbol issue Changes in v8: - separate merge async reset to new patch. - separate drm ovl_adaptor sub driver to new patch. - fix reviewer comment in v7. Changes in v7: - rebase on vdosys0 series v12 (ref[5]) - add dma description in ethdr binding document. - refine vdosys1 bit definition of mmsys routing table. - separate merge modification into 3 pathces. - separate mutex modification into 2 patches. - add plane color coding for mdp_rdma csc. - move mdp_rdma pm control to ovl_adaptor. - fix reviewer comment in v6. Changes in v6: - rebase on kernel-5.15-rc1. - change mbox label to gce0 for dts node of vdosys1. - modify mmsys reset num for mt8195. - rebase on vdosys0 series v10. (ref [5]) - use drm to bring up ovl_adaptor driver. - move drm iommu/mutex check from kms init to drm bind. - modify rdma binding doc location. (Documentation/devicetree/bindings/arm/) - modify for reviewer's comment in v5. Changes in v5: - add mmsys reset controller reference. Changes in v4: - use merge common driver for merge1~4. - refine ovl_adaptor rdma driver. - use ovl_adaptor ddp_comp function instead of ethdr. - modify for reviewer's comment in v3. Changes in v3: - modify for reviewer's comment in v2. - add vdosys1 2 pixels align limit. - add mixer odd offset support. Changes in v2: - Merge PSEUDO_OVL and ETHDR into one DRM component. - Add mmsys config API for vdosys1 hardware setting. - Add mmsys reset control using linux reset framework. Signed-off-by: Nancy.Lin <nancy.lin(a)mediatek.com> This series are based on the following patch: [1] arm64: dts: Add mediatek SoC mt8195 and evaluation board 20220112114724.1953-4-tinghan.shen(a)mediatek.com [2] arm64: dts: mt8195: add IOMMU and smi nodes 20210615173233.26682-15-tinghan.shen(a)mediatek.com [3] arm64: dts: mt8195: add gce node 20220126090109.32143-1-jason-jh.lin(a)mediatek.com [4] [v2] arm64: dts: mt8195: add display node for vdosys0 20220225021535.2655-1-jason-jh.lin(a)mediatek.com [5] Add MediaTek SoC DRM (vdosys0) support for mt8195 - v20 series 20220419094143.9561-1-jason-jh.lin(a)mediatek.com [6] dt-bindings: mediatek: mt8195: Add binding for MM IOMMU 20220407075726.17771-2-yong.wu(a)mediatek.com [7] [V2] drm/mediatek: Add vblank register/unregister callback functions 20220321072320.15019-1-rex-bc.chen(a)mediatek.com Nancy.Lin (21): dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 dt-bindings: reset: mt8195: add vdosys1 reset control bit dt-bindings: mediatek: add ethdr definition for mt8195 soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1 soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1 soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 soc: mediatek: add mtk-mutex support for mt8195 vdosys1 drm/mediatek: add display MDP RDMA support for MT8195 drm/mediatek: add display merge advance config API for MT8195 drm/mediatek: add display merge start/stop API for cmdq support drm/mediatek: add display merge mute/unmute support for MT8195 drm/mediatek: add display merge async reset control drm/mediatek: add ETHDR support for MT8195 drm/mediatek: add mediatek-drm plane color encoding info drm/mediatek: add ovl_adaptor support for MT8195 drm/mediatek: add dma dev get function drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support drm/mediatek: add drm ovl_adaptor sub driver for MT8195 drm/mediatek: add mediatek-drm of vdosys1 support for MT8195 arm64: dts: mt8195: add display node for vdosys1 .../display/mediatek/mediatek,ethdr.yaml | 191 +++++++ .../display/mediatek/mediatek,mdp-rdma.yaml | 94 ++++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 227 +++++++- drivers/gpu/drm/mediatek/Makefile | 5 +- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 38 ++ drivers/gpu/drm/mediatek/mtk_disp_merge.c | 94 +++- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 514 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 96 ++-- drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 6 +- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 125 +++-- drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 58 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 351 ++++++++---- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 25 +- drivers/gpu/drm/mediatek/mtk_drm_plane.c | 1 + drivers/gpu/drm/mediatek/mtk_drm_plane.h | 1 + drivers/gpu/drm/mediatek/mtk_ethdr.c | 369 +++++++++++++ drivers/gpu/drm/mediatek/mtk_ethdr.h | 26 + drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 315 +++++++++++ drivers/gpu/drm/mediatek/mtk_mdp_rdma.h | 20 + drivers/soc/mediatek/mt8195-mmsys.h | 143 +++++ drivers/soc/mediatek/mtk-mmsys.c | 104 +++- drivers/soc/mediatek/mtk-mmsys.h | 1 + drivers/soc/mediatek/mtk-mutex.c | 37 ++ include/dt-bindings/reset/mt8195-resets.h | 12 + include/linux/soc/mediatek/mtk-mmsys.h | 25 + 25 files changed, 2661 insertions(+), 217 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.c create mode 100644 drivers/gpu/drm/mediatek/mtk_ethdr.h create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.c create mode 100644 drivers/gpu/drm/mediatek/mtk_mdp_rdma.h -- 2.18.0

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dri-devel April 2022