From: Zack Rusin <zackr(a)vmware.com>
v2: Add the last part of the ref count fix which was spotted by
Philipp Sieweck where the ref count of cpu writers is off due to
ERESTARTSYS or EBUSY during bo waits.
The initial GEM port broke refcounting on shareable (prime) surfaces and
memory evictions. The prime surfaces broke because the parent surfaces
weren't increasing the ref count on GEM surfaces, which meant that
the memory backing textures could have been deleted while the texture
was …
[View More]still accessible. The evictions broke due to a typo, the code was
supposed to exit if the passed buffers were not vmw_buffer_object
not if they were. They're tied because the evictions depend on having
memory to actually evict.
This fixes crashes with XA state tracker which is used for xrender
acceleration on xf86-video-vmware, apps/tests which use a lot of
memory (a good test being the piglit's streaming-texture-leak) and
desktops.
Signed-off-by: Zack Rusin <zackr(a)vmware.com>
Fixes: 8afa13a0583f ("drm/vmwgfx: Implement DRIVER_GEM")
Reported-by: Philipp Sieweck <psi(a)informatik.uni-kiel.de>
Cc: <stable(a)vger.kernel.org> # v5.17+
Reviewed-by: Maaz Mombasawala <mombasawalam(a)vmware.com>
---
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 43 ++++++++++++-------------
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 8 ++---
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c | 7 +++-
3 files changed, 28 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
index 31aecc46624b..04c8a378aeed 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
@@ -46,6 +46,21 @@ vmw_buffer_object(struct ttm_buffer_object *bo)
return container_of(bo, struct vmw_buffer_object, base);
}
+/**
+ * bo_is_vmw - check if the buffer object is a &vmw_buffer_object
+ * @bo: ttm buffer object to be checked
+ *
+ * Uses destroy function associated with the object to determine if this is
+ * a &vmw_buffer_object.
+ *
+ * Returns:
+ * true if the object is of &vmw_buffer_object type, false if not.
+ */
+static bool bo_is_vmw(struct ttm_buffer_object *bo)
+{
+ return bo->destroy == &vmw_bo_bo_free ||
+ bo->destroy == &vmw_gem_destroy;
+}
/**
* vmw_bo_pin_in_placement - Validate a buffer to placement.
@@ -615,8 +630,9 @@ int vmw_user_bo_synccpu_ioctl(struct drm_device *dev, void *data,
ret = vmw_user_bo_synccpu_grab(vbo, arg->flags);
vmw_bo_unreference(&vbo);
- if (unlikely(ret != 0 && ret != -ERESTARTSYS &&
- ret != -EBUSY)) {
+ if (unlikely(ret != 0)) {
+ if (ret == -ERESTARTSYS || ret == -EBUSY)
+ return -EBUSY;
DRM_ERROR("Failed synccpu grab on handle 0x%08x.\n",
(unsigned int) arg->handle);
return ret;
@@ -798,7 +814,7 @@ int vmw_dumb_create(struct drm_file *file_priv,
void vmw_bo_swap_notify(struct ttm_buffer_object *bo)
{
/* Is @bo embedded in a struct vmw_buffer_object? */
- if (vmw_bo_is_vmw_bo(bo))
+ if (!bo_is_vmw(bo))
return;
/* Kill any cached kernel maps before swapout */
@@ -822,7 +838,7 @@ void vmw_bo_move_notify(struct ttm_buffer_object *bo,
struct vmw_buffer_object *vbo;
/* Make sure @bo is embedded in a struct vmw_buffer_object? */
- if (vmw_bo_is_vmw_bo(bo))
+ if (!bo_is_vmw(bo))
return;
vbo = container_of(bo, struct vmw_buffer_object, base);
@@ -843,22 +859,3 @@ void vmw_bo_move_notify(struct ttm_buffer_object *bo,
if (mem->mem_type != VMW_PL_MOB && bo->resource->mem_type == VMW_PL_MOB)
vmw_resource_unbind_list(vbo);
}
-
-/**
- * vmw_bo_is_vmw_bo - check if the buffer object is a &vmw_buffer_object
- * @bo: buffer object to be checked
- *
- * Uses destroy function associated with the object to determine if this is
- * a &vmw_buffer_object.
- *
- * Returns:
- * true if the object is of &vmw_buffer_object type, false if not.
- */
-bool vmw_bo_is_vmw_bo(struct ttm_buffer_object *bo)
-{
- if (bo->destroy == &vmw_bo_bo_free ||
- bo->destroy == &vmw_gem_destroy)
- return true;
-
- return false;
-}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 72a17618ba0a..0c12faa4e533 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -1018,13 +1018,10 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
goto out_no_fman;
}
- drm_vma_offset_manager_init(&dev_priv->vma_manager,
- DRM_FILE_PAGE_OFFSET_START,
- DRM_FILE_PAGE_OFFSET_SIZE);
ret = ttm_device_init(&dev_priv->bdev, &vmw_bo_driver,
dev_priv->drm.dev,
dev_priv->drm.anon_inode->i_mapping,
- &dev_priv->vma_manager,
+ dev_priv->drm.vma_offset_manager,
dev_priv->map_mode == vmw_dma_alloc_coherent,
false);
if (unlikely(ret != 0)) {
@@ -1195,7 +1192,6 @@ static void vmw_driver_unload(struct drm_device *dev)
vmw_devcaps_destroy(dev_priv);
vmw_vram_manager_fini(dev_priv);
ttm_device_fini(&dev_priv->bdev);
- drm_vma_offset_manager_destroy(&dev_priv->vma_manager);
vmw_release_device_late(dev_priv);
vmw_fence_manager_takedown(dev_priv->fman);
if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
@@ -1419,7 +1415,7 @@ vmw_get_unmapped_area(struct file *file, unsigned long uaddr,
struct vmw_private *dev_priv = vmw_priv(file_priv->minor->dev);
return drm_get_unmapped_area(file, uaddr, len, pgoff, flags,
- &dev_priv->vma_manager);
+ dev_priv->drm.vma_offset_manager);
}
static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index 00e8e27e4884..ace7ca150b03 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -683,6 +683,9 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
container_of(base, struct vmw_user_surface, prime.base);
struct vmw_resource *res = &user_srf->srf.res;
+ if (base->shareable && res && res->backup)
+ drm_gem_object_put(&res->backup->base.base);
+
*p_base = NULL;
vmw_resource_unreference(&res);
}
@@ -857,6 +860,7 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
goto out_unlock;
}
vmw_bo_reference(res->backup);
+ drm_gem_object_get(&res->backup->base.base);
}
tmp = vmw_resource_reference(&srf->res);
@@ -1513,7 +1517,6 @@ vmw_gb_surface_define_internal(struct drm_device *dev,
&res->backup);
if (ret == 0)
vmw_bo_reference(res->backup);
-
}
if (unlikely(ret != 0)) {
@@ -1561,6 +1564,8 @@ vmw_gb_surface_define_internal(struct drm_device *dev,
drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
rep->buffer_size = res->backup->base.base.size;
rep->buffer_handle = backup_handle;
+ if (user_srf->prime.base.shareable)
+ drm_gem_object_get(&res->backup->base.base);
} else {
rep->buffer_map_handle = 0;
rep->buffer_size = 0;
--
2.32.0
[View Less]
This reverts commit e2a88eabb02410267519b838fb9b79f5206769be. The commit
in question makes msm_use_mmu() check whether the DRM 'component master'
device is translated by the IOMMU. At this moment it is the 'mdss'
device.
However on platforms using the MDP5 driver (e.g. MSM8916/APQ8016,
MSM8996/APQ8096) it's the mdp5 device, which has the iommus property
(and thus is "translated by the IOMMU"). This results in these devices
being broken with the following lines in the dmesg.
[drm] Initialized …
[View More]msm 1.9.0 20130625 for 1a00000.mdss on minor 0
msm 1a00000.mdss: [drm:adreno_request_fw] loaded qcom/a300_pm4.fw from new location
msm 1a00000.mdss: [drm:adreno_request_fw] loaded qcom/a300_pfp.fw from new location
msm 1a00000.mdss: [drm:get_pages] *ERROR* could not get pages: -28
msm 1a00000.mdss: could not allocate stolen bo
msm 1a00000.mdss: [drm:get_pages] *ERROR* could not get pages: -28
msm 1a00000.mdss: [drm:msm_alloc_stolen_fb] *ERROR* failed to allocate buffer object
msm 1a00000.mdss: [drm:msm_fbdev_create] *ERROR* failed to allocate fb
Getting the mdp5 device pointer from this function is not that easy at
this moment. Thus this patch is reverted till the MDSS rework [1] lands.
It will make the mdp5/dpu1 device component master and the check will be
legit.
[1] https://patchwork.freedesktop.org/series/98525/
Fixes: e2a88eabb024 ("drm/msm: Stop using iommu_present()")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org>
---
drivers/gpu/drm/msm/msm_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index b6702b0fafcb..e2b5307b2360 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -263,7 +263,7 @@ bool msm_use_mmu(struct drm_device *dev)
struct msm_drm_private *priv = dev->dev_private;
/* a2xx comes with its own MMU */
- return priv->is_a2xx || device_iommu_mapped(dev->dev);
+ return priv->is_a2xx || iommu_present(&platform_bus_type);
}
static int msm_init_vram(struct drm_device *dev)
--
2.35.1
[View Less]
Display Stream Compression (DSC) compresses the display stream in host which
is later decoded by panel. This series enables this for Qualcomm msm driver.
This was tested on Google Pixel3 phone which use LGE SW43408 panel.
The changes include DSC data and hardware block enabling for DPU1 then
support in encoder. We also add support in DSI and introduce required
topology changes.
In order for panel to set the DSC parameters we add dsc in drm_panel and
pass the dsc configuration from the panel …
[View More]driver
Complete changes which enable this for Pixel3 along with panel driver (not
part of this series) and DT changes can be found at:
git.linaro.org/people/vinod.koul/kernel.git pixel/dsc_v7
Comments welcome!
Changes since v6:
- Fix warning reported by kbuild bot
- Add r-b by Dmitry
Changes since v5:
- rebase on msm-next
- use generated header patch from mesa for dsc registers
- use generated header macros for dsc register calculation
- remove msm dsc struct (Dmitry)
Changes since v4:
- Use new apprach based on Abhinav suggestion for dsc with 3d-merge
- Make common function for dsc timing caln and call that from video and cmd
mode
- update description for patch "Pass DSC params to drm_panel"
- update couple of typos as pointed by Marijn
- drop dpu_encoder_dsc_pclk_param_calc() as that was duplicating the caln
done in dsi timing
- Update copyright to 2022 to new files
- Update Abhinav's email to new quic one
Changes since v3:
- Merge changes from Dmitry to have dsc per encoder instance
- add warning for dsc and mode3d enabled together
- set dsc in dpu_encoder_phys_vid as well
- remove dsc hardcoded mask
- use devm_kzalloc for memory allocation for dsc
Changes since v2:
- Fix comments by Dimitry except the dsc being global.
- Move RM patch later for dependency on topology now
- Add patch for mode valid callback for dsi_mgr
- Add missing structure documentation patch
- Fix errors in mode_3d changes
- Rebase on v5.16-rc1 and test
Changes since v1:
- Fix various issues spotted by kbuildbot
- Rebase to v5.15-rc3
- Remove unused fields and duplicate defines
- Enable DSC blocks only when DSC is enabled
- remove sdm845 feature mask, use 0
- Check for DSC in hw_ctl
Changes since RFC:
- Drop the DT binding patch as we derive the configuration from panel
- Drop the drm api patch as we no longer need it (use pps drm api)
- Fix comments raised by Dimitry
- Add dsc parameters calculation from downstream
Dmitry Baryshkov (1):
drm/msm/dpu: don't use merge_3d if DSC merge topology is used
Vinod Koul (13):
drm/msm/dsi: add support for dsc data
drm/msm/dsi: Pass DSC params to drm_panel
drm/msm/disp/dpu1: Add support for DSC
drm/msm/disp/dpu1: Add support for DSC in pingpong block
drm/msm/disp/dpu1: Add DSC for SDM845 to hw_catalog
drm/msm/disp/dpu1: Add DSC support in hw_ctl
drm/msm/disp/dpu1: Add support for DSC in encoder
drm/msm: Add missing num_dspp field documentation
drm/msm/disp/dpu1: Add support for DSC in topology
drm/msm/disp/dpu1: Add DSC support in RM
drm/msm/dsi: add mode valid callback for dsi_mgr
drm/msm: Update generated headers
drm/msm/dsi: Add support for DSC configuration
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 157 +++++++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 8 +
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 12 +-
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 20 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 13 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 11 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 215 ++++++++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 80 +++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 13 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 56 ++++
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
drivers/gpu/drm/msm/dsi/dsi.c | 5 +
drivers/gpu/drm/msm/dsi/dsi.h | 3 +
drivers/gpu/drm/msm/dsi/dsi.xml.h | 80 +++++
drivers/gpu/drm/msm/dsi/dsi_host.c | 276 +++++++++++++++++-
drivers/gpu/drm/msm/dsi/dsi_manager.c | 12 +
drivers/gpu/drm/msm/msm_drv.h | 15 +
include/drm/drm_panel.h | 7 +
24 files changed, 1032 insertions(+), 4 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h
--
2.34.1
[View Less]
The Board of Directors election and the vote on the By-laws concluded at
23:59 UTC on 18 April 2022. There are 80 current Members of the X.Org
Foundation, and 52 Members cast votes. This is a 65.0% turn out.
In the election of the Directors to the Board of the X.Org Foundation,
the results were that Emma Anholt, Alyssa Rosenzweig, Mark Filion and
Ricardo Garcia were elected for two year terms.
The old full board is: Emma Anholt, Samuel Iglesias Gonsálvez, Mark
Filion, Manasi D Navare, Keith …
[View More]Packard, Lyude Paul, Daniel Vetter, Harry
Wentland
The new full board is: Emma Anholt, Samuel Iglesias Gonsálvez, Mark
Filion, Manasi D Navare, Alyssa Rosenzweig, Lyude Paul, Daniel Vetter,
and Ricardo Garcia
The full election results were as follows:
Option | Rank 1 | Rank 2 | Rank 3 | Rank 4 | Rank 5 | Rank 6 | Final Score
Emma Anholt | 21 | 16 | 4 | 1 | 5 | 5 | 240
Alyssa Rosenzweig | 4 | 10 | 17 | 7 | 11 | 3 | 188
Mark Filion | 8 | 12 | 7 | 10 | 5 | 10 | 186
Ricardo Garcia | 9 | 4 | 5 | 17 | 10 | 7 | 172
Lucas Stach | 4 | 5 | 14 | 9 | 11 | 9 | 163
Shashank Sharma | 6 | 5 | 5 | 8 | 10 | 18 | 143
Lyude Paul, on behalf of the X.Org elections committee
[View Less]
This series adds support for writeback block on DPU. Writeback
block is extremely useful to validate boards having no physical displays
in addition to many other use-cases where we want to get the output
of the display pipeline to examine whether issue is with the display
pipeline or with the panel.
These changes have been validated on SM8250 RB5 boards with IGT KMS
writeback test-suite thereby further increasing the IGT test coverage
for DPU. I am sharing the test results below.
root@linaro-…
[View More]developer:~/igt_repo/igt-gpu-tools/build/tests# ./kms_writeback
[ 35.066157] Console: switching to colour dummy device 80x25
[ 35.071964] [IGT] kms_writeback: executing
IGT-Version: 1.26-gae2eb9e1 (aarch64) (Linux: 5.16.0-rc2-62171-g132577e2697b aarch64)
[ 35.611418] [IGT] kms_writeback: starting subtest writeback-pixel-formats
Starting subtest: writeback-pixel-formats
[ 35.618528] [IGT] kms_writeback: starting subtest writeback-invalid-parameters
Subtest writeback-pixel-formats: SUCCESS (0.000s)
Starting subtest: writeback-invalid-parameters
Subtest writeback-invalid-parameters: SUCCESS (0.028s) 35.657437] [IGT] kms_writeback: starting subtest writeback-fb-id
Starting subtest: writeback-fb-id
Subtest writeback-fb-id: SUCCESS (0.030s)
[ 35.698957] [IGT] kms_writeback: starting subtest writeback-check-output
Starting subtest: writeback-check-output
[ 35.852834] [IGT] kms_writeback: exiting, ret=0
Subtest writeback-check-output: SUCCESS (0.142s)
[ 35.861291] Console: switching to colour frame buffer device 240x67
root@linaro-developer:~/igt_repo/igt-gpu-tools/build/tests#
The changes can easily be extended to support any other chipset using
the DPU driver by adding the support in the catalog.
Writeback block supports various formats and features. The support
for all of them can be incrementally added on top of this framework when
validation is improved and the test frameworks are extended to validate
them.
Abhinav Kumar (12):
drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog
drm/msm/dpu: add dpu_hw_wb abstraction for writeback blocks
drm/msm/dpu: add writeback blocks to DPU RM
drm/msm/dpu: add changes to support writeback in hw_ctl
drm/msm/dpu: add an API to reset the encoder related hw blocks
drm/msm/dpu: make changes to dpu_encoder to support virtual encoder
drm/msm/dpu: add encoder operations to prepare/cleanup wb job
drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback
drm/msm/dpu: add the writeback connector layer
drm/msm/dpu: initialize dpu encoder and connector for writeback
drm/msm/dpu: gracefully handle null fb commits for writeback
drm/msm/dpu: add writeback blocks to the display snapshot
drivers/gpu/drm/msm/Makefile | 3 +
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 9 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 241 +++++-
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 25 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 50 ++
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 3 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 6 +-
.../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 825 +++++++++++++++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 73 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 66 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 65 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 27 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 267 +++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h | 145 ++++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 67 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 71 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 +
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 71 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h | 27 +
20 files changed, 2007 insertions(+), 38 deletions(-)
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.h
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.h
--
2.7.4
[View Less]
Connector detection using poll method won't work in case of bridge
attached to the encoder with the flag DRM_BRIDGE_ATTACH_NO_CONNECTOR, as
the code defaults to HPD.
Enable DRM_BRIDGE_OP_HPD based on HPD interrupt availability, so that
it will fall back to polling, if HPD is not available.
Signed-off-by: Biju Das <biju.das.jz(a)bp.renesas.com>
---
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/…
[View More]bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
index 668dcefbae17..b3f10c54e064 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
@@ -1292,8 +1292,10 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
goto err_unregister_cec;
adv7511->bridge.funcs = &adv7511_bridge_funcs;
- adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID
- | DRM_BRIDGE_OP_HPD;
+ adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
+ if (adv7511->i2c_main->irq)
+ adv7511->bridge.ops |= DRM_BRIDGE_OP_HPD;
+
adv7511->bridge.of_node = dev->of_node;
adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
--
2.25.1
[View Less]
From: Xiaoke Wang <xkernel.wang(a)foxmail.com>
[ Upstream commit 047ae665577776b7feb11bd4f81f46627cff95e7 ]
kzalloc() is a memory allocation function which can return NULL when
some internal memory errors happen. So it is better to check it to
prevent potential wrong memory access.
Besides, since mdp5_plane_reset() is void type, so we should better
set `plane-state` to NULL after releasing it.
Signed-off-by: Xiaoke Wang <xkernel.wang(a)foxmail.com>
Reviewed-by: Dmitry Baryshkov …
[View More]<dmitry.baryshkov(a)linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/481055/
Link: https://lore.kernel.org/r/tencent_8E2A1C78140EE1784AB2FF4B2088CC0AB908@qq.c…
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org>
Signed-off-by: Rob Clark <robdclark(a)chromium.org>
Signed-off-by: Sasha Levin <sashal(a)kernel.org>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
index 83bf997dda03..e14bfbdbaf2b 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
@@ -192,7 +192,10 @@ static void mdp5_plane_reset(struct drm_plane *plane)
drm_framebuffer_unreference(plane->state->fb);
kfree(to_mdp5_plane_state(plane->state));
+ plane->state = NULL;
mdp5_state = kzalloc(sizeof(*mdp5_state), GFP_KERNEL);
+ if (!mdp5_state)
+ return;
/* assign default blend parameters */
mdp5_state->alpha = 255;
--
2.35.1
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From: Xiaoke Wang <xkernel.wang(a)foxmail.com>
[ Upstream commit 047ae665577776b7feb11bd4f81f46627cff95e7 ]
kzalloc() is a memory allocation function which can return NULL when
some internal memory errors happen. So it is better to check it to
prevent potential wrong memory access.
Besides, since mdp5_plane_reset() is void type, so we should better
set `plane-state` to NULL after releasing it.
Signed-off-by: Xiaoke Wang <xkernel.wang(a)foxmail.com>
Reviewed-by: Dmitry Baryshkov …
[View More]<dmitry.baryshkov(a)linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/481055/
Link: https://lore.kernel.org/r/tencent_8E2A1C78140EE1784AB2FF4B2088CC0AB908@qq.c…
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org>
Signed-off-by: Rob Clark <robdclark(a)chromium.org>
Signed-off-by: Sasha Levin <sashal(a)kernel.org>
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
index 4b22ac3413a1..1f9e3c5ea47d 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
@@ -197,7 +197,10 @@ static void mdp5_plane_reset(struct drm_plane *plane)
drm_framebuffer_unreference(plane->state->fb);
kfree(to_mdp5_plane_state(plane->state));
+ plane->state = NULL;
mdp5_state = kzalloc(sizeof(*mdp5_state), GFP_KERNEL);
+ if (!mdp5_state)
+ return;
/* assign default blend parameters */
mdp5_state->alpha = 255;
--
2.35.1
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