dri-devel April 2022

dri-devel@lists.freedesktop.org

351 participants
951 discussions

Re: [PATCH 02/34] drm/i915/gvt: remove enum hypervisor_type
by Jason Gunthorpe 11 Apr '22

11 Apr '22

On Mon, Apr 11, 2022 at 04:13:31PM +0200, Christoph Hellwig wrote: > The only supported hypervisor is KVM, so don't bother with dead code > enumerating hypervisors. > > Signed-off-by: Christoph Hellwig <hch(a)lst.de> > --- > drivers/gpu/drm/i915/gvt/gvt.c | 17 +-- > drivers/gpu/drm/i915/gvt/gvt.h | 1 - > drivers/gpu/drm/i915/gvt/hypercall.h | 6 -- > drivers/gpu/drm/i915/gvt/kvmgt.c | 1 - > drivers/gpu/drm/i915/gvt/opregion.c | 150 ++++++--------------------- > 5 files changed, 34 insertions(+), 141 deletions(-) Reviewed-by: Jason Gunthorpe <jgg(a)nvidia.com> Jason

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[PATCH v18 0/3] MIPS: JZ4780 and CI20 HDMI
by H. Nikolaus Schaller 11 Apr '22

11 Apr '22

PATCH V18 2022-04-07 13:16:10: * removed CSC filter patches (3-5/6) by Neil Armstrong <narmstrong(a)baylibre.com> as they no longer seem to be required * added "Reviewed-by: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com>" to ddc-en patch (6/6) PATCH V17 2022-04-06 18:26:08: * removed our local attempts to enable HPD because "drm/bridge_connector: enable HPD by default if supported" became available and solves the issue globally (by nikita.yoush(a)cogentembedded.com) * add new mechanism to disable Color Space Conversion (by narmstrong(a)baylibre.com) * rebased to v5.18-rc1 based drm-misc/drm-misc-next PATCH V16 2022-02-26 18:13:02: * fixed and renamed dw-hdmi bus negotiation patch (by narmstrong(a)baylibre.com) * reordered and merged HPD fix (suggested by paul(a)crapouillou.net) * fixed MODULE_ALIAS for dw-hdmi-ingenic (reported by paul(a)crapouillou.net) * dropped some already merged commits from the series PATCH V15 2022-02-12 16:50:54: * remove already (elsewhere) merged commits (suggested by paul(a)crapouillou.net) * clarify commit message for (now) 1/7 ((suggested by paul(a)crapouillou.net)) PATCH V14 2022-02-12 15:19:25: * make compatible to c03d0b52ff71d5 ("drm/connector: Fix typo in output format") * move "dw-hdmi/ingenic-dw-hdmi: repair interworking with hdmi-connector" before drm/ingenic: Add dw-hdmi driver specialization for jz4780 (by paul(a)crapouillou.net) * split introduction of dw_hdmi_enable_poll() into separate patch * explicitly mark plane f0 as not working in jz4780 (suggested by paul(a)crapouillou.net) * drop 1/9 since it is now in drm-misc/drm-misc-next PATCH V13 2022-02-02 17:31:22: * 7/9: remove call to gpiod_set_value() because of GPIOD_OUT_HIGH (by paul(a)crapouillou.net) * 4/9: replace ".." by "." (by paul(a)crapouillou.net) * 3/9: remove old hdmi-5v-power in the example (by paul(a)crapouillou.net) * 2/9: disable handling of plane f0 only for jz4780 (by paul(a)crapouillou.net) PATCH V12 2022-01-31 13:26:54: This version reworks how hdmi ddc power is controlled by connector and not by ddc/hdmi bridge driver. Also some patches of the previous version of this series have been removed since they are already applied to mips-next/linux/next/v5.17-rc1. Fixes and changes: - repair interworking of dw-hdmi with connector-hdmi (by hns(a)goldelico.com) - fix JZ_REG_LCD_OSDC setup for jz4780 (by hns(a)goldelico.com and paul(a)crapouillou.net) - adjustments for ci20.dts to use connector gpio for +5v (suggested by several) - to add control of "ddc-en-gpios" to hdmi-connector driver (by hns(a)goldelico.com) - regulator code removed because we now use the "ddc-en-gpios" of the connector driver (suggested by paul(a)crapouillou.net) - bindings: addition of "ddc-i2c-bus" and "hdmi-5v-supply" removed (suggested by robh+dt(a)kernel.org) - rebase on v5.17-rc2 PATCH V11 2021-12-02 19:39:52: - patch 4/8: change devm_regulator_get_optional to devm_regulator_get and remove NULL check (requested by broonie(a)kernel.org) - patch 3/8: make hdmi-5v-supply required (requested by broonie(a)kernel.org) PATCH V10 2021-11-30 22:26:41: - patch 3/8: fix $id and $ref paths (found by robh(a)kernel.org) PATCH V9 2021-11-24 22:29:14: - patch 6/8: remove optional <0> for assigned-clocks and unintentionally included "unwedge" setup (found by paul(a)crapouillou.net) - patch 4/8: some cosmetics make regulator enable/disable only if not NULL (found by paul(a)crapouillou.net) simplify/fix error handling and driver cleanup on remove (proposed by paul(a)crapouillou.net) - patch 3/8: fix #include path in example (found by paul(a)crapouillou.net) fix missing "i" in unevaluatedProperties (found by robh(a)kernel.org) fix 4 spaces indentation for required: property (found by robh(a)kernel.org) PATCH V8 2021-11-23 19:14:00: - fix a bad editing result from patch 2/8 (found by paul(a)crapouillou.net) PATCH V7 2021-11-23 18:46:23: - changed gpio polarity of hdmi_power to 0 (suggested by paul(a)crapouillou.net) - fixed LCD1 irq number (bug found by paul(a)crapouillou.net) - removed "- 4" for calculating max_register (suggested by paul(a)crapouillou.net) - use unevaluatedPropertes instead of additionalProperties (suggested by robh(a)kernel.org) - moved and renamed ingenic,jz4780-hdmi.yaml (suggested by robh(a)kernel.org) - adjusted assigned-clocks changes to upstream which added some for SSI (by hns(a)goldelico.com) - rebased and tested with v5.16-rc2 + patch set drm/ingenic by paul(a)crapouillou.net (by hns(a)goldelico.com) PATCH V6 2021-11-10 20:43:33: - changed CONFIG_DRM_INGENIC_DW_HDMI to "m" (by hns(a)goldelico.com) - made ingenic-dw-hdmi an independent platform driver which can be compiled as module and removed error patch fixes for IPU (suggested by paul(a)crapouillou.net) - moved assigned-clocks from jz4780.dtsi to ci20.dts (suggested by paul(a)crapouillou.net) - fixed reg property in jz4780.dtsi to cover all registers incl. gamma and vee (by hns(a)goldelico.com) - added a base patch to calculate regmap size from DTS reg property (requested by paul(a)crapouillou.net) - restored resetting all bits except one in LCDOSDC (requested by paul(a)crapouillou.net) - clarified setting of cpos (suggested by paul(a)crapouillou.net) - moved bindings definition for ddc-i2c-bus (suggested by paul(a)crapouillou.net) - simplified mask definitions for JZ_LCD_DESSIZE (requested by paul(a)crapouillou.net) - removed setting alpha premultiplication (suggested by paul(a)crapouillou.net) - removed some comments (suggested by paul(a)crapouillou.net) PATCH V5 2021-10-05 14:28:44: - dropped mode_fixup and timings support in dw-hdmi as it is no longer needed in this V5 (by hns(a)goldelico.com) - dropped "drm/ingenic: add some jz4780 specific features" (stimulated by paul(a)crapouillou.net) - fixed typo in commit subject: "synopsis" -> "synopsys" (by hns(a)goldelico.com) - swapped clocks in jz4780.dtsi to match synopsys,dw-hdmi.yaml (by hns(a)goldelico.com) - improved, simplified, fixed, dtbschecked ingenic-jz4780-hdmi.yaml and made dependent of bridge/synopsys,dw-hdmi.yaml (based on suggestions by maxime(a)cerno.tech) - fixed binding vs. driver&DTS use of hdmi-5v regulator (suggested by maxime(a)cerno.tech) - dropped "drm/bridge: synopsis: Fix to properly handle HPD" - was a no longer needed workaround for a previous version (suggested by maxime(a)cerno.tech) PATCH V4 2021-09-27 18:44:38: - fix setting output_port = 1 (issue found by paul(a)crapouillou.net) - ci20.dts: convert to use hdmi-connector (by hns(a)goldelico.com) - add a hdmi-regulator to control +5V power (by hns(a)goldelico.com) - added a fix to dw-hdmi to call drm_kms_helper_hotplug_event on plugin event detection (by hns(a)goldelico.com) - always allocate extended descriptor but initialize only for jz4780 (by hns(a)goldelico.com) - updated to work on top of "[PATCH v3 0/6] drm/ingenic: Various improvements v3" (by paul(a)crapouillou.net) - rebased to v5.13-rc3 PATCH V3 2021-08-08 07:10:50: This series adds HDMI support for JZ4780 and CI20 board (and fixes one IPU related issue in registration error path) - [patch 1/8] switched from mode_fixup to atomic_check (suggested by robert.foss(a)linaro.org) - the call to the dw-hdmi specialization is still called mode_fixup - [patch 3/8] diverse fixes for ingenic-drm-drv (suggested by paul(a)crapouillou.net) - factor out some non-HDMI features of the jz4780 into a separate patch - multiple fixes around max height - do not change regmap config but a copy on stack - define some constants - factor out fixing of drm_init error path for IPU into separate patch - use FIELD_PREP() - [patch 8/8] conversion to component framework dropped (suggested by Laurent.pinchart(a)ideasonboard.com and paul(a)crapouillou.net) PATCH V2 2021-08-05 16:08:05: - code and commit messages revisited for checkpatch warnings - rebased on v5.14-rc4 - include (failed, hence RFC 8/8) attempt to convert to component framework (was suggested by Paul Cercueil <paul(a)crapouillou.net> a while ago) This series adds HDMI support for JZ4780 and CI20 board H. Nikolaus Schaller (1): drm/bridge: display-connector: add ddc-en gpio support Paul Boddie (1): drm/ingenic: Add dw-hdmi driver specialization for jz4780 Paul Cercueil (1): drm/ingenic: Implement proper .atomic_get_input_bus_fmts drivers/gpu/drm/bridge/display-connector.c | 15 +++ drivers/gpu/drm/ingenic/Kconfig | 9 ++ drivers/gpu/drm/ingenic/Makefile | 1 + drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 28 +++++- drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 103 +++++++++++++++++++++ 5 files changed, 155 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c -- 2.33.0

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[PATCH 0/5] drm/solomon: Add SSD130x OLED displays SPI support
by Javier Martinez Canillas 11 Apr '22

11 Apr '22

Hello, This series adds a ssd130x-spi driver that provides a 4-wire SPI transport support for SSD130x OLED controllers that can be accessed through a SPI. The driver is quite similar to existing ssd130x-i2c driver that is used by I2C controllers, but there is a difference in the protocol used by SSD130x depending on the transport used. The details are in patch #4 description. Patch #1 just makes the current ssd130x-i2c compatible strings in the DT binding to be deprecated, and add new ones that don't have an -fb suffix. Patch #2 extends the DT binding with the compatible string and properties needed to support the ssd130x-spi devices. Patch #3 adds the new compatible strings to the OF device ID table in the ssd130x-i2c DRM driver. Patch #4 moves the device info for the different SSD130x variants from the ssd130x-i2c transport driver to the ssd130x core driver. Finally patch #5 adds the ssd130x-spi DRM driver for the OLED controllers that come with a 4-wire SPI interface, instead of an I2C interface. Best regards, Javier Javier Martinez Canillas (5): dt-bindings: display: ssd1307fb: Deprecate fbdev compatible strings dt-bindings: display: ssd1307fb: Extend schema for SPI controllers drm/solomon: Add ssd130x-i2c compatible strings without an -fb suffix drm/solomon: Move device info from ssd130x-i2c to the core driver drm/solomon: Add SSD130x OLED displays SPI support .../bindings/display/solomon,ssd1307fb.yaml | 117 ++++++++--- drivers/gpu/drm/solomon/Kconfig | 9 + drivers/gpu/drm/solomon/Makefile | 1 + drivers/gpu/drm/solomon/ssd130x-i2c.c | 60 +++--- drivers/gpu/drm/solomon/ssd130x-spi.c | 184 ++++++++++++++++++ drivers/gpu/drm/solomon/ssd130x.c | 60 +++++- drivers/gpu/drm/solomon/ssd130x.h | 13 ++ 7 files changed, 376 insertions(+), 68 deletions(-) create mode 100644 drivers/gpu/drm/solomon/ssd130x-spi.c -- 2.35.1

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[PATCH v2 3/4] drm/fourcc: Introduce format modifier for DG2 clear color
by Imre Deak 11 Apr '22

11 Apr '22

From: Mika Kahola <mika.kahola(a)intel.com> DG2 clear color render compression uses Tile4 layout. Therefore, we need to define a new format modifier for uAPI to support clear color rendering. v2: Display version is fixed. [Imre] KDoc is enhanced for cc modifier. [Nanley & Lionel] v3: Split out the modifier addition to a separate patch. Clarify the modifier layout description. Cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Mika Kahola <mika.kahola(a)intel.com> cc: Anshuman Gupta <anshuman.gupta(a)intel.com> Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila(a)intel.com> Signed-off-by: Ramalingam C <ramalingam.c(a)intel.com> Signed-off-by: Imre Deak <imre.deak(a)intel.com> Acked-by: Nanley Chery <nanley.g.chery(a)intel.com> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila(a)gmail.com> Acked-by: Maarten Lankhorst <maarten.lankhorst(a)linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220404133846.131401-4-imre.… --- include/uapi/drm/drm_fourcc.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 4a5117715db3c..e5074162bcdd4 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -605,6 +605,20 @@ extern "C" { */ #define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) +/* + * Intel Color Control Surface with Clear Color (CCS) for DG2 render compression. + * + * The main surface is Tile 4 and at plane index 0. The CCS data is stored + * outside of the GEM object in a reserved memory area dedicated for the + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The + * main surface pitch is required to be a multiple of four Tile 4 widths. The + * clear color is stored at plane index 1 and the pitch should be ignored. The + * format of the 256 bits of clear color data matches the one used for the + * I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description + * for details. + */ +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12) + /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks * -- 2.30.2

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[PATCH v2 1/4] drm/fourcc: Introduce format modifiers for DG2 render and media compression
by Imre Deak 11 Apr '22

11 Apr '22

From: Matt Roper <matthew.d.roper(a)intel.com> The render/media engines on DG2 unify render compression and media compression into a single format for the first time, using the Tile 4 layout for main surfaces. The compression algorithm is different from any previous platform and the display engine must still be configured to decompress either a render or media compressed surface; as such, we need new RC and MC framebuffer modifiers to represent buffers in this format. v2: Clarify modifier layout description. Cc: dri-devel(a)lists.freedesktop.org Signed-off-by: Matt Roper <matthew.d.roper(a)intel.com> Signed-off-by: Imre Deak <imre.deak(a)intel.com> Acked-by: Nanley Chery <nanley.g.chery(a)intel.com> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila(a)gmail.com> Acked-by: Maarten Lankhorst <maarten.lankhorst(a)linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220404133846.131401-2-imre.… --- include/uapi/drm/drm_fourcc.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index b73fe6797fc37..4a5117715db3c 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -583,6 +583,28 @@ extern "C" { */ #define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) +/* + * Intel color control surfaces (CCS) for DG2 render compression. + * + * The main surface is Tile 4 and at plane index 0. The CCS data is stored + * outside of the GEM object in a reserved memory area dedicated for the + * storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The + * main surface pitch is required to be a multiple of four Tile 4 widths. + */ +#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10) + +/* + * Intel color control surfaces (CCS) for DG2 media compression. + * + * The main surface is Tile 4 and at plane index 0. For semi-planar formats + * like NV12, the Y and UV planes are Tile 4 and are located at plane indices + * 0 and 1, respectively. The CCS for all planes are stored outside of the + * GEM object in a reserved memory area dedicated for the storage of the + * CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface + * pitch is required to be a multiple of four Tile 4 widths. + */ +#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11) + /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks * -- 2.30.2

1 0

[PATCH v2 0/4] drm/ssd130x: Add support for SINO WEALTH SH1106
by Chen-Yu Tsai 11 Apr '22

11 Apr '22

From: Chen-Yu Tsai <wens(a)csie.org> Hi everyone, This series adds support for SH1106 to the ssd130x OLED display driver. Changes since v1: - Fixed ordering of SINO WEALTH in vendor prefix list - Updated allOf:if: blocks in DT binding, i.e. added default values for solomon,dclk-{div,frq} - Added SSD130X_PAGE_COL_START_{HIGH,LOW}_SET and used that to set the bitfields for the two commands. I didn't feel SSD130X_PAGE_COL_START_{HIGH,LOW}_MASK was needed, as it was the same between both commands. - Added SH110x to the SSD130X Kconfig help texts There are SH110[789] as well, but they don't seem to be easy to find. The SINO WEALTH SH1106 is an OLED display driver that is somewhat compatible with the SSD1306. It supports a slightly wider display, at 132 instead of 128 pixels. The basic commands are the same, but the SH1106 doesn't support the horizontal or vertical address modes. This driver chip is found in some cheap 1.3" OLED panel modules. It acts as a substitute for the SSD1306. Patch 1 adds an entry to the vendor prefixes for SINO WEALTH Eletronics Ltd. Patch 2 adds an entry for SH1106 to the ssd1307fb binding. Patch 3 adds support for the base "page addressing mode" to the ssd130x driver. Patch 4 adds support for the SH1106 to the ssd130x driver. Please have a look. Thanks ChenYu Chen-Yu Tsai (4): dt-bindings: vendor-prefixes: Add prefix for SINO WEALTH Eletronics Ltd. dt-bindings: display: ssd1307fb: Add entry for SINO WEALTH SH1106 drm/ssd130x: Support page addressing mode drm/ssd130x: Add support for SINO WEALTH SH1106 .../bindings/display/solomon,ssd1307fb.yaml | 13 ++++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + drivers/gpu/drm/solomon/Kconfig | 9 ++- drivers/gpu/drm/solomon/ssd130x-i2c.c | 11 +++ drivers/gpu/drm/solomon/ssd130x.c | 73 +++++++++++++++++-- drivers/gpu/drm/solomon/ssd130x.h | 2 + 6 files changed, 99 insertions(+), 11 deletions(-) -- 2.34.1

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[PATCH] drm/ttm: fix logic inversion in ttm_eu_reserve_buffers
by Christian König 11 Apr '22

11 Apr '22

That should have been max, not min. Signed-off-by: Christian König <christian.koenig(a)amd.com> Fixes: 73511edf8b19 ("dma-buf: specify usage while adding fences to dma_resv obj v7") --- drivers/gpu/drm/ttm/ttm_execbuf_util.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ttm/ttm_execbuf_util.c b/drivers/gpu/drm/ttm/ttm_execbuf_util.c index 0eb995d25df1..dbee34a058df 100644 --- a/drivers/gpu/drm/ttm/ttm_execbuf_util.c +++ b/drivers/gpu/drm/ttm/ttm_execbuf_util.c @@ -101,7 +101,7 @@ int ttm_eu_reserve_buffers(struct ww_acquire_ctx *ticket, continue; } - num_fences = min(entry->num_shared, 1u); + num_fences = max(entry->num_shared, 1u); if (!ret) { ret = dma_resv_reserve_fences(bo->base.resv, num_fences); -- 2.25.1

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[CI v2 00/12] drm/edid: low level EDID block read refactoring etc.
by Jani Nikula 11 Apr '22

11 Apr '22

Submitting [1] again for CI. Just a slight change in patch 3 to address review. BR, Jani. [1] https://patchwork.freedesktop.org/series/102329/ Jani Nikula (12): drm/edid: convert edid_is_zero() to edid_block_is_zero() for blocks drm/edid: have edid_block_check() detect blocks that are all zero drm/edid: refactor EDID block status printing drm/edid: add a helper to log dump an EDID block drm/edid: pass struct edid to connector_bad_edid() drm/edid: add typedef for block read function drm/edid: abstract an EDID block read helper drm/edid: use EDID block read helper in drm_do_get_edid() drm/edid: convert extension block read to EDID block read helper drm/edid: drop extra local var drm/edid: add single point of return to drm_do_get_edid() drm/edid: add EDID block count and size helpers drivers/gpu/drm/drm_edid.c | 350 ++++++++++++++++++++++++------------- 1 file changed, 225 insertions(+), 125 deletions(-) -- 2.30.2

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[PATCH v3] drm: add a check to verify the size alignment
by Arunpravin Paneer Selvam 11 Apr '22

11 Apr '22

Add a simple check to reject any size not aligned to the min_page_size. when size is not aligned to min_page_size, driver module should handle in their own way either to round_up() the size value to min_page_size or just to enable WARN_ON(). If we dont handle the alignment properly, we may hit the following bug, Unigine Heaven has allocation requests for example required pages are 257 and alignment request is 256. To allocate the left over 1 page, continues the iteration to find the order value which is 0 and when it compares with min_order = 8, triggers the BUG_ON(order < min_order). v2: add more commit description v3: remove WARN_ON() Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam(a)amd.com> Suggested-by: Matthew Auld <matthew.auld(a)intel.com> --- drivers/gpu/drm/drm_buddy.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/drm_buddy.c b/drivers/gpu/drm/drm_buddy.c index 72f52f293249..11bb59399471 100644 --- a/drivers/gpu/drm/drm_buddy.c +++ b/drivers/gpu/drm/drm_buddy.c @@ -665,6 +665,9 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm, if (start + size == end) return __drm_buddy_alloc_range(mm, start, size, blocks); + if (!IS_ALIGNED(size, min_page_size)) + return -EINVAL; + pages = size >> ilog2(mm->chunk_size); order = fls(pages) - 1; min_order = ilog2(min_page_size) - ilog2(mm->chunk_size); base-commit: 4dcdb745569d8eef8db09e24e8ff2e5dffc0664c -- 2.25.1

4 5

[PATCH 00/12] drm/edid: low level EDID block read refactoring etc.
by Jani Nikula 11 Apr '22

11 Apr '22

Ever so slowly moving towards cleaner EDID reading. Jani Nikula (12): drm/edid: convert edid_is_zero() to edid_block_is_zero() for blocks drm/edid: have edid_block_check() detect blocks that are all zero drm/edid: refactor EDID block status printing drm/edid: add a helper to log dump an EDID block drm/edid: pass struct edid to connector_bad_edid() drm/edid: add typedef for block read function drm/edid: abstract an EDID block read helper drm/edid: use EDID block read helper in drm_do_get_edid() drm/edid: convert extension block read to EDID block read helper drm/edid: drop extra local var drm/edid: add single point of return to drm_do_get_edid() drm/edid: add EDID block count and size helpers drivers/gpu/drm/drm_edid.c | 350 ++++++++++++++++++++++++------------- 1 file changed, 225 insertions(+), 125 deletions(-) -- 2.30.2

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