dri-devel May 2022

dri-devel@lists.freedesktop.org

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736 discussions

[PATCH v2 0/5] drm/ast: Connector cleanups and polling
by Thomas Zimmermann 07 Jun '22

07 Jun '22

Various cleanups to ast's conenctor code. Simplifies the code, adds support for using VGA and ASTDP connectors at the same time, and initializes polling of the connector status. Patch 1 was first posted at [1], so this patchset starts at version 2. The implementation of detect_ctx in patch 3 has been added to DRM helpers as it will be useful for other drivers, such as mgag200 and udl. Thomas Zimmermann (5): drm/ast: Support multiple outputs drm/ast: Fix updating the connector's EDID property drm/ast: Support output polling drm/ast: Fail probing if DCC channel could not be initialized drm/ast: Remove struct ast_{vga,sil164}_connector drivers/gpu/drm/ast/ast_dp.c | 5 +- drivers/gpu/drm/ast/ast_dp501.c | 2 +- drivers/gpu/drm/ast/ast_drv.h | 30 +----- drivers/gpu/drm/ast/ast_i2c.c | 7 +- drivers/gpu/drm/ast/ast_main.c | 21 ++-- drivers/gpu/drm/ast/ast_mode.c | 165 ++++++++++------------------- drivers/gpu/drm/ast/ast_post.c | 2 +- drivers/gpu/drm/drm_probe_helper.c | 35 ++++++ include/drm/drm_probe_helper.h | 3 + 9 files changed, 116 insertions(+), 154 deletions(-) base-commit: 2c8cc5cd20e28afe6b63acb28890e5f57d9bf055 -- 2.36.1

3 20

[RESEND 00/14] Add Mediatek MT6370 PMIC support
by ChiaEn Wu 07 Jun '22

07 Jun '22

From: ChiaEn Wu <chiaen_wu(a)richtek.com> Sorry, for the patch dependency, we resend this patch series and we're sorry for any inconvenience that we may have caused. This patch series add Mediatek MT6370 PMIC support. The MT6370 is a highly-integrated smart power management IC, which includes a single cell Li-Ion/Li-Polymer switching battery charger, a USB Type-C & Power Delivery (PD) controller, dual Flash LED current sources, a RGB LED driver, a backlight WLED driver, a display bias driver and a general LDO for portable devices. Alice Chen (3): dt-bindings: leds: Add Mediatek MT6370 flashlight binding leds: mt6370: Add Mediatek MT6370 Indicator support leds: flashlight: mt6370: Add Mediatek MT6370 flashlight support ChiYuan Huang (7): dt-bindings: usb: Add Mediatek MT6370 TCPC binding dt-bindings: leds: mt6370: Add Mediatek mt6370 indicator dt-bindings: backlight: Add Mediatek MT6370 backlight binding dt-bindings: mfd: Add Mediatek MT6370 binding mfd: mt6370: Add Mediatek MT6370 support usb: typec: tcpci_mt6370: Add Mediatek MT6370 tcpci driver regulator: mt6370: Add mt6370 DisplayBias and VibLDO support ChiaEn Wu (4): dt-bindings: power: supply: Add Mediatek MT6370 Charger binding iio: adc: mt6370: Add Mediatek MT6370 support power: supply: mt6370: Add Mediatek MT6370 charger driver video: backlight: mt6370: Add Mediatek MT6370 support .../backlight/mediatek,mt6370-backlight.yaml | 110 ++ .../leds/mediatek,mt6370-flashlight.yaml | 48 + .../leds/mediatek,mt6370-indicator.yaml | 57 + .../bindings/mfd/mediatek,mt6370.yaml | 282 ++++ .../power/supply/mediatek,mt6370-charger.yaml | 60 + .../bindings/usb/mediatek,mt6370-tcpc.yaml | 35 + drivers/iio/adc/Kconfig | 9 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/mt6370-adc.c | 257 ++++ drivers/leds/Kconfig | 11 + drivers/leds/Makefile | 1 + drivers/leds/flash/Kconfig | 9 + drivers/leds/flash/Makefile | 1 + drivers/leds/flash/leds-mt6370-flash.c | 665 ++++++++++ drivers/leds/leds-mt6370.c | 994 +++++++++++++++ drivers/mfd/Kconfig | 13 + drivers/mfd/Makefile | 1 + drivers/mfd/mt6370.c | 273 ++++ drivers/power/supply/Kconfig | 11 + drivers/power/supply/Makefile | 1 + drivers/power/supply/mt6370-charger.c | 1132 +++++++++++++++++ drivers/regulator/Kconfig | 8 + drivers/regulator/Makefile | 1 + drivers/regulator/mt6370-regulator.c | 389 ++++++ drivers/usb/typec/tcpm/Kconfig | 8 + drivers/usb/typec/tcpm/Makefile | 1 + drivers/usb/typec/tcpm/tcpci_mt6370.c | 212 +++ drivers/video/backlight/Kconfig | 8 + drivers/video/backlight/Makefile | 1 + drivers/video/backlight/mt6370-backlight.c | 338 +++++ .../dt-bindings/iio/adc/mediatek,mt6370_adc.h | 18 + include/dt-bindings/mfd/mediatek,mt6370.h | 83 ++ 32 files changed, 5038 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml create mode 100644 Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml create mode 100644 Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml create mode 100644 Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml create mode 100644 Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml create mode 100644 Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml create mode 100644 drivers/iio/adc/mt6370-adc.c create mode 100644 drivers/leds/flash/leds-mt6370-flash.c create mode 100644 drivers/leds/leds-mt6370.c create mode 100644 drivers/mfd/mt6370.c create mode 100644 drivers/power/supply/mt6370-charger.c create mode 100644 drivers/regulator/mt6370-regulator.c create mode 100644 drivers/usb/typec/tcpm/tcpci_mt6370.c create mode 100644 drivers/video/backlight/mt6370-backlight.c create mode 100644 include/dt-bindings/iio/adc/mediatek,mt6370_adc.h create mode 100644 include/dt-bindings/mfd/mediatek,mt6370.h -- 2.25.1

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[PATCH v3 0/7] drm/mgag200: Various cleanups
by Thomas Zimmermann 07 Jun '22

07 Jun '22

Various small fixes and clean-up patches for mgag200. Tested on Matrix G200EH hardware. v3: * fix commit message in 1/7 to say 'drm/mgag200' (Jocelyn) v2: * comment on memory constraints on early G200SE-A * fix connector DDC helper Thomas Zimmermann (7): drm/mgag200: Acquire I/O lock while reading EDID drm/mgag200: Fail on I2C initialization errors drm/mgag200: Implement connector's get_modes with helper drm/mgag200: Switch I2C code to managed cleanup drm/mgag200: Remove struct mga_connector drm/mgag200: Test memory requirements in drm_mode_config_funcs.mode_valid drm/mgag200: Split up connector's mode_valid helper drivers/gpu/drm/drm_probe_helper.c | 36 ++++ drivers/gpu/drm/mgag200/mgag200_drv.h | 13 +- drivers/gpu/drm/mgag200/mgag200_i2c.c | 32 ++- drivers/gpu/drm/mgag200/mgag200_mode.c | 259 +++++++++++-------------- include/drm/drm_probe_helper.h | 2 + 5 files changed, 169 insertions(+), 173 deletions(-) -- 2.36.1

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[PATCH] drm/i915/dg2: Catch and log more unexpected values in DG1_MSTR_TILE_INTR
by Tvrtko Ursulin 07 Jun '22

07 Jun '22

From: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Catch and log any garbage in the register, including no tiles marked, or multiple tiles marked. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Cc: Matt Roper <matthew.d.roper(a)intel.com> --- We caught garbage in DG1_MSTR_TILE_INTR with DG2 (actual value 0xF9D2C008) during glmark and more badness. So I thought lets log all possible failure modes from here and also use per device logging. --- drivers/gpu/drm/i915/i915_irq.c | 33 ++++++++++++++++++++++----------- drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 23 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 73cebc6aa650..79853d3fc1ed 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2778,24 +2778,30 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg) u32 gu_misc_iir; if (!intel_irqs_enabled(i915)) - return IRQ_NONE; + goto none; master_tile_ctl = dg1_master_intr_disable(regs); - if (!master_tile_ctl) { - dg1_master_intr_enable(regs); - return IRQ_NONE; + if (!master_tile_ctl) + goto enable_none; + + if (master_tile_ctl & ~(DG1_MSTR_IRQ | DG1_MSTR_TILE_MASK)) { + drm_warn(&i915->drm, "Garbage in master_tile_ctl: 0x%08x!\n", + master_tile_ctl); + goto enable_none; } /* FIXME: we only support tile 0 for now. */ - if (master_tile_ctl & DG1_MSTR_TILE(0)) { - master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ); - raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl); - } else { - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl); - dg1_master_intr_enable(regs); - return IRQ_NONE; + if (REG_FIELD_GET(DG1_MSTR_TILE_MASK, master_tile_ctl) != + DG1_MSTR_TILE(0)) { + drm_warn(&i915->drm, "Unexpected irq from tile %u!\n", + ilog2(REG_FIELD_GET(DG1_MSTR_TILE_MASK, + master_tile_ctl))); + goto enable_none; } + master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ); + raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl); + gen11_gt_irq_handler(gt, master_ctl); if (master_ctl & GEN11_DISPLAY_IRQ) @@ -2810,6 +2816,11 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg) pmu_irq_stats(i915, IRQ_HANDLED); return IRQ_HANDLED; + +enable_none: + dg1_master_intr_enable(regs); +none: + return IRQ_NONE; } /* Called from drm generic code, passed 'crtc' which diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d8579ab9384c..eefa301c6430 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5774,6 +5774,7 @@ #define DG1_MSTR_TILE_INTR _MMIO(0x190008) #define DG1_MSTR_IRQ REG_BIT(31) +#define DG1_MSTR_TILE_MASK REG_GENMASK(3, 0) #define DG1_MSTR_TILE(t) REG_BIT(t) #define GEN11_DISPLAY_INT_CTL _MMIO(0x44200) -- 2.32.0

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[PATCH v1 0/2] Add 1024x768 timing for AST2600
by Tommy Haung 07 Jun '22

07 Jun '22

v1: Add 1024x768@70Hz for AST2600 soc display timing selection. Add gfx flag for future usage. Testing steps: 1. Add below config to turn VT and LOGO on. CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LDISC_AUTOLOAD=y CONFIG_DEVMEM=y CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y CONFIG_LOGO_LINUX_CLUT224=y 2. The Linux logo will be shown on the screen, when the BMC boot in Linux. 3. Check the display mode is 1024x768@70Hz at AST2600. 4. Check the display mode is 800x600@60Hz at AST2500. Tommy Haung (2): drm/aspeed: Add gfx flags and clock selection for AST2600 drm/aspeed: Add 1024x768 mode for AST2600 drivers/gpu/drm/aspeed/aspeed_gfx.h | 15 ++++++++++ drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 35 ++++++++++++++++++++++++ drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 20 ++++++++++++-- drivers/gpu/drm/aspeed/aspeed_gfx_out.c | 14 +++++++++- 4 files changed, 81 insertions(+), 3 deletions(-) -- 2.17.1

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[PATCH v2 0/2] drm/bridge: analogix_dp: Self-refresh state machine fixes
by Brian Norris 07 Jun '22

07 Jun '22

Hi, I've been investigating several eDP issues on a Rockchip RK3399 system and have two proposed bugfixes. RK3399 has two CRTCs, either of which can be used for eDP output. For both fixes, we have bugs due to the relationship between the generalized "self refresh helpers" and the analogix-dp bridge driver which controls much of the PSR mechanics. These bugs are most visible when switching between CRTCs. I'm not a DRM expert, but I've been poking at a lot of Rockchip display drivers recently. I'd love some skeptical eyes, so feel free to ask questions if I haven't explained issues well, or the proposals look fishy. Regards, Brian Changes in v2: - Drop "->enable" condition in crtc_needs_disable(); this could possibly be "->active" to reflect the intended hardware state, but it also is a little over-specific. We want to make a transition through "disabled" any time we're exiting PSR at the same time as a CRTC switch. (Thanks Liu Ying) Brian Norris (2): drm/bridge: analogix_dp: Support PSR-exit to disable transition drm/atomic: Force bridge self-refresh-exit on CRTC switch .../drm/bridge/analogix/analogix_dp_core.c | 42 +++++++++++++++++-- drivers/gpu/drm/drm_atomic_helper.c | 16 +++++-- 2 files changed, 51 insertions(+), 7 deletions(-) -- 2.35.1.574.g5d30c73bfb-goog

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[PATCH v3] dt-bindings: display: bridge: sil, sii9022: Convert to json-schema
by Geert Uytterhoeven 06 Jun '22

06 Jun '22

Convert the Silicon Image sii902x HDMI bridge Device Tree binding documentation to json-schema. Add missing sil,sii9022-cpi and sil,sii9022-tpi compatible values. Signed-off-by: Geert Uytterhoeven <geert+renesas(a)glider.be> --- v3: - Add comments clarifying CPI/TPI, - Improve wording, - Drop port@2, - Add port descriptions, - Add schema references to individual ports. v2: - Rework sil,i2s-data-lanes, - Add schema reference to ports. --- .../bindings/display/bridge/sii902x.txt | 78 ----------- .../bindings/display/bridge/sil,sii9022.yaml | 131 ++++++++++++++++++ 2 files changed, 131 insertions(+), 78 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/bridge/sii902x.txt create mode 100644 Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/sii902x.txt b/Documentation/devicetree/bindings/display/bridge/sii902x.txt deleted file mode 100644 index 3bc760cc31cbbeee..0000000000000000 --- a/Documentation/devicetree/bindings/display/bridge/sii902x.txt +++ /dev/null @@ -1,78 +0,0 @@ -sii902x HDMI bridge bindings - -Required properties: - - compatible: "sil,sii9022" - - reg: i2c address of the bridge - -Optional properties: - - interrupts: describe the interrupt line used to inform the host - about hotplug events. - - reset-gpios: OF device-tree gpio specification for RST_N pin. - - iovcc-supply: I/O Supply Voltage (1.8V or 3.3V) - - cvcc12-supply: Digital Core Supply Voltage (1.2V) - - HDMI audio properties: - - #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin - is wired, <1> if the both are wired. HDMI audio is - configured only if this property is found. - - sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3 - Each integer indicates which i2s pin is connected to which - audio fifo. The first integer selects i2s audio pin for the - first audio fifo#0 (HDMI channels 1&2), second for fifo#1 - (HDMI channels 3&4), and so on. There is 4 fifos and 4 i2s - pins (SD0 - SD3). Any i2s pin can be connected to any fifo, - but there can be no gaps. E.g. an i2s pin must be mapped to - fifo#0 and fifo#1 before mapping a channel to fifo#2. Default - value is <0>, describing SD0 pin beiging routed to hdmi audio - fifo #0. - - clocks: phandle and clock specifier for each clock listed in - the clock-names property - - clock-names: "mclk" - Describes SII902x MCLK input. MCLK can be used to produce - HDMI audio CTS values. This property follows - Documentation/devicetree/bindings/clock/clock-bindings.txt - consumer binding. - - If HDMI audio is configured the sii902x device becomes an I2S - and/or spdif audio codec component (e.g a digital audio sink), - that can be used in configuring a full audio devices with - simple-card or audio-graph-card binding. See their binding - documents on how to describe the way the sii902x device is - connected to the rest of the audio system: - Documentation/devicetree/bindings/sound/simple-card.yaml - Documentation/devicetree/bindings/sound/audio-graph-card.yaml - Note: In case of the audio-graph-card binding the used port - index should be 3. - -Optional subnodes: - - video input: this subnode can contain a video input port node - to connect the bridge to a display controller output (See this - documentation [1]). - -[1]: Documentation/devicetree/bindings/media/video-interfaces.txt - -Example: - hdmi-bridge@39 { - compatible = "sil,sii9022"; - reg = <0x39>; - reset-gpios = <&pioA 1 0>; - iovcc-supply = <&v3v3_hdmi>; - cvcc12-supply = <&v1v2_hdmi>; - - #sound-dai-cells = <0>; - sil,i2s-data-lanes = < 0 1 2 >; - clocks = <&mclk>; - clock-names = "mclk"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - bridge_in: endpoint { - remote-endpoint = <&dc_out>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml new file mode 100644 index 0000000000000000..5a69547ad3d79667 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Image sii902x HDMI bridge + +maintainers: + - Boris Brezillon <bbrezillon(a)kernel.org> + +properties: + compatible: + oneOf: + - items: + - enum: + - sil,sii9022-cpi # CEC Programming Interface + - sil,sii9022-tpi # Transmitter Programming Interface + - const: sil,sii9022 + - const: sil,sii9022 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Interrupt line used to inform the host about hotplug events. + + reset-gpios: + maxItems: 1 + + iovcc-supply: + description: I/O Supply Voltage (1.8V or 3.3V) + + cvcc12-supply: + description: Digital Core Supply Voltage (1.2V) + + '#sound-dai-cells': + enum: [ 0, 1 ] + description: | + <0> if only I2S or S/PDIF pin is wired, + <1> if both are wired. + HDMI audio is configured only if this property is found. + If HDMI audio is configured, the sii902x device becomes an I2S and/or + S/PDIF audio codec component (e.g. a digital audio sink), that can be + used in configuring full audio devices with simple-card or + audio-graph-card bindings. See their binding documents on how to describe + the way the + sii902x device is connected to the rest of the audio system: + Documentation/devicetree/bindings/sound/simple-card.yaml + Documentation/devicetree/bindings/sound/audio-graph-card.yaml + Note: In case of the audio-graph-card binding the used port index should + be 3. + + sil,i2s-data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + uniqueItems: true + items: + enum: [ 0, 1, 2, 3 ] + description: + Each integer indicates which I2S pin is connected to which audio FIFO. + The first integer selects the I2S audio pin for the first audio FIFO#0 + (HDMI channels 1&2), the second for FIFO#1 (HDMI channels 3&4), and so + on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be + connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be + mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The + default value is <0>, describing SD0 pin being routed to HDMI audio + FIFO#0. + + clocks: + maxItems: 1 + description: MCLK input. MCLK can be used to produce HDMI audio CTS values. + + clock-names: + const: mclk + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Parallel RGB input port + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: HDMI output port + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Sound input port + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hdmi-bridge@39 { + compatible = "sil,sii9022"; + reg = <0x39>; + reset-gpios = <&pioA 1 0>; + iovcc-supply = <&v3v3_hdmi>; + cvcc12-supply = <&v1v2_hdmi>; + + #sound-dai-cells = <0>; + sil,i2s-data-lanes = < 0 1 2 >; + clocks = <&mclk>; + clock-names = "mclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + bridge_in: endpoint { + remote-endpoint = <&dc_out>; + }; + }; + }; + }; + }; -- 2.25.1

2 2

Re: mainline build failure due to f1e4c916f97f ("drm/edid: add EDID block count and size helpers")
by Jani Nikula 06 Jun '22

06 Jun '22

On Mon, 30 May 2022, Arnd Bergmann <arnd(a)arndb.de> wrote: > On Mon, May 30, 2022 at 3:10 PM Jani Nikula <jani.nikula(a)intel.com> wrote: >> > >> > I think in general, most __packed annotations we have in the kernel are >> > completely pointless because they do not change the structure layout on >> > any architecture but instead just make member access slower on >> >> Please explain. >> >> They are used quite a bit for parsing blob data, or >> serialization/deserialization, like in the EDID case at hand. Try >> removing __attribute__((packed)) from include/drm/drm_edid.h and see the >> sizeof(struct edid) on any architecture. > > The annotations for edid are completely correct and necessary. However > other driver authors just slap __packed annotations on any structure > even if the layout is not fixed at all like: Right. Thanks for the examples. > struct my_driver_priv { > struct device dev; > u8 causes_misalignment; > spinlock_t lock; > atomic_t counter; > } __packed; /* this annotation is harmful because it breaks the atomics */ I wonder if this is something that could be caught with coccinelle. Or sparse. Are there any cases where this combo is necessary? (I can't think of any, but it's a low bar. ;) Cc: Julia. > or if the annotation does not change the layout like > > struct my_dma_descriptor { > __le64 address; > __le64 length; > } __packed; /* does not change layout but makes access slow on some > architectures */ Why is this the case, though? I'd imagine the compiler could figure this out. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center

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[RFC PATCH 0/1] KUnit tests for drm_format_helper
by José Expósito 06 Jun '22

06 Jun '22

Hello everyone, Recently Javier added a new task in the ToDo list [1] to create KUnit tests for the functions present in "drm_format_helper". This patch, marked as RFC to start the conversation, includes tests for "drm_fb_xrgb8888_to_rgb332". Since the conversion functions present in "drm_format_helper" convert from XRGB8888 to another format, my plan is to create a set of XRGB8888 data to test all the available conversions. To illustrate it with an example, the code present in this patch: { .name = "Single pixel source", .pitch = 1 * 4, .dst_pitch = 0, .clip = CLIP(0, 0, 1, 1), .xrgb8888 = { 0x01FF0000 }, .expected = { 0xE0 }, } In a follow up patch, should look like: { .name = "Single pixel source", .pitch = 1 * 4, .clip = CLIP(0, 0, 1, 1), .xrgb8888 = { 0x01FF0000 }, .expected = { { .dst_format = DRM_FORMAT_RGB332, .dst_pitch = 0, .conv_func = drm_fb_xrgb8888_to_rgb332, .result = { 0xE0 }, }, { ... }, }, } What is tested? - Different values for the X in XRGB8888 to make sure it is ignored - Different clip values: Single pixel and full and partial buffer - Well know colors: White, black, red, green, blue, magenta, yellow and cyan - Other colors: Randomly picked - Destination pitch What is NOT tested? - NULL destination buffer: Because there is not validation in place - Out of bounds destination buffer: The size of the buffer is not checked. The conversion function could cause out of bound errors - Out of bounds source buffer: Similary to the destination buffer, the source buffer is read without checking its size - Invalid clip values: Because there is no clip validation. Example: clip out of or bigger than the source buffer - Invalid destination pitch: A dst_pitch < (clip->width * dst_pixsize) could cause issues. - "Big" source buffers. I don't know if this kind of tests could be of interest How to run the tests? My .kunitconfig: CONFIG_KUNIT=y CONFIG_DRM=y CONFIG_DRM_FORMAR_HELPER_TEST=y $ ./tools/testing/kunit/kunit.py run --arch=x86_64 Feedback? It'd be great to know your ideas about what else we could test, if you think that we should make the functions safer by checking the buffers and clip sizes or anything else. Thanks a lot, José Expósito [1] https://cgit.freedesktop.org/drm/drm-misc/commit/?id=596c35b1440e José Expósito (1): drm/format-helper: Add KUnit tests for drm_fb_xrgb8888_to_rgb332() drivers/gpu/drm/Kconfig | 12 ++ drivers/gpu/drm/Makefile | 3 + drivers/gpu/drm/drm_format_helper_test.c | 166 +++++++++++++++++++++++ 3 files changed, 181 insertions(+) create mode 100644 drivers/gpu/drm/drm_format_helper_test.c -- 2.25.1

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[PATCH 1/3] dt-bindings: display: simple: add support for Samsung LTL101AL01
by Martin Jücker 06 Jun '22

06 Jun '22

Add the Samsung LTL101AL01 WXGA LCD panel to the list. Signed-off-by: Martin Jücker <martin.juecker(a)gmail.com> --- .../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 1eb9dd4f8f58..9501b5a3c011 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -270,6 +270,8 @@ properties: - samsung,atna33xc20 # Samsung 12.2" (2560x1600 pixels) TFT LCD panel - samsung,lsn122dl01-c01 + # Samsung Electronics 10.1" WXGA (1280x800) TFT LCD panel + - samsung,ltl101al01 # Samsung Electronics 10.1" WSVGA TFT LCD panel - samsung,ltn101nt05 # Samsung Electronics 14" WXGA (1366x768) TFT LCD panel -- 2.25.1

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dri-devel May 2022