dri-devel May 2022

dri-devel@lists.freedesktop.org

344 participants
736 discussions

5.18 vmwgfx seems to break booting VirtualBox VMs
by Hans de Goede 10 May '22

10 May '22

Hi All, Fedora has received a bug report here: https://bugzilla.redhat.com/show_bug.cgi?id=2072556 That Fedora rawhide VMs no longer boot under the VirtualBox hypervisor after the VM has been updated to a 5.18-rc# kernel. Switching the emulated GPU from vmwaregfx to VirtualBoxSVGA fixes this, so this seems to be a vmwgfx driver regression. Note I've not investigated/reproduced this myself due to -ENOTIME. Regards, Hans

3 9

[RFC] drm/amdgpu: Convert to common fdinfo format
by Tvrtko Ursulin 10 May '22

10 May '22

From: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Convert fdinfo format to one documented in drm-usage-stats.rst. Opens/TODO: * Does someone from AMD want to take over this patch? (I have no access to amdgpu hardware so won't be able to test any hypothetical gputop work.) * What are the semantics of AMD engine utilisation reported in percents? * Can it align with what i915 does (same what msm will do) or need to document the alternative in the specification document? Both option are workable with instantaneous percent only needing support to be added to vendor agnostic gputop. * Can amdgpu expose drm-client-id? Without it gputop will not work. * drm-engine-capacity - does the concept translate etc. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Cc: David M Nieto <David.Nieto(a)amd.com> Cc: Christian König <christian.koenig(a)amd.com> Cc: Daniel Vetter <daniel(a)ffwll.ch> Acked-by: Christian König <christian.koenig(a)amd.com> --- Documentation/gpu/amdgpu/usage-stats.rst | 28 ++++++++++++++++++++++ Documentation/gpu/drm-usage-stats.rst | 7 +++++- drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 18 ++++++++++---- 3 files changed, 47 insertions(+), 6 deletions(-) create mode 100644 Documentation/gpu/amdgpu/usage-stats.rst diff --git a/Documentation/gpu/amdgpu/usage-stats.rst b/Documentation/gpu/amdgpu/usage-stats.rst new file mode 100644 index 000000000000..8be5009bd1a9 --- /dev/null +++ b/Documentation/gpu/amdgpu/usage-stats.rst @@ -0,0 +1,28 @@ +.. _amdgpu-usage-stats: + +============================================ +AMDGPU DRM client usage stats implementation +============================================ + +The amdgpu driver implements the DRM client usage stats specification as +documented in :ref:`drm-client-usage-stats`. + +Example of the output showing the implemented key value pairs and entirety of +the currenly possible format options: + +:: + + pos: 0 + flags: 0100002 + mnt_id: 21 + drm-driver: amdgpu + drm-pdev: 0000:03:00.0 + drm-memory-vram: 0 KiB + drm-memory-gtt: 0 KiB + drm-memory-cpu: 0 KiB + drm-engine-...: 0 % + ... + +Possible `drm-memory-` key names are: `vram`, `gtt`, `cpu`. + +Possible `drm-engine-` key names are: ``. diff --git a/Documentation/gpu/drm-usage-stats.rst b/Documentation/gpu/drm-usage-stats.rst index 6c9f166a8d6f..2d0ff6f2cc74 100644 --- a/Documentation/gpu/drm-usage-stats.rst +++ b/Documentation/gpu/drm-usage-stats.rst @@ -69,7 +69,7 @@ scope of each device, in which case `drm-pdev` shall be present as well. Userspace should make sure to not double account any usage statistics by using the above described criteria in order to associate data to individual clients. -- drm-engine-<str>: <uint> ns +- drm-engine-<str>: <uint> [ns|%] GPUs usually contain multiple execution engines. Each shall be given a stable and unique name (str), with possible values documented in the driver specific @@ -84,6 +84,9 @@ larger value within a reasonable period. Upon observing a value lower than what was previously read, userspace is expected to stay with that larger previous value until a monotonic update is seen. +Where time unit is given as a percentage...[AMD folks to fill the semantics +and interpretation of that]... + - drm-engine-capacity-<str>: <uint> Engine identifier string must be the same as the one specified in the @@ -110,3 +113,5 @@ Driver specific implementations =============================== :ref:`i915-usage-stats` + +:ref:`amdgpu-usage-stats` diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c index 5a6857c44bb6..8cbae61f1b3b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c @@ -32,6 +32,7 @@ #include <drm/amdgpu_drm.h> #include <drm/drm_debugfs.h> +#include <drm/drm_drv.h> #include "amdgpu.h" #include "amdgpu_vm.h" @@ -83,11 +84,18 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) amdgpu_bo_unreserve(root); amdgpu_bo_unref(&root); - seq_printf(m, "pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, + /* + * ****************************************************************** + * For text output format description please see drm-usage-stats.rst! + * ****************************************************************** + */ + + seq_printf(m, "drm-driver:\t%s\n", file->minor->dev->driver->name); + seq_printf(m, "drm-pdev:\t%04x:%02x:%02x.%d\npasid:\t%u\n", domain, bus, dev, fn, fpriv->vm.pasid); - seq_printf(m, "vram mem:\t%llu kB\n", vram_mem/1024UL); - seq_printf(m, "gtt mem:\t%llu kB\n", gtt_mem/1024UL); - seq_printf(m, "cpu mem:\t%llu kB\n", cpu_mem/1024UL); + seq_printf(m, "drm-memory-vram:\t%llu KiB\n", vram_mem/1024UL); + seq_printf(m, "drm-memory-gtt:\t%llu KiB\n", gtt_mem/1024UL); + seq_printf(m, "drm-memory-cpu:\t%llu KiB\n", cpu_mem/1024UL); for (i = 0; i < AMDGPU_HW_IP_NUM; i++) { uint32_t count = amdgpu_ctx_num_entities[i]; int idx = 0; @@ -103,7 +111,7 @@ void amdgpu_show_fdinfo(struct seq_file *m, struct file *f) perc = div64_u64(10000 * total, min); frac = perc % 100; - seq_printf(m, "%s%d:\t%d.%d%%\n", + seq_printf(m, "drm-engine-%s%d:\t%d.%d %%\n", amdgpu_ip_name[i], idx, perc/100, frac); } -- 2.32.0

2 4

[PATCH] dmabuf: ensure unique directory name for dmabuf stats
by Charan Teja Kalla 10 May '22

10 May '22

The dmabuf file uses get_next_ino()(through dma_buf_getfile() -> alloc_anon_inode()) to get an inode number and uses the same as a directory name under /sys/kernel/dmabuf/buffers/<ino>. This directory is used to collect the dmabuf stats and it is created through dma_buf_stats_setup(). At current, failure to create this directory entry can make the dma_buf_export() to fail. Now, as the get_next_ino() can definitely give a repetitive inode no causing the directory entry creation to fail with -EEXIST. This is a problem on the systems where dmabuf stats functionality is enabled on the production builds can make the dma_buf_export(), though the dmabuf memory is allocated successfully, to fail just because it couldn't create stats entry. This issue we are able to see on the snapdragon system within 13 days where there already exists a directory with inode no "122602" so dma_buf_stats_setup() failed with -EEXIST as it is trying to create the same directory entry. To make the directory entry as unique, append the inode creation time to the inode. With this change the stats directory entries will be in the format of: /sys/kernel/dmabuf/buffers/<inode no>-<inode creation time in secs>. Signed-off-by: Charan Teja Kalla <quic_charante(a)quicinc.com> --- drivers/dma-buf/dma-buf-sysfs-stats.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/dma-buf/dma-buf-sysfs-stats.c b/drivers/dma-buf/dma-buf-sysfs-stats.c index 2bba0ba..292cb31 100644 --- a/drivers/dma-buf/dma-buf-sysfs-stats.c +++ b/drivers/dma-buf/dma-buf-sysfs-stats.c @@ -192,7 +192,8 @@ int dma_buf_stats_setup(struct dma_buf *dmabuf) /* create the directory for buffer stats */ ret = kobject_init_and_add(&sysfs_entry->kobj, &dma_buf_ktype, NULL, - "%lu", file_inode(dmabuf->file)->i_ino); + "%lu-%lu", file_inode(dmabuf->file)->i_ino, + file_inode(dmabuf->file)->i_ctime.tv_sec); if (ret) goto err_sysfs_dmabuf; -- 2.7.4

4 7

[PATCH] drm/ast: Support multiple outputs
by Thomas Zimmermann 10 May '22

10 May '22

Systems with AST graphics can have multiple output; typically VGA plus some other port. Record detected output chips in a bitmask and initialize each output on its own. Tested on AST2100. Signed-off-by: Thomas Zimmermann <tzimmermann(a)suse.de> Fixes: a59b026419f3 ("drm/ast: Initialize encoder and connector for VGA in helper function") Cc: Thomas Zimmermann <tzimmermann(a)suse.de> Cc: Javier Martinez Canillas <javierm(a)redhat.com> Cc: Dave Airlie <airlied(a)redhat.com> Cc: dri-devel(a)lists.freedesktop.org --- drivers/gpu/drm/ast/ast_dp.c | 5 ++--- drivers/gpu/drm/ast/ast_dp501.c | 2 +- drivers/gpu/drm/ast/ast_drv.h | 4 ++-- drivers/gpu/drm/ast/ast_main.c | 21 ++++++++---------- drivers/gpu/drm/ast/ast_mode.c | 38 ++++++++++++++++++--------------- drivers/gpu/drm/ast/ast_post.c | 2 +- 6 files changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_dp.c b/drivers/gpu/drm/ast/ast_dp.c index 4551bc8a3ecf..f573d582407e 100644 --- a/drivers/gpu/drm/ast/ast_dp.c +++ b/drivers/gpu/drm/ast/ast_dp.c @@ -160,13 +160,12 @@ void ast_dp_launch(struct drm_device *dev, u8 bPower) } if (bDPExecute) - ast->tx_chip_type = AST_TX_ASTDP; + ast->tx_chip_types |= BIT(AST_TX_ASTDP); ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xE5, (u8) ~ASTDP_HOST_EDID_READ_DONE_MASK, ASTDP_HOST_EDID_READ_DONE); - } else - ast->tx_chip_type = AST_TX_NONE; + } } diff --git a/drivers/gpu/drm/ast/ast_dp501.c b/drivers/gpu/drm/ast/ast_dp501.c index 204c926a18ea..4f75a9efb610 100644 --- a/drivers/gpu/drm/ast/ast_dp501.c +++ b/drivers/gpu/drm/ast/ast_dp501.c @@ -450,7 +450,7 @@ void ast_init_3rdtx(struct drm_device *dev) ast_init_dvo(dev); break; default: - if (ast->tx_chip_type == AST_TX_SIL164) + if (ast->tx_chip_types & BIT(AST_TX_SIL164)) ast_init_dvo(dev); else ast_init_analog(dev); diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index afebe35f205e..3055b0be7b67 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -173,7 +173,7 @@ struct ast_private { struct drm_plane primary_plane; struct ast_cursor_plane cursor_plane; struct drm_crtc crtc; - union { + struct { struct { struct drm_encoder encoder; struct ast_vga_connector vga_connector; @@ -199,7 +199,7 @@ struct ast_private { ast_use_defaults } config_mode; - enum ast_tx_chip tx_chip_type; + unsigned long tx_chip_types; /* bitfield of enum ast_chip_type */ u8 *dp501_fw_addr; const struct firmware *dp501_fw; /* dp501 fw */ }; diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index d770d5a23c1a..ac64510c75cd 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -216,7 +216,7 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) } /* Check 3rd Tx option (digital output afaik) */ - ast->tx_chip_type = AST_TX_NONE; + ast->tx_chip_types |= BIT(AST_TX_NONE); /* * VGACRA3 Enhanced Color Mode Register, check if DVO is already @@ -229,7 +229,7 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) if (!*need_post) { jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); if (jreg & 0x80) - ast->tx_chip_type = AST_TX_SIL164; + ast->tx_chip_types |= BIT(AST_TX_SIL164); } if ((ast->chip == AST2300) || (ast->chip == AST2400) || (ast->chip == AST2500)) { @@ -241,7 +241,7 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); switch (jreg) { case 0x04: - ast->tx_chip_type = AST_TX_SIL164; + ast->tx_chip_types |= BIT(AST_TX_SIL164); break; case 0x08: ast->dp501_fw_addr = drmm_kzalloc(dev, 32*1024, GFP_KERNEL); @@ -254,22 +254,19 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) } fallthrough; case 0x0c: - ast->tx_chip_type = AST_TX_DP501; + ast->tx_chip_types |= BIT(AST_TX_DP501); } } else if (ast->chip == AST2600) ast_dp_launch(&ast->base, 0); /* Print stuff for diagnostic purposes */ - switch(ast->tx_chip_type) { - case AST_TX_SIL164: + if (ast->tx_chip_types & BIT(AST_TX_NONE)) + drm_info(dev, "Using analog VGA\n"); + if (ast->tx_chip_types & BIT(AST_TX_SIL164)) drm_info(dev, "Using Sil164 TMDS transmitter\n"); - break; - case AST_TX_DP501: + if (ast->tx_chip_types & BIT(AST_TX_DP501)) drm_info(dev, "Using DP501 DisplayPort transmitter\n"); - break; - default: - drm_info(dev, "Analog VGA only\n"); - } + return 0; } diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index 323af2746aa9..e19dd2f9b3ce 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -997,10 +997,10 @@ static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) case DRM_MODE_DPMS_ON: ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, 0); ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xfc, 0); - if (ast->tx_chip_type == AST_TX_DP501) + if (ast->tx_chip_types & BIT(AST_TX_DP501)) ast_set_dp501_video_output(crtc->dev, 1); - if (ast->tx_chip_type == AST_TX_ASTDP) { + if (ast->tx_chip_types & BIT(AST_TX_ASTDP)) { ast_dp_power_on_off(crtc->dev, AST_DP_POWER_ON); ast_wait_for_vretrace(ast); ast_dp_set_on_off(crtc->dev, 1); @@ -1012,17 +1012,17 @@ static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) case DRM_MODE_DPMS_SUSPEND: case DRM_MODE_DPMS_OFF: ch = mode; - if (ast->tx_chip_type == AST_TX_DP501) + if (ast->tx_chip_types & BIT(AST_TX_DP501)) ast_set_dp501_video_output(crtc->dev, 0); - break; - if (ast->tx_chip_type == AST_TX_ASTDP) { + if (ast->tx_chip_types & BIT(AST_TX_ASTDP)) { ast_dp_set_on_off(crtc->dev, 0); ast_dp_power_on_off(crtc->dev, AST_DP_POWER_OFF); } ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x01, 0xdf, 0x20); ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xfc, ch); + break; } } @@ -1155,7 +1155,7 @@ ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, ast_crtc_load_lut(ast, crtc); //Set Aspeed Display-Port - if (ast->tx_chip_type == AST_TX_ASTDP) + if (ast->tx_chip_types & BIT(AST_TX_ASTDP)) ast_dp_set_mode(crtc, vbios_mode_info); mutex_unlock(&ast->ioregs_lock); @@ -1739,22 +1739,26 @@ int ast_mode_config_init(struct ast_private *ast) ast_crtc_init(dev); - switch (ast->tx_chip_type) { - case AST_TX_NONE: + if (ast->tx_chip_types & BIT(AST_TX_NONE)) { ret = ast_vga_output_init(ast); - break; - case AST_TX_SIL164: + if (ret) + return ret; + } + if (ast->tx_chip_types & BIT(AST_TX_SIL164)) { ret = ast_sil164_output_init(ast); - break; - case AST_TX_DP501: + if (ret) + return ret; + } + if (ast->tx_chip_types & BIT(AST_TX_DP501)) { ret = ast_dp501_output_init(ast); - break; - case AST_TX_ASTDP: + if (ret) + return ret; + } + if (ast->tx_chip_types & BIT(AST_TX_ASTDP)) { ret = ast_astdp_output_init(ast); - break; + if (ret) + return ret; } - if (ret) - return ret; drm_mode_config_reset(dev); diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c index 0aa9cf0fb5c3..2e1c343b70a3 100644 --- a/drivers/gpu/drm/ast/ast_post.c +++ b/drivers/gpu/drm/ast/ast_post.c @@ -391,7 +391,7 @@ void ast_post_gpu(struct drm_device *dev) ast_init_3rdtx(dev); } else { - if (ast->tx_chip_type != AST_TX_NONE) + if (ast->tx_chip_types & BIT(AST_TX_SIL164)) ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x80); /* Enable DVO */ } } -- 2.36.0

1 0

[PATCH 14/15] drm/edid: Extract drm_edid_decode_mfg_id()
by Ville Syrjala 10 May '22

10 May '22

From: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Make the PNPID decoding available for other users. Cc: dri-devel(a)lists.freedesktop.org Reviewed-by: Jani Nikula <jani.nikula(a)intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala(a)linux.intel.com> --- include/drm/drm_edid.h | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h index c3204a58fb09..e92385a13d2a 100644 --- a/include/drm/drm_edid.h +++ b/include/drm/drm_edid.h @@ -496,6 +496,22 @@ static inline u8 drm_eld_get_conn_type(const uint8_t *eld) return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_CONN_TYPE_MASK; } +/** + * drm_edid_decode_mfg_id - Decode the manufacturer ID + * @mfg_id: The manufacturer ID + * @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0' + * termination + */ +static inline const char *drm_edid_decode_mfg_id(u16 mfg_id, char vend[4]) +{ + vend[0] = '@' + ((mfg_id >> 10) & 0x1f); + vend[1] = '@' + ((mfg_id >> 5) & 0x1f); + vend[2] = '@' + ((mfg_id >> 0) & 0x1f); + vend[3] = '\0'; + + return vend; +} + /** * drm_edid_encode_panel_id - Encode an ID for matching against drm_edid_get_panel_id() * @vend_chr_0: First character of the vendor string. @@ -536,10 +552,7 @@ static inline u8 drm_eld_get_conn_type(const uint8_t *eld) static inline void drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16 *product_id) { *product_id = (u16)(panel_id & 0xffff); - vend[0] = '@' + ((panel_id >> 26) & 0x1f); - vend[1] = '@' + ((panel_id >> 21) & 0x1f); - vend[2] = '@' + ((panel_id >> 16) & 0x1f); - vend[3] = '\0'; + drm_edid_decode_mfg_id(panel_id >> 16, vend); } bool drm_probe_ddc(struct i2c_adapter *adapter); -- 2.35.1

1 0

[PATCH] dma-buf: call dma_buf_stats_setup after dmabuf is in valid list
by Charan Teja Kalla 10 May '22

10 May '22

From: Charan Teja Reddy <quic_charante(a)quicinc.com> When dma_buf_stats_setup() fails, it closes the dmabuf file which results into the calling of dma_buf_file_release() where it does list_del(&dmabuf->list_node) with out first adding it to the proper list. This is resulting into panic in the below path: __list_del_entry_valid+0x38/0xac dma_buf_file_release+0x74/0x158 __fput+0xf4/0x428 ____fput+0x14/0x24 task_work_run+0x178/0x24c do_notify_resume+0x194/0x264 work_pending+0xc/0x5f0 Fix it by moving the dma_buf_stats_setup() after dmabuf is added to the list. Fixes: bdb8d06dfefd ("dmabuf: Add the capability to expose DMA-BUF stats in sysfs") Signed-off-by: Charan Teja Reddy <quic_charante(a)quicinc.com> --- drivers/dma-buf/dma-buf.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c index 602b12d..a6fc96e 100644 --- a/drivers/dma-buf/dma-buf.c +++ b/drivers/dma-buf/dma-buf.c @@ -543,10 +543,6 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) file->f_mode |= FMODE_LSEEK; dmabuf->file = file; - ret = dma_buf_stats_setup(dmabuf); - if (ret) - goto err_sysfs; - mutex_init(&dmabuf->lock); INIT_LIST_HEAD(&dmabuf->attachments); @@ -554,6 +550,10 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) list_add(&dmabuf->list_node, &db_list.head); mutex_unlock(&db_list.lock); + ret = dma_buf_stats_setup(dmabuf); + if (ret) + goto err_sysfs; + return dmabuf; err_sysfs: -- 2.7.4

3 3

[PATCH] drm/stm: dsi: Enable wrapper glue regulator early
by Marek Vasut 10 May '22

10 May '22

Certain DSI bridge chips like TC358767/TC358867/TC9595 expect the DSI D0 data lane to be in LP-11 state when released from reset. Currently the STM32MP157 DSI host wrapper glue logic keeps D0 data lane in LP-00 state until DSI init happens, which confuses the TC358767 into entering some sort of test mode and the chip cannot be brought out of this test mode in any way. Enable the wrapper glue logic regulator in probe callback already and disable it in remove callback to satisfy this requirement. The D0 data lane is in LP-11 mode when the TC358767 bridge chip is brought up and the chip is not confused anymore. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Alexandre Torgue <alexandre.torgue(a)foss.st.com> Cc: Antonio Borneo <antonio.borneo(a)foss.st.com> Cc: Philippe Cornu <philippe.cornu(a)foss.st.com> Cc: Raphael Gallais-Pou <raphael.gallais-pou(a)foss.st.com> Cc: Robert Foss <robert.foss(a)linaro.org> Cc: Yannick Fertre <yannick.fertre(a)foss.st.com> --- drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 30 +++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c index 89897d5f5c72..c403633ffeae 100644 --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c @@ -194,16 +194,29 @@ static int dsi_pll_get_params(struct dw_mipi_dsi_stm *dsi, return 0; } +static int dw_mipi_dsi_phy_regulator_on(struct dw_mipi_dsi_stm *dsi) +{ + u32 val; + + /* Enable the regulator */ + dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN); + return readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS, + SLEEP_US, TIMEOUT_US); +} + +static void dw_mipi_dsi_phy_regulator_off(struct dw_mipi_dsi_stm *dsi) +{ + /* Disable the regulator */ + dsi_clear(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN); +} + static int dw_mipi_dsi_phy_init(void *priv_data) { struct dw_mipi_dsi_stm *dsi = priv_data; u32 val; int ret; - /* Enable the regulator */ - dsi_set(dsi, DSI_WRPCR, WRPCR_REGEN | WRPCR_BGREN); - ret = readl_poll_timeout(dsi->base + DSI_WISR, val, val & WISR_RRS, - SLEEP_US, TIMEOUT_US); + ret = dw_mipi_dsi_phy_regulator_on(dsi); if (ret) DRM_DEBUG_DRIVER("!TIMEOUT! waiting REGU, let's continue\n"); @@ -499,8 +512,16 @@ static int dw_mipi_dsi_stm_probe(struct platform_device *pdev) } dsi->hw_version = dsi_read(dsi, DSI_VERSION) & VERSION; + + ret = dw_mipi_dsi_phy_regulator_on(dsi); clk_disable_unprepare(pclk); + if (ret) { + DRM_ERROR("%s: Failed to enable wrapper regulator, ret=%d\n", + __func__, ret); + goto err_dsi_probe; + } + if (dsi->hw_version != HWVER_130 && dsi->hw_version != HWVER_131) { ret = -ENODEV; DRM_ERROR("bad dsi hardware version\n"); @@ -542,6 +563,7 @@ static int dw_mipi_dsi_stm_remove(struct platform_device *pdev) struct dw_mipi_dsi_stm *dsi = platform_get_drvdata(pdev); dw_mipi_dsi_remove(dsi->dsi); + dw_mipi_dsi_phy_regulator_off(dsi); clk_disable_unprepare(dsi->pllref_clk); regulator_disable(dsi->vdd_supply); -- 2.35.1

2 4

[PATCH v2 1/2] drm/msm/a6xx: Add support for a new 7c3 sku
by Akhil P Oommen 10 May '22

10 May '22

Add a new sku to the fuse map of 7c3 gpu. Signed-off-by: Akhil P Oommen <quic_akhilpo(a)quicinc.com> --- (no changes since v1) drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 841e47a..61bb21d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1771,6 +1771,8 @@ static u32 adreno_7c3_get_speed_bin(u32 fuse) return 0; else if (fuse == 190) return 1; + else if (fuse == 96) + return 2; return UINT_MAX; } -- 2.7.4

1 1

[PATCH 1/2] drm/msm/a6xx: Add support for a new 7c3 sku
by Akhil P Oommen 10 May '22

10 May '22

Add a new sku to the fuse map of 7c3 gpu. Signed-off-by: Akhil P Oommen <quic_akhilpo(a)quicinc.com> --- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index 841e47a..61bb21d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1771,6 +1771,8 @@ static u32 adreno_7c3_get_speed_bin(u32 fuse) return 0; else if (fuse == 190) return 1; + else if (fuse == 96) + return 2; return UINT_MAX; } -- 2.7.4

1 1

[PATCH] mgag200: Enable atomic gamma lut update
by Jocelyn Falempe 10 May '22

10 May '22

Add support for atomic update of gamma lut. With this patch the "Night light" feature of gnome3 is working properly on mgag200. Signed-off-by: Jocelyn Falempe <jfalempe(a)redhat.com> --- drivers/gpu/drm/mgag200/mgag200_mode.c | 46 ++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 6e18d3bbd720..9fc688e15db8 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -86,6 +86,46 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc) } } +static void mga_crtc_update_lut(struct mga_device *mdev, + struct drm_crtc_state *state, + u8 depth) +{ + struct drm_color_lut * lut; + int i; + + if (!state->color_mgmt_changed || !state->gamma_lut) + return + + lut = (struct drm_color_lut *) state->gamma_lut->data; + WREG8(DAC_INDEX + MGA1064_INDEX, 0); + + if (depth == 15) { + /* 16 bits r5g5b5a1 */ + for (i = 0; i < MGAG200_LUT_SIZE; i += 8) { + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].red >> 8); + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].green >> 8); + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].blue >> 8); + } + } else if (depth == 16) { + /* 16 bits r5g6b5, as green has one more bit, + * add padding with 0 for red and blue. */ + for (i = 0; i < MGAG200_LUT_SIZE; i += 4) { + u8 red = 2 * i < MGAG200_LUT_SIZE ? lut[2 * i].red >> 8 : 0; + u8 blue = 2 * i < MGAG200_LUT_SIZE ? lut[2 * i].red >> 8 : 0; + WREG8(DAC_INDEX + MGA1064_COL_PAL, red); + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].green >> 8); + WREG8(DAC_INDEX + MGA1064_COL_PAL, blue); + } + } else { + /* 24 bits r8g8b8 */ + for (i = 0; i < MGAG200_LUT_SIZE; i++) { + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].red >> 8); + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].green >> 8); + WREG8(DAC_INDEX + MGA1064_COL_PAL, lut[i].blue >> 8); + } + } +} + static inline void mga_wait_vsync(struct mga_device *mdev) { unsigned long timeout = jiffies + HZ/10; @@ -953,6 +993,7 @@ mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_state) { struct drm_plane *plane = &pipe->plane; + struct drm_crtc *crtc = &pipe->crtc; struct drm_device *dev = plane->dev; struct mga_device *mdev = to_mga_device(dev); struct drm_plane_state *state = plane->state; @@ -963,7 +1004,10 @@ mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, if (!fb) return; + mga_crtc_update_lut(mdev, crtc->state, fb->format->depth); + if (drm_atomic_helper_damage_merged(old_state, state, &damage)) + mgag200_handle_damage(mdev, fb, &damage, &shadow_plane_state->data[0]); } @@ -1110,6 +1154,8 @@ int mgag200_modeset_init(struct mga_device *mdev) /* FIXME: legacy gamma tables; convert to CRTC state */ drm_mode_crtc_set_gamma_size(&pipe->crtc, MGAG200_LUT_SIZE); + drm_crtc_enable_color_mgmt(&pipe->crtc, 0, false, MGAG200_LUT_SIZE); + drm_mode_config_reset(dev); return 0; -- 2.35.3

4 7

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dri-devel May 2022