dri-devel May 2022

dri-devel@lists.freedesktop.org

344 participants
736 discussions

[PATCH] drm/tegra: gem: Do not try to dereference ERR_PTR()
by Thierry Reding 06 May '22

06 May '22

From: Thierry Reding <treding(a)nvidia.com> When mapping the DMA-BUF attachment fails, map->sgt will be an ERR_PTR- encoded error code and the cleanup code would try to free that memory, which obviously would fail. Zero out that pointer after extracting the error code when this happens so that kfree() can do the right thing. Reported-by: kernel test robot <lkp(a)intel.com> Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- drivers/gpu/drm/tegra/gem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c index 0063403ab5e1..7c7dd84e6db8 100644 --- a/drivers/gpu/drm/tegra/gem.c +++ b/drivers/gpu/drm/tegra/gem.c @@ -88,6 +88,7 @@ static struct host1x_bo_mapping *tegra_bo_pin(struct device *dev, struct host1x_ if (IS_ERR(map->sgt)) { dma_buf_detach(buf, map->attach); err = PTR_ERR(map->sgt); + map->sgt = NULL; goto free; } -- 2.35.1

1 0

[PATCH] dt-bindings: display: bridge: ldb: Fill in reg property
by Marek Vasut 06 May '22

06 May '22

Add missing reg and reg-names properties for both 'LDB_CTRL' and 'LVDS_CTRL' registers. Fixes: 463db5c2ed4ae ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge") Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> Cc: Lucas Stach <l.stach(a)pengutronix.de> Cc: Maxime Ripard <maxime(a)cerno.tech> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: Robby Cai <robby.cai(a)nxp.com> Cc: Robert Foss <robert.foss(a)linaro.org> Cc: Sam Ravnborg <sam(a)ravnborg.org> Cc: Thomas Zimmermann <tzimmermann(a)suse.de> Cc: devicetree(a)vger.kernel.org To: dri-devel(a)lists.freedesktop.org --- .../bindings/display/bridge/fsl,ldb.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml index 77f174eee424f..2ebaa43eb62e9 100644 --- a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -24,6 +24,15 @@ properties: clock-names: const: ldb + reg: + minItems: 2 + maxItems: 2 + + reg-names: + items: + - const: ldb + - const: lvds + ports: $ref: /schemas/graph.yaml#/properties/ports @@ -56,10 +65,15 @@ examples: #include <dt-bindings/clock/imx8mp-clock.h> blk-ctrl { - bridge { + #address-cells = <1>; + #size-cells = <1>; + + bridge@5c { compatible = "fsl,imx8mp-ldb"; clocks = <&clk IMX8MP_CLK_MEDIA_LDB>; clock-names = "ldb"; + reg = <0x5c 0x4>, <0x128 0x4>; + reg-names = "ldb", "lvds"; ports { #address-cells = <1>; -- 2.35.1

3 2

[PATCH -next] drm/msm: Add missing OF dependency for DRM_MSM
by YueHaibing 06 May '22

06 May '22

WARNING: unmet direct dependencies detected for DRM_DP_AUX_BUS Depends on [n]: HAS_IOMEM [=y] && DRM [=y] && OF [=n] Selected by [y]: - DRM_MSM [=y] && HAS_IOMEM [=y] && DRM [=y] && (ARCH_QCOM || SOC_IMX5 || COMPILE_TEST [=y]) && COMMON_CLK [=y] && IOMMU_SUPPORT [=y] && (QCOM_OCMEM [=n] || QCOM_OCMEM [=n]=n) && (QCOM_LLCC [=y] || QCOM_LLCC [=y]=n) && (QCOM_COMMAND_DB [=n] || QCOM_COMMAND_DB [=n]=n) DRM_DP_AUX_BUS depends on OF, so DRM_MSM also should depends on it. Fixes: f5d01644921b ("drm/msm: select DRM_DP_AUX_BUS for the AUX bus support") Signed-off-by: YueHaibing <yuehaibing(a)huawei.com> --- drivers/gpu/drm/msm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig index 4e0cbd682725..1d710a20ffdd 100644 --- a/drivers/gpu/drm/msm/Kconfig +++ b/drivers/gpu/drm/msm/Kconfig @@ -3,6 +3,7 @@ config DRM_MSM tristate "MSM DRM" depends on DRM + depends on OF depends on ARCH_QCOM || SOC_IMX5 || COMPILE_TEST depends on COMMON_CLK depends on IOMMU_SUPPORT -- 2.17.1

2 2

[PATCH 0/3] Introduce EBBG FT8719 DRM panel driver
by Joel Selvaraj 06 May '22

06 May '22

Add bindings and DRM panel driver for EBBG FT8719 6.18" 2246x1080 DSI video mode panel, which can be found on some Xiaomi Poco F1 phones. The panel's backlight is managed through QCOM WLED driver. The driver is built using linux-mdss-dsi-panel-driver-generator[1], and additionally support for handling regulators and linking external backlight is added. [1] https://github.com/msm8916-mainline/linux-mdss-dsi-panel-driver-generator Joel Selvaraj (3): dt-bindings: vendor-prefixes: Add prefix for EBBG dt-bindings: display: Add bindings for EBBG FT8719 drm/panel: introduce ebbg,ft8719 panel .../bindings/display/panel/ebbg,ft8719.yaml | 78 ++++ .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 7 + drivers/gpu/drm/panel/Kconfig | 11 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-ebbg-ft8719.c | 362 ++++++++++++++++++ 6 files changed, 461 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml create mode 100644 drivers/gpu/drm/panel/panel-ebbg-ft8719.c -- 2.35.1

1 0

[PATCH v4 1/2] dt-bindings: display: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge
by Marek Vasut 06 May '22

06 May '22

The i.MX8MP contains two syscon registers which are responsible for configuring the on-SoC DPI-to-LVDS serializer. Add DT binding which represents this serializer as a bridge. Acked-by: Sam Ravnborg <sam(a)ravnborg.org> Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com> Cc: Lucas Stach <l.stach(a)pengutronix.de> Cc: Maxime Ripard <maxime(a)cerno.tech> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: Robby Cai <robby.cai(a)nxp.com> Cc: Robert Foss <robert.foss(a)linaro.org> Cc: Sam Ravnborg <sam(a)ravnborg.org> Cc: Thomas Zimmermann <tzimmermann(a)suse.de> Cc: devicetree(a)vger.kernel.org To: dri-devel(a)lists.freedesktop.org --- V2: - Consistently use fsl,imx8mp-ldb as compatible - Drop items: from compatible: - Replace minItems with maxItems in clocks: - Drop quotes from clock-names const: ldb - Rename syscon to fsl,syscon - Use generic name of ldb-lvds in example V3: - Add AB from Sam - Consistently use MX8MP V4: - Rename to fsl-ldb all over the place - Put the LDB node under media block controller in the example --- .../bindings/display/bridge/fsl,ldb.yaml | 92 +++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml new file mode 100644 index 000000000000..77f174eee424 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MP DPI to LVDS bridge chip + +maintainers: + - Marek Vasut <marex(a)denx.de> + +description: | + The i.MX8MP mediamix contains two registers which are responsible + for configuring the on-SoC DPI-to-LVDS serializer. This describes + those registers as bridge within the DT. + +properties: + compatible: + const: fsl,imx8mp-ldb + + clocks: + maxItems: 1 + + clock-names: + const: ldb + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for DPI input. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for LVDS Channel-A output (panel or bridge). + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for LVDS Channel-B output (panel or bridge). + + required: + - port@0 + - port@1 + +required: + - compatible + - clocks + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + + blk-ctrl { + bridge { + compatible = "fsl,imx8mp-ldb"; + clocks = <&clk IMX8MP_CLK_MEDIA_LDB>; + clock-names = "ldb"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ldb_from_lcdif2: endpoint { + remote-endpoint = <&lcdif2_to_ldb>; + }; + }; + + port@1 { + reg = <1>; + + ldb_lvds_ch0: endpoint { + remote-endpoint = <&ldb_to_lvdsx4panel>; + }; + }; + + port@2 { + reg = <2>; + + ldb_lvds_ch1: endpoint { + }; + }; + }; + }; + }; -- 2.35.1

3 8

[PATCH] drm/mgag200: Fail on I2C initialization errors
by Thomas Zimmermann 06 May '22

06 May '22

Initialization of the I2C adapter was allowed to fail. The mgag200 driver would have continued without DDC support. Had this happened in practice, it would have led to segmentation faults in the connector code. Resolve this problem by failing driver initialization on I2C- related errors. Signed-off-by: Thomas Zimmermann <tzimmermann(a)suse.de> --- drivers/gpu/drm/mgag200/mgag200_i2c.c | 13 ++++++++----- drivers/gpu/drm/mgag200/mgag200_mode.c | 6 ++++-- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_i2c.c b/drivers/gpu/drm/mgag200/mgag200_i2c.c index ac8e34eef5138..31e2c641a7814 100644 --- a/drivers/gpu/drm/mgag200/mgag200_i2c.c +++ b/drivers/gpu/drm/mgag200/mgag200_i2c.c @@ -120,7 +120,7 @@ struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev) i2c = kzalloc(sizeof(struct mga_i2c_chan), GFP_KERNEL); if (!i2c) - return NULL; + return ERR_PTR(-ENOMEM); i2c->data = data; i2c->clock = clock; @@ -142,11 +142,14 @@ struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev) i2c->bit.getscl = mga_gpio_getscl; ret = i2c_bit_add_bus(&i2c->adapter); - if (ret) { - kfree(i2c); - i2c = NULL; - } + if (ret) + goto err_kfree; + return i2c; + +err_kfree: + kfree(i2c); + return ERR_PTR(ret); } void mgag200_i2c_destroy(struct mga_i2c_chan *i2c) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index abde7655477db..79557ca056f08 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -815,8 +815,10 @@ static int mgag200_vga_connector_init(struct mga_device *mdev) int ret; i2c = mgag200_i2c_create(dev); - if (!i2c) - drm_warn(dev, "failed to add DDC bus\n"); + if (IS_ERR(i2c)) { + drm_err(dev, "failed to add DDC bus: %d\n", ret); + return PTR_ERR(i2c); + } ret = drm_connector_init_with_ddc(dev, connector, &mga_vga_connector_funcs, -- 2.36.0

4 4

[PULL] drm-intel-next
by Jani Nikula 06 May '22

06 May '22

Hi Dave & Daniel - drm-intel-next-2022-05-06: drm/i915 feature pull #2 for v5.19: Features and functionality: - Add first set of DG2 PCI IDs for "motherboard down" designs (Matt Roper) - Add initial RPL-P PCI IDs as ADL-P subplatform (Matt Atwood) Refactoring and cleanups: - Power well refactoring and cleanup (Imre) - GVT-g refactor and mdev API cleanup (Christoph, Jason, Zhi) - DPLL refactoring and cleanup (Ville) - VBT panel specific data parsing cleanup (Ville) - Use drm_mode_init() for on-stack modes (Ville) Fixes: - Fix PSR state pipe A/B confusion by clearing more state on disable (José) - Fix FIFO underruns caused by not taking DRAM channel into account (Vinod) - Fix FBC flicker on display 11+ by enabling a workaround (José) - Fix VBT seamless DRRS min refresh rate check (Ville) - Fix panel type assumption on bogus VBT data (Ville) - Fix panel data parsing for VBT that misses panel data pointers block (Ville) - Fix spurious AUX timeout/hotplug handling on LTTPR links (Imre) Merges: - Backmerge drm-next (Jani) - GVT changes (Jani) BR, Jani. The following changes since commit 19df0cfa258cd42f7f106f6085f1e625f26283db: Merge tag 'drm-misc-next-2022-04-21' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2022-04-22 11:15:30 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2022-05-06 for you to fetch changes up to 949665a6e237a6fd49ff207e3876d71b20b7e9f2: drm/i915: Respect VBT seamless DRRS min refresh rate (2022-05-05 18:27:53 +0300) ---------------------------------------------------------------- drm/i915 feature pull #2 for v5.19: Features and functionality: - Add first set of DG2 PCI IDs for "motherboard down" designs (Matt Roper) - Add initial RPL-P PCI IDs as ADL-P subplatform (Matt Atwood) Refactoring and cleanups: - Power well refactoring and cleanup (Imre) - GVT-g refactor and mdev API cleanup (Christoph, Jason, Zhi) - DPLL refactoring and cleanup (Ville) - VBT panel specific data parsing cleanup (Ville) - Use drm_mode_init() for on-stack modes (Ville) Fixes: - Fix PSR state pipe A/B confusion by clearing more state on disable (José) - Fix FIFO underruns caused by not taking DRAM channel into account (Vinod) - Fix FBC flicker on display 11+ by enabling a workaround (José) - Fix VBT seamless DRRS min refresh rate check (Ville) - Fix panel type assumption on bogus VBT data (Ville) - Fix panel data parsing for VBT that misses panel data pointers block (Ville) - Fix spurious AUX timeout/hotplug handling on LTTPR links (Imre) Merges: - Backmerge drm-next (Jani) - GVT changes (Jani) ---------------------------------------------------------------- Christoph Hellwig (27): drm/i915/gvt: remove module refcounting in intel_gvt_{,un}register_hypervisor drm/i915/gvt: remove enum hypervisor_type drm/i915/gvt: rename intel_vgpu_ops to intel_vgpu_mdev_ops drm/i915/gvt: move the gvt code into kvmgt.ko drm/i915/gvt: remove intel_gvt_ops drm/i915/gvt: remove the map_gfn_to_mfn and set_trap_area ops drm/i915/gvt: remove the unused from_virt_to_mfn op drm/i915/gvt: merge struct kvmgt_vdev into struct intel_vgpu drm/i915/gvt: merge struct kvmgt_guest_info into strut intel_vgpu drm/i915/gvt: remove vgpu->handle drm/i915/gvt: devirtualize ->{read,write}_gpa drm/i915/gvt: devirtualize ->{get,put}_vfio_device drm/i915/gvt: devirtualize ->set_edid and ->set_opregion drm/i915/gvt: devirtualize ->detach_vgpu drm/i915/gvt: devirtualize ->inject_msi drm/i915/gvt: devirtualize ->is_valid_gfn drm/i915/gvt: devirtualize ->gfn_to_mfn drm/i915/gvt: devirtualize ->{enable,disable}_page_track drm/i915/gvt: devirtualize ->dma_{,un}map_guest_page drm/i915/gvt: devirtualize dma_pin_guest_page drm/i915/gvt: remove struct intel_gvt_mpt drm/i915/gvt: remove the extra vfio_device refcounting for dmabufs drm/i915/gvt: streamline intel_vgpu_create drm/i915/gvt: pass a struct intel_vgpu to the vfio read/write helpers drm/i915/gvt: remove kvmgt_guest_{init,exit} drm/i915/gvt: convert to use vfio_register_emulated_iommu_dev drm/i915/gvt: merge gvt.c into kvmgvt.c Hans de Goede (1): drm/i915: Fix DISP_POS_Y and DISP_HEIGHT defines Imre Deak (21): drm/i915: Move per-platform power well hooks to intel_display_power_well.c drm/i915: Unexport the for_each_power_well() macros drm/i915: Move the power domain->well mappings to intel_display_power_map.c drm/i915: Move the dg2 fixed_enable_delay power well param to a common bitfield drm/i915: Move the HSW power well flags to a common bitfield drm/i915: Rename the power domain names to end with pipes/ports drm/i915: Sanitize the power well names drm/i915: Convert the power well descriptor domain mask to an array of domains drm/i915: Convert the u64 power well domains mask to a bitmap drm/i915: Simplify power well definitions by adding power well instances drm/i915: Allow platforms to share power well descriptors drm/i915: Simplify the DG1 power well descriptors drm/i915: Sanitize the ADL-S power well definition drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platform drm/i915: Remove the aliasing of power domain enum values drm/i915: Remove the ICL specific TBT power domains drm/i915: Remove duplicate DDI/AUX power domain mappings drm/i915: Remove the XELPD specific AUX and DDI power domains drm/i915: Fixup merge of the power well refactor patchset drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses drm/i915/dp: Add workaround for spurious AUX timeouts/hotplugs on LTTPR links Jani Nikula (8): drm/i915/gvt: fix trace TRACE_INCLUDE_PATH drm/i915/gvt: better align the Makefile with i915 Makefile Merge tag 'gvt-next-2022-04-21-for-christoph' of https://github.com/intel/gvt-linux into drm-intel-next Merge tag 'gvt-next-2022-04-26' of https://github.com/intel/gvt-linux into drm-intel-next Merge drm/drm-next into drm-intel-next Merge tag 'gvt-next-2022-04-29' of https://github.com/intel/gvt-linux into drm-intel-next drm/i915: move tons of power well initializers to rodata drm/i915: warn about missing ->get_buf_trans initialization Jason Gunthorpe (5): vfio/mdev: Remove vfio_mdev.c vfio/mdev: Remove mdev_parent_ops dev_attr_groups vfio/mdev: Remove mdev_parent_ops vfio/mdev: Use the driver core to create the 'remove' file vfio/mdev: Remove mdev drvdata José Roberto de Souza (3): drm/i915/display/psr: Unset enable_psr2_sel_fetch if other checks in intel_psr2_config_valid() fails drm/i915/display/psr: Clear more PSR state during disable drm/i915/display: Add workaround 22014263786 Jouni Högander (1): drm/i915: Check EDID for HDR static metadata when choosing blc Matt Atwood (1): drm/i915/rpl-p: Add PCI IDs Matt Roper (1): drm/i915: Add first set of DG2 PCI IDs Ville Syrjälä (22): drm/i915: Program i830 DPLL FP register later drm/i915/fbc: Consult hw.crtc instead of uapi.crtc drm/i915/fbc: s/false/0/ drm/i915: Make .get_dplls() return int drm/i915: Pass dev_priv to intel_shared_dpll_init() drm/i915: Remove pointless dpll_funcs checks drm/i915: Adjust .crtc_compute_clock() calling convention drm/i915: Move stuff into intel_dpll_crtc_compute_clock() drm/i915: Move the dpll_hw_state clearing to intel_dpll_crtc_compute_clock() drm/i915: Clear the dpll_hw_state when disabling a pipe drm/i915: Split out dg2_crtc_compute_clock() drm/i915: Add crtc .crtc_get_shared_dpll() drm/i915: Use drm_mode_init() for on-stack modes drm/i915/bios: Reorder panel DTD parsing drm/i915/bios: Generate LFP data table pointers if the VBT lacks them drm/i915/bios: Get access to the tail end of the LFP data block drm/i915/bios: Document the mess around the LFP data tables drm/i915/bios: Assume panel_type==0 if the VBT has bogus data drm/i915/bios: Extract get_panel_type() drm/i915/bios: Refactor panel_type code drm/i915/bios: Parse the seamless DRRS min refresh rate drm/i915: Respect VBT seamless DRRS min refresh rate Vinod Govindapillai (1): drm/i915: program wm blocks to at least blocks required per line Wan Jiabing (1): i915/gvt: Fix NULL pointer dereference in init_mmio_block_handlers Zhi Wang (6): i915/gvt: Separate the MMIO tracking table from GVT-g i915/gvt: Save the initial HW state snapshot in i915 i915/gvt: Use the initial HW state snapshot saved in i915 drm/i915/gvt: Add missing symbol export. drm/i915/gvt: Make intel_gvt_match_device() static drm/i915/gvt: Fix the compiling error when CONFIG_DRM_I915_DEBUG_RUNTIME_PM=n Documentation/driver-api/vfio-mediated-device.rst | 27 +- arch/x86/kernel/early-quirks.c | 1 + drivers/gpu/drm/i915/Kconfig | 36 +- drivers/gpu/drm/i915/Makefile | 9 +- drivers/gpu/drm/i915/display/g4x_dp.c | 3 +- drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +- drivers/gpu/drm/i915/display/icl_dsi.c | 8 +- drivers/gpu/drm/i915/display/intel_bios.c | 345 +- drivers/gpu/drm/i915/display/intel_ddi.c | 6 +- drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 4 +- drivers/gpu/drm/i915/display/intel_display.c | 176 +- drivers/gpu/drm/i915/display/intel_display.h | 4 +- drivers/gpu/drm/i915/display/intel_display_power.c | 5283 +++----------------- drivers/gpu/drm/i915/display/intel_display_power.h | 126 +- .../gpu/drm/i915/display/intel_display_power_map.c | 1501 ++++++ .../gpu/drm/i915/display/intel_display_power_map.h | 14 + .../drm/i915/display/intel_display_power_well.c | 1813 ++++++- .../drm/i915/display/intel_display_power_well.h | 132 +- .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 34 +- .../gpu/drm/i915/display/intel_dp_link_training.c | 33 +- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 1 + drivers/gpu/drm/i915/display/intel_dpll.c | 196 +- drivers/gpu/drm/i915/display/intel_dpll.h | 6 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 268 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 9 +- drivers/gpu/drm/i915/display/intel_fbc.c | 19 +- drivers/gpu/drm/i915/display/intel_panel.c | 10 +- drivers/gpu/drm/i915/display/intel_pps.c | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 41 +- drivers/gpu/drm/i915/display/intel_tc.c | 5 +- drivers/gpu/drm/i915/display/intel_vbt_defs.h | 24 +- drivers/gpu/drm/i915/gvt/Makefile | 30 +- drivers/gpu/drm/i915/gvt/cfg_space.c | 89 +- drivers/gpu/drm/i915/gvt/cmd_parser.c | 4 +- drivers/gpu/drm/i915/gvt/dmabuf.c | 36 +- drivers/gpu/drm/i915/gvt/execlist.c | 12 +- drivers/gpu/drm/i915/gvt/firmware.c | 25 +- drivers/gpu/drm/i915/gvt/gtt.c | 55 +- drivers/gpu/drm/i915/gvt/gvt.c | 340 -- drivers/gpu/drm/i915/gvt/gvt.h | 128 +- drivers/gpu/drm/i915/gvt/handlers.c | 1035 +--- drivers/gpu/drm/i915/gvt/hypercall.h | 82 - drivers/gpu/drm/i915/gvt/interrupt.c | 40 +- drivers/gpu/drm/i915/gvt/kvmgt.c | 1097 ++-- drivers/gpu/drm/i915/gvt/mmio.c | 4 +- drivers/gpu/drm/i915/gvt/mmio.h | 1 - drivers/gpu/drm/i915/gvt/mpt.h | 400 -- drivers/gpu/drm/i915/gvt/opregion.c | 148 +- drivers/gpu/drm/i915/gvt/page_track.c | 8 +- drivers/gpu/drm/i915/gvt/reg.h | 9 +- drivers/gpu/drm/i915/gvt/scheduler.c | 37 +- drivers/gpu/drm/i915/gvt/trace.h | 2 +- drivers/gpu/drm/i915/gvt/vgpu.c | 22 +- drivers/gpu/drm/i915/i915_driver.c | 7 - drivers/gpu/drm/i915/i915_drv.h | 8 +- drivers/gpu/drm/i915/i915_pci.c | 3 +- drivers/gpu/drm/i915/i915_reg.h | 7 +- drivers/gpu/drm/i915/intel_device_info.c | 30 +- drivers/gpu/drm/i915/intel_device_info.h | 11 +- drivers/gpu/drm/i915/intel_gvt.c | 252 +- drivers/gpu/drm/i915/intel_gvt.h | 32 +- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1292 +++++ drivers/gpu/drm/i915/intel_pm.c | 19 + drivers/s390/cio/vfio_ccw_ops.c | 7 +- drivers/s390/crypto/vfio_ap_ops.c | 9 +- drivers/vfio/mdev/Makefile | 2 +- drivers/vfio/mdev/mdev_core.c | 52 +- drivers/vfio/mdev/mdev_driver.c | 10 - drivers/vfio/mdev/mdev_private.h | 6 +- drivers/vfio/mdev/mdev_sysfs.c | 37 +- drivers/vfio/mdev/vfio_mdev.c | 152 - include/drm/i915_pciids.h | 31 + include/linux/mdev.h | 82 +- samples/vfio-mdev/mbochs.c | 9 +- samples/vfio-mdev/mdpy.c | 9 +- samples/vfio-mdev/mtty.c | 39 +- 76 files changed, 7587 insertions(+), 8261 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_display_power_map.c create mode 100644 drivers/gpu/drm/i915/display/intel_display_power_map.h delete mode 100644 drivers/gpu/drm/i915/gvt/gvt.c delete mode 100644 drivers/gpu/drm/i915/gvt/hypercall.h delete mode 100644 drivers/gpu/drm/i915/gvt/mpt.h create mode 100644 drivers/gpu/drm/i915/intel_gvt_mmio_table.c delete mode 100644 drivers/vfio/mdev/vfio_mdev.c -- Jani Nikula, Intel Open Source Graphics Center

1 0

[PATCH v10, 00/15] media: mtk-vcodec: support for M8192 decoder
by Yunfei Dong 06 May '22

06 May '22

This series adds support for mt8192 h264/vp8/vp9 decoder drivers. Firstly, refactor power/clock/interrupt interfaces for mt8192 is lat and core architecture. Secondly, add new functions to get frame buffer size and resolution according to decoder capability from scp side. Then add callback function to get/put capture buffer in order to enable lat and core decoder in parallel, need to adjust GStreamer at the same time. Then add to support MT21C compressed mode and fix v4l2-compliance fail. Next, extract H264 request api driver to let mt8183 and mt8192 use the same code, and adds mt8192 frame based h264 driver for stateless decoder. Lastly, add vp8 and vp9 stateless decoder drivers. Patches 1 refactor power/clock/interrupt interface. Patches 2~4 get frame buffer size and resolution according to decoder capability. Patches 5 set capture queue bytesused. Patches 6 adjust GStreamer. Patch 7~11 add to support MT21C compressed mode and fix v4l2-compliance fail. patch 12 record capture queue format type. Patch 13~14 extract h264 driver and add mt8192 frame based driver for h264 decoder. Patch 15~16 add vp8 and vp9 stateless decoder drivers. Patch 17 prevent kernel crash when rmmod mtk-vcodec-dec.ko --- changes compared with v9: - fix kernel robot build fail for patch 16 changes compared with v8: - fix vp9 build error - fix kernel-doc fail changes compared with v7: - adjust GStreamer, separate src buffer done with v4l2_ctrl_request_complete for patch 6. - remove v4l2_m2m_set_dst_buffered. - add new patch to set each plane bytesused in buf prepare for patch 5. - using upstream interface to update vp9 prob tables for patch 16. - fix maintainer comments. - test the driver with chrome VD and GStreamer(H264/VP9/VP8/AV1). changes compared with v6: - rebase to the latest media stage and fix conficts - fix memcpy to memcpy_fromio or memcpy_toio - fix h264 crash when test field bitstream changes compared with v5: - fix vp9 comments for patch 15 - fix vp8 comments for patch 14. - fix comments for patch 12. - fix build errors. changes compared with v4: - fix checkpatch.pl fail. - fix kernel-doc fail. - rebase to the latest media codec driver. changes compared with v3: - remove enum mtk_chip for patch 2. - add vp8 stateless decoder drivers for patch 14. - add vp9 stateless decoder drivers for patch 15. changes compared with v2: - add new patch 11 to record capture queue format type. - separate patch 4 according to tzung-bi's suggestion. - re-write commit message for patch 5 according to tzung-bi's suggestion. changes compared with v1: - rewrite commit message for patch 12. - rewrite cover-letter message. --- Yunfei Dong (17): media: mediatek: vcodec: Add vdec enable/disable hardware helpers media: mediatek: vcodec: Using firmware type to separate different firmware architecture media: mediatek: vcodec: get capture queue buffer size from scp media: mediatek: vcodec: Read max resolution from dec_capability media: mediatek: vcodec: set each plane bytesused in buf prepare media: mediatek: vcodec: Refactor get and put capture buffer flow media: mediatek: vcodec: Refactor supported vdec formats and framesizes media: mediatek: vcodec: Getting supported decoder format types media: mediatek: vcodec: Add format to support MT21C media: mediatek: vcodec: disable vp8 4K capability media: mediatek: vcodec: Fix v4l2-compliance fail media: mediatek: vcodec: record capture queue format type media: mediatek: vcodec: Extract H264 common code media: mediatek: vcodec: support stateless H.264 decoding for mt8192 media: mediatek: vcodec: support stateless VP8 decoding media: mediatek: vcodec: support stateless VP9 decoding media: mediatek: vcodec: prevent kernel crash when rmmod mtk-vcodec-dec.ko .../media/platform/mediatek/vcodec/Makefile | 4 + .../platform/mediatek/vcodec/mtk_vcodec_dec.c | 62 +- .../mediatek/vcodec/mtk_vcodec_dec_drv.c | 8 +- .../mediatek/vcodec/mtk_vcodec_dec_pm.c | 166 +- .../mediatek/vcodec/mtk_vcodec_dec_pm.h | 6 +- .../mediatek/vcodec/mtk_vcodec_dec_stateful.c | 19 +- .../vcodec/mtk_vcodec_dec_stateless.c | 257 ++- .../platform/mediatek/vcodec/mtk_vcodec_drv.h | 41 +- .../mediatek/vcodec/mtk_vcodec_enc_drv.c | 5 - .../platform/mediatek/vcodec/mtk_vcodec_fw.c | 6 + .../platform/mediatek/vcodec/mtk_vcodec_fw.h | 1 + .../vcodec/vdec/vdec_h264_req_common.c | 310 +++ .../vcodec/vdec/vdec_h264_req_common.h | 274 +++ .../mediatek/vcodec/vdec/vdec_h264_req_if.c | 438 +--- .../vcodec/vdec/vdec_h264_req_multi_if.c | 626 +++++ .../mediatek/vcodec/vdec/vdec_vp8_req_if.c | 437 ++++ .../vcodec/vdec/vdec_vp9_req_lat_if.c | 2031 +++++++++++++++++ .../platform/mediatek/vcodec/vdec_drv_if.c | 37 +- .../platform/mediatek/vcodec/vdec_drv_if.h | 3 + .../platform/mediatek/vcodec/vdec_ipi_msg.h | 36 + .../platform/mediatek/vcodec/vdec_msg_queue.c | 2 + .../platform/mediatek/vcodec/vdec_msg_queue.h | 2 + .../platform/mediatek/vcodec/vdec_vpu_if.c | 53 +- .../platform/mediatek/vcodec/vdec_vpu_if.h | 15 + .../platform/mediatek/vcodec/venc_vpu_if.c | 2 +- include/linux/remoteproc/mtk_scp.h | 2 + 26 files changed, 4242 insertions(+), 601 deletions(-) create mode 100644 drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_common.c create mode 100644 drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_common.h create mode 100644 drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_multi_if.c create mode 100644 drivers/media/platform/mediatek/vcodec/vdec/vdec_vp8_req_if.c create mode 100644 drivers/media/platform/mediatek/vcodec/vdec/vdec_vp9_req_lat_if.c -- 2.18.0

4 21

[PATCH resend v8 0/5] phy: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support
by Liu Ying 06 May '22

06 May '22

Hi, This is the v8 series to add i.MX8qxp LVDS PHY mode support for the Mixel PHY in the Freescale i.MX8qxp SoC. The Mixel PHY is MIPI DPHY + LVDS PHY combo, which can works in either MIPI DPHY mode or LVDS PHY mode. The PHY mode is controlled by i.MX8qxp SCU firmware. The PHY driver would call a SCU function to configure the mode. The PHY driver is already supporting the Mixel MIPI DPHY in i.MX8mq SoC, where it appears to be a single MIPI DPHY. Patch 1/5 sets PHY mode in the Northwest Logic MIPI DSI host controller bridge driver, since i.MX8qxp SoC embeds this controller IP to support MIPI DSI displays together with the Mixel PHY. Patch 2/5 allows LVDS PHYs to be configured through the generic PHY functions and through a custom structure added to the generic PHY configuration union. Patch 3/5 converts mixel,mipi-dsi-phy plain text dt binding to json-schema. Patch 4/5 adds dt binding support for the Mixel combo PHY in i.MX8qxp SoC. Patch 5/5 adds the i.MX8qxp LVDS PHY mode support in the Mixel PHY driver. Welcome comments, thanks. v7->v8: * Trivial kernel doc style fix for patch 2/5 - add '*'. * Resend with reviewer mail addresses updated for patch 1/5. v6->v7: * Update the year of copyright for patch 2/5. * Better variable explanation for bits_per_lane_and_dclk_cycle in patch 2/5. * Use marco instead of magic number for CCM and CA values for patch 5/5. * Suppress 'checkpatch --strict' warnings for patch 5/5. v5->v6: * Rebase the series upon v5.17-rc1. * Set PHY mode in ->mode_set() instead of ->pre_enable() in the nwl-dsi bridge driver in patch 1/5 due to the rebase. * Drop Guido's R-b tag on patch 1/5 due to the rebase. v4->v5: * Align kernel-doc style of include/linux/phy/phy-lvds.h to include/linux/phy/phy.h for patch 2/5. (Vinod) * Trivial tweaks on patch 2/5. * Drop Robert's R-b tag on patch 2/5. v3->v4: * Add all R-b tags received from v3 on relevant patches and respin. (Robert) v2->v3: * Improve readability of mixel_dphy_set_mode() in the Mixel PHY driver. (Guido) * Improve the 'clock-names' property in the PHY dt binding. v1->v2: * Convert mixel,mipi-dsi-phy plain text dt binding to json-schema. (Guido) * Print invalid PHY mode in dmesg from the Mixel PHY driver. (Guido) * Add Guido's R-b tag on the patch for the nwl-dsi drm bridge driver. Liu Ying (5): drm/bridge: nwl-dsi: Set PHY mode in nwl_dsi_mode_set() phy: Add LVDS configuration options dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema dt-bindings: phy: mixel: mipi-dsi-phy: Add Mixel combo PHY support for i.MX8qxp phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 -- .../bindings/phy/mixel,mipi-dsi-phy.yaml | 107 +++++++ drivers/gpu/drm/bridge/nwl-dsi.c | 6 + .../phy/freescale/phy-fsl-imx8-mipi-dphy.c | 276 +++++++++++++++++- include/linux/phy/phy-lvds.h | 32 ++ include/linux/phy/phy.h | 4 + 6 files changed, 414 insertions(+), 40 deletions(-) delete mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml create mode 100644 include/linux/phy/phy-lvds.h -- 2.25.1

4 11

[PATCH -next] drm/i915/gt: Fix build error without CONFIG_PM
by YueHaibing 06 May '22

06 May '22

drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c: In function ‘act_freq_mhz_show’: drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c:276:20: error: implicit declaration of function ‘sysfs_gt_attribute_r_max_func’ [-Werror=implicit-function-declaration] 276 | u32 actual_freq = sysfs_gt_attribute_r_max_func(dev, attr, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Move sysfs_gt_attribute_* macros out of #ifdef block to fix this. Fixes: 56a709cf7746 ("drm/i915/gt: Create per-tile RPS sysfs interfaces") Signed-off-by: YueHaibing <yuehaibing(a)huawei.com> --- drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c index 26cbfa6477d1..e92990d514b2 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c @@ -17,7 +17,6 @@ #include "intel_rc6.h" #include "intel_rps.h" -#ifdef CONFIG_PM enum intel_gt_sysfs_op { INTEL_GT_SYSFS_MIN = 0, INTEL_GT_SYSFS_MAX, @@ -92,6 +91,7 @@ sysfs_gt_attribute_r_func(struct device *dev, struct device_attribute *attr, #define sysfs_gt_attribute_r_max_func(d, a, f) \ sysfs_gt_attribute_r_func(d, a, f, INTEL_GT_SYSFS_MAX) +#ifdef CONFIG_PM static u32 get_residency(struct intel_gt *gt, i915_reg_t reg) { intel_wakeref_t wakeref; -- 2.17.1

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dri-devel May 2022