Re: [PATCH 2/6] dt-bindings: display: add Amlogic MIPI DSI Host Controller bindings

On Mon, Sep 07, 2020 at 10:18:21AM +0200, Neil Armstrong wrote:

The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a), with a custom glue managing the IP resets, clock and data input similar to the DW-HDMI Glue on other Amlogic SoCs.

Signed-off-by: Neil Armstrong narmstrong@baylibre.com

.../display/amlogic,meson-dw-mipi-dsi.yaml | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml

diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml new file mode 100644 index 000000000000..6177f45ea1a6 --- /dev/null +++ b/Documentation/devicetree/bindings/display/amlogic,meson-dw-mipi-dsi.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/amlogic,meson-dw-mipi-dsi.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#"

+title: Amlogic specific extensions to the Synopsys Designware MIPI DSI Host Controller

+maintainers:

• • Neil Armstrong narmstrong@baylibre.com

+description: |

• The Amlogic Meson Synopsys Designware Integration is composed of
• • A Synopsys DesignWare MIPI DSI Host Controller IP
• • A TOP control block controlling the Clocks & Resets of the IP

+allOf:

• • $ref: dsi-controller.yaml#

+properties:

• compatible:
• enum:

•  - amlogic,meson-axg-dw-mipi-dsi
  

• reg:
• maxItems: 1
• clocks:
• minItems: 2
• clock-names:
• minItems: 2
• items:

•  - const: pclk
  

•  - const: px_clk
  

•  - const: meas_clk
  

• resets:
• minItems: 1
• reset-names:
• items:

•  - const: top
  

• phys:
• minItems: 1
• phy-names:
• items:

•  - const: dphy
  

• ports:
• type: object
• properties:

•  port@0:
  

•    type: object
  

•    description: Input node to receive pixel data.
  

•  port@1:
  

•    type: object
  

•    description: DSI output node to panel.
  

• required:

•  - port@0
  

•  - port@1
  

+required:

• • compatible
• • reg
• • clocks
• • clock-names
• • resets
• • reset-names
• • phys
• • phy-names
• • ports

+additionalProperties: false

Presumably you may have panel/bridge child nodes, so this needs to be 'unevaluatedProperties: false'.

Rob