On 13.06.2018 15:08, Maciej Purski wrote:
Hi Andrzej,
On 06/08/2018 08:04 AM, Andrzej Hajda wrote:
There is no need to flip reset pin twice. Also delays can be changed to values present in vendor's code.
Signed-off-by: Andrzej Hajda a.hajda@samsung.com
Reviewed-by: Maciej Purski m.purski@samsung.com
Finally, thanks for the review. Merged to drm-misc-fixes this and other dependand fixes:
drm/bridge/sii8620: simplify hardware reset procedure drm/bridge/sii8620: fix loops in EDID fetch logic drm/bridge/sii8620: fix display modes validation drm/bridge/sii8620: fix potential buffer overflow drm/bridge/sii8620: start MHL transmission after HDMI signal detection drm/bridge/sii8620: remove HSIC initialization drm/bridge/sii8620: fix HDMI cable connection to dongle
Regards Andrzej
Hi,
This is v2 of forgotten patch, awaiting reviewers, any volunteers. Also "drm/bridge/sii8620: fix loops in EDID fetch logic" waits for reviewers.
In this version I have completely removed reset function, and moved its body to sii8620_hw_on.
Regards Andrzej
drivers/gpu/drm/bridge/sil-sii8620.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c index 7ab36042a822..d1e780fba4b6 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.c +++ b/drivers/gpu/drm/bridge/sil-sii8620.c @@ -971,8 +971,17 @@ static int sii8620_hw_on(struct sii8620 *ctx) ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); if (ret) return ret;
- usleep_range(10000, 20000);
- return clk_prepare_enable(ctx->clk_xtal);
ret = clk_prepare_enable(ctx->clk_xtal);
if (ret)
return ret;msleep(100);
gpiod_set_value(ctx->gpio_reset, 0);
msleep(100);
return 0; }
static int sii8620_hw_off(struct sii8620 *ctx)
@@ -982,17 +991,6 @@ static int sii8620_hw_off(struct sii8620 *ctx) return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); }
-static void sii8620_hw_reset(struct sii8620 *ctx) -{
- usleep_range(10000, 20000);
- gpiod_set_value(ctx->gpio_reset, 0);
- usleep_range(5000, 20000);
- gpiod_set_value(ctx->gpio_reset, 1);
- usleep_range(10000, 20000);
- gpiod_set_value(ctx->gpio_reset, 0);
- msleep(300);
-}
- static void sii8620_cbus_reset(struct sii8620 *ctx) { sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
@@ -2112,7 +2110,6 @@ static void sii8620_cable_in(struct sii8620 *ctx) dev_err(dev, "Error powering on, %d.\n", ret); return; }
sii8620_hw_reset(ctx);
sii8620_read_buf(ctx, REG_VND_IDL, ver, ARRAY_SIZE(ver)); ret = sii8620_clear_error(ctx);