Looks good to me. Thanks!
Reviewed-by: Sinclair Yeh syeh@vmware.com
On Fri, Jun 03, 2016 at 05:47:13PM +0200, Thierry Reding wrote:
From: Thierry Reding treding@nvidia.com
While the current code is correct and the compiler's DCE pass should remove either of the branches depending on the width of DMA addresses, the compiler still has to compile the code first.
On configurations with 32-bit DMA addresses, right-shifting the address by 32 causes GCC to output a build warning. Work around this by using a preprocessor conditional instead.
Signed-off-by: Thierry Reding treding@nvidia.com
drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c index 67cebb23c940..577faca0fe9d 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c @@ -291,12 +291,12 @@ void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header) static int vmw_cmdbuf_header_submit(struct vmw_cmdbuf_header *header) { struct vmw_cmdbuf_man *man = header->man;
- u32 val;
+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
- u32 val = header->handle >> 32;
+#else
- u32 val = 0;
+#endif
if (sizeof(header->handle) > 4)
val = (header->handle >> 32);else
val = 0;vmw_write(man->dev_priv, SVGA_REG_COMMAND_HIGH, val);
val = (header->handle & 0xFFFFFFFFULL);
-- 2.8.3