In preparation of adding DRM bridge support to the hdmi5 encoder code, rework the EDID read to isolate data read.
Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com --- drivers/gpu/drm/omapdrm/dss/hdmi5.c | 89 ++++++++++++++---------- drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 48 +++---------- drivers/gpu/drm/omapdrm/dss/hdmi5_core.h | 5 +- 3 files changed, 65 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5.c b/drivers/gpu/drm/omapdrm/dss/hdmi5.c index 60d146ac8fd0..2dfcacdc072e 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c @@ -282,30 +282,6 @@ static int hdmi_dump_regs(struct seq_file *s, void *p) return 0; }
-static int read_edid(struct omap_hdmi *hdmi, u8 *buf, int len) -{ - int r; - int idlemode; - - mutex_lock(&hdmi->lock); - - r = hdmi_runtime_get(hdmi); - BUG_ON(r); - - idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); - /* No-idle mode */ - REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); - - r = hdmi5_read_edid(&hdmi->core, buf, len); - - REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); - - hdmi_runtime_put(hdmi); - mutex_unlock(&hdmi->lock); - - return r; -} - static void hdmi_start_audio_stream(struct omap_hdmi *hd) { REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); @@ -421,32 +397,73 @@ static void hdmi_disconnect(struct omap_dss_device *src, omapdss_device_disconnect(dst, dst->next); }
-static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev) +static struct edid *hdmi_read_edid_data(struct hdmi_core_data *core) { - struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); - bool need_enable; + int max_ext_blocks = 3; + int r, n, i; u8 *edid; - int r;
edid = kzalloc(512, GFP_KERNEL); if (!edid) return NULL;
+ r = hdmi5_core_ddc_read(core, edid, 0, EDID_LENGTH); + if (r) + goto error; + + n = edid[0x7e]; + + if (n > max_ext_blocks) + n = max_ext_blocks; + + for (i = 1; i <= n; i++) { + r = hdmi5_core_ddc_read(core, edid + i * EDID_LENGTH, i, + EDID_LENGTH); + if (r) + goto error; + } + + return (struct edid *)edid; + +error: + kfree(edid); + return NULL; +} + +static struct edid *hdmi_read_edid(struct omap_dss_device *dssdev) +{ + struct omap_hdmi *hdmi = dssdev_to_hdmi(dssdev); + struct edid *edid; + bool need_enable; + int idlemode; + int r; + need_enable = hdmi->core_enabled == false;
if (need_enable) { r = hdmi_core_enable(hdmi); - if (r) { - kfree(edid); + if (r) return NULL; - } }
- r = read_edid(hdmi, edid, 512); - if (r < 0) { - kfree(edid); - edid = NULL; - } + mutex_lock(&hdmi->lock); + r = hdmi_runtime_get(hdmi); + BUG_ON(r); + + idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2); + /* No-idle mode */ + REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2); + + hdmi5_core_ddc_init(&hdmi->core); + + edid = hdmi_read_edid_data(&hdmi->core); + + hdmi5_core_ddc_uninit(&hdmi->core); + + REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2); + + hdmi_runtime_put(hdmi); + mutex_unlock(&hdmi->lock);
if (need_enable) hdmi_core_disable(hdmi); diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c index 02efabc7ed76..00782654ac86 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c @@ -46,7 +46,7 @@ static const struct csc_table csc_table_deepcolor[] = { [3] = { 8192, 0, 0, 0, 0, 8192, 0, 0, 0, 0, 8192, 0, }, };
-static void hdmi_core_ddc_init(struct hdmi_core_data *core) +void hdmi5_core_ddc_init(struct hdmi_core_data *core) { void __iomem *base = core->base; const unsigned long long iclk = 266000000; /* DSS L3 ICLK */ @@ -125,7 +125,7 @@ static void hdmi_core_ddc_init(struct hdmi_core_data *core) REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x0, 2, 2); }
-static void hdmi_core_ddc_uninit(struct hdmi_core_data *core) +void hdmi5_core_ddc_uninit(struct hdmi_core_data *core) { void __iomem *base = core->base;
@@ -135,14 +135,14 @@ static void hdmi_core_ddc_uninit(struct hdmi_core_data *core) REG_FLD_MOD(base, HDMI_CORE_I2CM_INT, 0x1, 2, 2); }
-static int hdmi_core_ddc_edid(struct hdmi_core_data *core, u8 *pedid, u8 ext) +int hdmi5_core_ddc_read(void *data, u8 *buf, unsigned int block, size_t len) { + struct hdmi_core_data *core = data; void __iomem *base = core->base; u8 cur_addr; - char checksum = 0; const int retries = 1000; - u8 seg_ptr = ext / 2; - u8 edidbase = ((ext % 2) * 0x80); + u8 seg_ptr = block / 2; + u8 edidbase = ((block % 2) * EDID_LENGTH);
REG_FLD_MOD(base, HDMI_CORE_I2CM_SEGPTR, seg_ptr, 7, 0);
@@ -150,7 +150,7 @@ static int hdmi_core_ddc_edid(struct hdmi_core_data *core, u8 *pedid, u8 ext) * TODO: We use polling here, although we probably should use proper * interrupts. */ - for (cur_addr = 0; cur_addr < 128; ++cur_addr) { + for (cur_addr = 0; cur_addr < len; ++cur_addr) { int i;
/* clear ERROR and DONE */ @@ -187,45 +187,13 @@ static int hdmi_core_ddc_edid(struct hdmi_core_data *core, u8 *pedid, u8 ext) return -EIO; }
- pedid[cur_addr] = REG_GET(base, HDMI_CORE_I2CM_DATAI, 7, 0); - checksum += pedid[cur_addr]; + buf[cur_addr] = REG_GET(base, HDMI_CORE_I2CM_DATAI, 7, 0); }
return 0;
}
-int hdmi5_read_edid(struct hdmi_core_data *core, u8 *edid, int len) -{ - int r, n, i; - int max_ext_blocks = (len / 128) - 1; - - if (len < 128) - return -EINVAL; - - hdmi_core_ddc_init(core); - - r = hdmi_core_ddc_edid(core, edid, 0); - if (r) - goto out; - - n = edid[0x7e]; - - if (n > max_ext_blocks) - n = max_ext_blocks; - - for (i = 1; i <= n; i++) { - r = hdmi_core_ddc_edid(core, edid + i * EDID_LENGTH, i); - if (r) - goto out; - } - -out: - hdmi_core_ddc_uninit(core); - - return r ? r : len; -} - void hdmi5_core_dump(struct hdmi_core_data *core, struct seq_file *s) {
diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.h b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.h index f2f1022c5516..41bcc4a98ac5 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.h +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.h @@ -292,7 +292,10 @@ struct csc_table { u16 c1, c2, c3, c4; };
-int hdmi5_read_edid(struct hdmi_core_data *core, u8 *edid, int len); +void hdmi5_core_ddc_init(struct hdmi_core_data *core); +int hdmi5_core_ddc_read(void *data, u8 *buf, unsigned int block, size_t len); +void hdmi5_core_ddc_uninit(struct hdmi_core_data *core); + void hdmi5_core_dump(struct hdmi_core_data *core, struct seq_file *s); int hdmi5_core_handle_irqs(struct hdmi_core_data *core); void hdmi5_configure(struct hdmi_core_data *core, struct hdmi_wp_data *wp,