On Tue, Oct 13, 2020 at 12:24:38AM +0000, Chrisanthus, Anitha wrote:
Hi Neil,
Thanks for your review, please see my reply inline.
-----Original Message----- From: Neil Armstrong narmstrong@baylibre.com Sent: Friday, October 9, 2020 2:10 AM To: Chrisanthus, Anitha anitha.chrisanthus@intel.com; dri- devel@lists.freedesktop.org; devicetree@vger.kernel.org; Vetter, Daniel daniel.vetter@intel.com Cc: Dea, Edmund J edmund.j.dea@intel.com; sam@ravnborg.org Subject: Re: [PATCH v9 1/5] dt-bindings: display: Add support for Intel KeemBay Display
Hi,
On 09/10/2020 03:03, Anitha Chrisanthus wrote:
This patch adds bindings for Intel KeemBay Display
v2: review changes from Rob Herring
Signed-off-by: Anitha Chrisanthus anitha.chrisanthus@intel.com
.../bindings/display/intel,keembay-display.yaml | 99
++++++++++++++++++++++
1 file changed, 99 insertions(+) create mode 100644
Documentation/devicetree/bindings/display/intel,keembay-display.yaml
diff --git a/Documentation/devicetree/bindings/display/intel,keembay-
display.yaml b/Documentation/devicetree/bindings/display/intel,keembay- display.yaml
new file mode 100644 index 0000000..a38493d --- /dev/null +++ b/Documentation/devicetree/bindings/display/intel,keembay-
display.yaml
@@ -0,0 +1,99 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/intel,keembay-
display.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Devicetree bindings for Intel Keem Bay display controller
+maintainers:
- Anitha Chrisanthus anitha.chrisanthus@intel.com
- Edmond J Dea edmund.j.dea@intel.com
+properties:
- compatible:
- const: intel,kmb_display
- reg:
- items:
- description: Lcd registers range
- description: Mipi registers range
Looking at the registers, the MIPI transceiver seems to be a separate IP, same for D-PHY which should have a proper PHY driver instead of beeing handled here.
The LCD, MIPI DSI, DPHY and MSSCAM as a group, are considered the display subsystem for Keem Bay. As such, there are several interdependencies that make splitting them up next to impossible and
Please detail what those inter-dependencies are. It's doubtful that you have anything we have not had to deal with in other SoCs.
currently we do not have the resources available for that effort.
That is certainly not justification for accepting this.
Rob