Now that the priority must be set in the submitqueue we can check at create time that the requested priority is valid.
Signed-off-by: Jordan Crouse jcrouse@codeaurora.org --- drivers/gpu/drm/msm/msm_gem_submit.c | 8 +++++--- drivers/gpu/drm/msm/msm_submitqueue.c | 25 +++++++++++++++++++------ 2 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm_gem_submit.c index 47a9e87..5b9210b 100644 --- a/drivers/gpu/drm/msm/msm_gem_submit.c +++ b/drivers/gpu/drm/msm/msm_gem_submit.c @@ -421,7 +421,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, struct msm_gpu_submitqueue *queue; int out_fence_fd = -1; unsigned i; - int ret, ring; + int ret;
if (!gpu) return -ENXIO; @@ -439,6 +439,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data, if (!queue) return -ENOENT;
+ if (queue->prio >= gpu->nr_rings) + return -EINVAL; + if (args->flags & MSM_SUBMIT_FENCE_FD_IN) { in_fence = sync_file_get_fence(args->fence_fd);
@@ -545,8 +548,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
submit->nr_cmds = i;
- ring = clamp_t(uint32_t, queue->prio, 0, gpu->nr_rings - 1); - submit->ring = gpu->rb[ring]; + submit->ring = gpu->rb[queue->prio];
submit->fence = msm_fence_alloc(queue->fctx); if (IS_ERR(submit->fence)) { diff --git a/drivers/gpu/drm/msm/msm_submitqueue.c b/drivers/gpu/drm/msm/msm_submitqueue.c index f23b43e..da4bee8 100644 --- a/drivers/gpu/drm/msm/msm_submitqueue.c +++ b/drivers/gpu/drm/msm/msm_submitqueue.c @@ -64,6 +64,7 @@ void msm_submitqueue_close(struct msm_file_private *ctx) int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx, u32 prio, u32 flags, u32 *id) { + struct msm_drm_private *priv = drm->dev_private; struct msm_gpu_submitqueue *queue; char name[32]; int ret = 0; @@ -77,7 +78,13 @@ int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
kref_init(&queue->ref); queue->flags = flags; - queue->prio = prio; + + if (priv->gpu) { + if (prio >= priv->gpu->nr_rings) + return -EINVAL; + + queue->prio = prio; + }
write_lock(&ctx->queuelock);
@@ -114,18 +121,24 @@ int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx) { + struct msm_drm_private *priv = drm->dev_private; + int default_prio; + if (!ctx) return 0;
+ /* + * Select priority 2 as the "default priority" unless nr_rings is less + * than 2 and then pick the lowest pirority + */ + default_prio = priv->gpu ? + clamp_t(uint32_t, 2, 0, priv->gpu->nr_rings - 1) : 0; + INIT_LIST_HEAD(&ctx->submitqueues);
rwlock_init(&ctx->queuelock);
- /* - * Add the "default" submitqueue with id 0 - * "low" priority (2) and no flags - */ - return msm_submitqueue_create(drm, ctx, 2, 0, NULL); + return msm_submitqueue_create(drm, ctx, default_prio, 0, NULL); }
int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id)