MIPI DSI TX subsystem allows you to quickly create systems based on the MIPI protocol. It interfaces between the video processing subsystems and MIPI-based displays. An internal high-speed physical layer design, D-PHY, is provided to allow direct connection to display peripherals.
The subsystem consists of the following sub-blocks: - MIPI D-PHY - MIPI DSI TX Controller - AXI Crossbar
Please refer pg238 [1].
The DSI TX Controller receives stream of image data through an input stream interface. At design time, this subsystem can be configured to number of lanes and pixel format.
This patch series adds the dt-binding and DRM driver for Xilinx DSI-Tx soft IP.
References: [1]: https://www.xilinx.com/support/documentation/ip_documentation/mipi_dsi_tx_su...
Venkateshwar Rao Gannavarapu (2): dt-bindings: display: xlnx: Add DSI 2.0 Tx subsystem documentation drm: xlnx: dsi: driver for Xilinx DSI Tx subsystem
.../bindings/display/xlnx/xlnx,dsi-tx.yaml | 105 +++++ drivers/gpu/drm/xlnx/Kconfig | 14 + drivers/gpu/drm/xlnx/Makefile | 1 + drivers/gpu/drm/xlnx/xlnx_dsi.c | 456 +++++++++++++++++++++ 4 files changed, 576 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/xlnx/xlnx,dsi-tx.yaml create mode 100644 drivers/gpu/drm/xlnx/xlnx_dsi.c
-- 1.8.3.1