On 12/18/21 10:50 PM, Antonio Borneo wrote:
The dsi has several constraints on the video modes it can support, mainly due to the frequencies that can be generated by the PLL integrated in the DSI device.
Verify that the required HS clock can be generated by the PLL.
The dsi clock from the dsi PLL and the ltdc pixel clock are asynchronous. The dsi needs to return in LP mode during HFP or HBP to re-synchronize at each video line.
Verify that the duration of HFP and HBP allows the dsi to enter in LP mode.
Signed-off-by: Antonio Borneo antonio.borneo@foss.st.com
To: David Airlie airlied@linux.ie To: Daniel Vetter daniel@ffwll.ch To: Andrzej Hajda a.hajda@samsung.com To: Neil Armstrong narmstrong@baylibre.com To: Robert Foss robert.foss@linaro.org To: Laurent Pinchart Laurent.pinchart@ideasonboard.com To: Jonas Karlman jonas@kwiboo.se To: Jernej Skrabec jernej.skrabec@gmail.com To: Yannick Fertre yannick.fertre@foss.st.com To: Philippe Cornu philippe.cornu@foss.st.com To: Benjamin Gaignard benjamin.gaignard@linaro.org To: Maxime Coquelin mcoquelin.stm32@gmail.com To: Alexandre Torgue alexandre.torgue@foss.st.com To: Philipp Zabel p.zabel@pengutronix.de To: dri-devel@lists.freedesktop.org To: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 98 +++++++++++++++++++++++++++ 1 file changed, 98 insertions(+)
Hi Antonio, many thanks for your patch. Nice improvement for better filtering supported modes... Acked-by: Philippe Cornu philippe.cornu@foss.st.com Reviewed-by: Philippe Cornu philippe.cornu@foss.st.com Philippe :-)