From: Alex Deucher alexander.deucher@amd.com
Signed-off-by: Alex Deucher alexander.deucher@amd.com --- drivers/gpu/drm/radeon/radeon.h | 38 ++++++------- drivers/gpu/drm/radeon/radeon_asic.c | 100 +++++++++++++++++----------------- 2 files changed, 68 insertions(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 5077478..be3683f 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -1131,12 +1131,23 @@ struct radeon_asic { void (*vga_set_state)(struct radeon_device *rdev, bool state); bool (*gpu_is_lockup)(struct radeon_device *rdev, struct radeon_ring *cp); int (*asic_reset)(struct radeon_device *rdev); - + /* ioctl hw specific callback. Some hw might want to perform special + * operation on specific ioctl. For instance on wait idle some hw + * might want to perform and HDP flush through MMIO as it seems that + * some R6XX/R7XX hw doesn't take HDP flush into account if programmed + * through ring. + */ + void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo); + /* check if 3D engine is idle */ + bool (*gui_idle)(struct radeon_device *rdev); + /* wait for mc_idle */ + int (*mc_wait_for_idle)(struct radeon_device *rdev); + /* gart */ struct { void (*tlb_flush)(struct radeon_device *rdev); int (*set_page)(struct radeon_device *rdev, int i, uint64_t addr); } gart; - + /* ring specific callbacks */ struct { void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib); int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib); @@ -1148,12 +1159,12 @@ struct radeon_asic { int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp); int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp); } ring[RADEON_NUM_RINGS]; - + /* irqs */ struct { int (*set)(struct radeon_device *rdev); int (*process)(struct radeon_device *rdev); } irq; - + /* displays */ struct { /* display watermarks */ void (*bandwidth_update)(struct radeon_device *rdev); @@ -1162,7 +1173,7 @@ struct radeon_asic { /* wait for vblank */ void (*wait_for_vblank)(struct radeon_device *rdev, int crtc); } display; - + /* copy functions for bo handling */ struct { int (*blit)(struct radeon_device *rdev, uint64_t src_offset, @@ -1185,30 +1196,20 @@ struct radeon_asic { /* ring used for bo copies */ u32 copy_ring_index; } copy; - + /* surfaces */ struct { int (*set_reg)(struct radeon_device *rdev, int reg, uint32_t tiling_flags, uint32_t pitch, uint32_t offset, uint32_t obj_size); void (*clear_reg)(struct radeon_device *rdev, int reg); } surface; - + /* hotplug detect */ struct { void (*init)(struct radeon_device *rdev); void (*fini)(struct radeon_device *rdev); bool (*sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); void (*set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); } hpd; - - /* ioctl hw specific callback. Some hw might want to perform special - * operation on specific ioctl. For instance on wait idle some hw - * might want to perform and HDP flush through MMIO as it seems that - * some R6XX/R7XX hw doesn't take HDP flush into account if programmed - * through ring. - */ - void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo); - /* check if 3D engine is idle */ - bool (*gui_idle)(struct radeon_device *rdev); /* power management */ struct { void (*misc)(struct radeon_device *rdev); @@ -1230,9 +1231,6 @@ struct radeon_asic { u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base); void (*post_page_flip)(struct radeon_device *rdev, int crtc); } pflip; - - /* wait for mc_idle */ - int (*mc_wait_for_idle)(struct radeon_device *rdev); };
/* diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 0a59f48..a592ca5 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -136,6 +136,9 @@ static struct radeon_asic r100_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r100_gpu_is_lockup, .asic_reset = &r100_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &r100_mc_wait_for_idle, .gart = { .tlb_flush = &r100_pci_gart_tlb_flush, .set_page = &r100_pci_gart_set_page, @@ -178,8 +181,6 @@ static struct radeon_asic r100_asic = { .sense = &r100_hpd_sense, .set_polarity = &r100_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &r100_pm_misc, .prepare = &r100_pm_prepare, @@ -199,7 +200,6 @@ static struct radeon_asic r100_asic = { .page_flip = &r100_page_flip, .post_page_flip = &r100_post_page_flip, }, - .mc_wait_for_idle = &r100_mc_wait_for_idle, };
static struct radeon_asic r200_asic = { @@ -210,6 +210,9 @@ static struct radeon_asic r200_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r100_gpu_is_lockup, .asic_reset = &r100_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &r100_mc_wait_for_idle, .gart = { .tlb_flush = &r100_pci_gart_tlb_flush, .set_page = &r100_pci_gart_set_page, @@ -252,8 +255,6 @@ static struct radeon_asic r200_asic = { .sense = &r100_hpd_sense, .set_polarity = &r100_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &r100_pm_misc, .prepare = &r100_pm_prepare, @@ -273,7 +274,6 @@ static struct radeon_asic r200_asic = { .page_flip = &r100_page_flip, .post_page_flip = &r100_post_page_flip, }, - .mc_wait_for_idle = &r100_mc_wait_for_idle, };
static struct radeon_asic r300_asic = { @@ -284,6 +284,9 @@ static struct radeon_asic r300_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &r300_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &r300_mc_wait_for_idle, .gart = { .tlb_flush = &r100_pci_gart_tlb_flush, .set_page = &r100_pci_gart_set_page, @@ -326,8 +329,6 @@ static struct radeon_asic r300_asic = { .sense = &r100_hpd_sense, .set_polarity = &r100_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &r100_pm_misc, .prepare = &r100_pm_prepare, @@ -347,7 +348,6 @@ static struct radeon_asic r300_asic = { .page_flip = &r100_page_flip, .post_page_flip = &r100_post_page_flip, }, - .mc_wait_for_idle = &r300_mc_wait_for_idle, };
static struct radeon_asic r300_asic_pcie = { @@ -358,6 +358,8 @@ static struct radeon_asic r300_asic_pcie = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &r300_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, .gart = { .tlb_flush = &rv370_pcie_gart_tlb_flush, .set_page = &rv370_pcie_gart_set_page, @@ -400,8 +402,6 @@ static struct radeon_asic r300_asic_pcie = { .sense = &r100_hpd_sense, .set_polarity = &r100_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &r100_pm_misc, .prepare = &r100_pm_prepare, @@ -432,6 +432,9 @@ static struct radeon_asic r420_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &r300_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &r300_mc_wait_for_idle, .gart = { .tlb_flush = &rv370_pcie_gart_tlb_flush, .set_page = &rv370_pcie_gart_set_page, @@ -474,8 +477,6 @@ static struct radeon_asic r420_asic = { .sense = &r100_hpd_sense, .set_polarity = &r100_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &r100_pm_misc, .prepare = &r100_pm_prepare, @@ -495,7 +496,6 @@ static struct radeon_asic r420_asic = { .page_flip = &r100_page_flip, .post_page_flip = &r100_post_page_flip, }, - .mc_wait_for_idle = &r300_mc_wait_for_idle, };
static struct radeon_asic rs400_asic = { @@ -506,6 +506,9 @@ static struct radeon_asic rs400_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &r300_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &rs400_mc_wait_for_idle, .gart = { .tlb_flush = &rs400_gart_tlb_flush, .set_page = &rs400_gart_set_page, @@ -548,8 +551,6 @@ static struct radeon_asic rs400_asic = { .sense = &r100_hpd_sense, .set_polarity = &r100_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &r100_pm_misc, .prepare = &r100_pm_prepare, @@ -569,7 +570,6 @@ static struct radeon_asic rs400_asic = { .page_flip = &r100_page_flip, .post_page_flip = &r100_post_page_flip, }, - .mc_wait_for_idle = &rs400_mc_wait_for_idle, };
static struct radeon_asic rs600_asic = { @@ -580,6 +580,9 @@ static struct radeon_asic rs600_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &rs600_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &rs600_mc_wait_for_idle, .gart = { .tlb_flush = &rs600_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -622,8 +625,6 @@ static struct radeon_asic rs600_asic = { .sense = &rs600_hpd_sense, .set_polarity = &rs600_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &rs600_pm_misc, .prepare = &rs600_pm_prepare, @@ -643,7 +644,6 @@ static struct radeon_asic rs600_asic = { .page_flip = &rs600_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &rs600_mc_wait_for_idle, };
static struct radeon_asic rs690_asic = { @@ -654,6 +654,9 @@ static struct radeon_asic rs690_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &rs600_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &rs690_mc_wait_for_idle, .gart = { .tlb_flush = &rs400_gart_tlb_flush, .set_page = &rs400_gart_set_page, @@ -696,8 +699,6 @@ static struct radeon_asic rs690_asic = { .sense = &rs600_hpd_sense, .set_polarity = &rs600_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &rs600_pm_misc, .prepare = &rs600_pm_prepare, @@ -717,7 +718,6 @@ static struct radeon_asic rs690_asic = { .page_flip = &rs600_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &rs690_mc_wait_for_idle, };
static struct radeon_asic rv515_asic = { @@ -728,6 +728,9 @@ static struct radeon_asic rv515_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &rs600_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &rv515_mc_wait_for_idle, .gart = { .tlb_flush = &rv370_pcie_gart_tlb_flush, .set_page = &rv370_pcie_gart_set_page, @@ -770,8 +773,6 @@ static struct radeon_asic rv515_asic = { .sense = &rs600_hpd_sense, .set_polarity = &rs600_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &rs600_pm_misc, .prepare = &rs600_pm_prepare, @@ -791,7 +792,6 @@ static struct radeon_asic rv515_asic = { .page_flip = &rs600_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &rv515_mc_wait_for_idle, };
static struct radeon_asic r520_asic = { @@ -802,6 +802,9 @@ static struct radeon_asic r520_asic = { .vga_set_state = &r100_vga_set_state, .gpu_is_lockup = &r300_gpu_is_lockup, .asic_reset = &rs600_asic_reset, + .ioctl_wait_idle = NULL, + .gui_idle = &r100_gui_idle, + .mc_wait_for_idle = &r520_mc_wait_for_idle, .gart = { .tlb_flush = &rv370_pcie_gart_tlb_flush, .set_page = &rv370_pcie_gart_set_page, @@ -844,8 +847,6 @@ static struct radeon_asic r520_asic = { .sense = &rs600_hpd_sense, .set_polarity = &rs600_hpd_set_polarity, }, - .ioctl_wait_idle = NULL, - .gui_idle = &r100_gui_idle, .pm = { .misc = &rs600_pm_misc, .prepare = &rs600_pm_prepare, @@ -865,7 +866,6 @@ static struct radeon_asic r520_asic = { .page_flip = &rs600_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &r520_mc_wait_for_idle, };
static struct radeon_asic r600_asic = { @@ -876,6 +876,9 @@ static struct radeon_asic r600_asic = { .vga_set_state = &r600_vga_set_state, .gpu_is_lockup = &r600_gpu_is_lockup, .asic_reset = &r600_asic_reset, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &r600_mc_wait_for_idle, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -917,8 +920,6 @@ static struct radeon_asic r600_asic = { .sense = &r600_hpd_sense, .set_polarity = &r600_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &r600_pm_misc, .prepare = &rs600_pm_prepare, @@ -938,7 +939,6 @@ static struct radeon_asic r600_asic = { .page_flip = &rs600_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &r600_mc_wait_for_idle, };
static struct radeon_asic rs780_asic = { @@ -949,6 +949,9 @@ static struct radeon_asic rs780_asic = { .gpu_is_lockup = &r600_gpu_is_lockup, .vga_set_state = &r600_vga_set_state, .asic_reset = &r600_asic_reset, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &r600_mc_wait_for_idle, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -990,8 +993,6 @@ static struct radeon_asic rs780_asic = { .sense = &r600_hpd_sense, .set_polarity = &r600_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &r600_pm_misc, .prepare = &rs600_pm_prepare, @@ -1011,7 +1012,6 @@ static struct radeon_asic rs780_asic = { .page_flip = &rs600_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &r600_mc_wait_for_idle, };
static struct radeon_asic rv770_asic = { @@ -1022,6 +1022,9 @@ static struct radeon_asic rv770_asic = { .asic_reset = &r600_asic_reset, .gpu_is_lockup = &r600_gpu_is_lockup, .vga_set_state = &r600_vga_set_state, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &r600_mc_wait_for_idle, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1063,8 +1066,6 @@ static struct radeon_asic rv770_asic = { .sense = &r600_hpd_sense, .set_polarity = &r600_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &rv770_pm_misc, .prepare = &rs600_pm_prepare, @@ -1084,7 +1085,6 @@ static struct radeon_asic rv770_asic = { .page_flip = &rv770_page_flip, .post_page_flip = &rs600_post_page_flip, }, - .mc_wait_for_idle = &r600_mc_wait_for_idle, };
static struct radeon_asic evergreen_asic = { @@ -1095,6 +1095,9 @@ static struct radeon_asic evergreen_asic = { .gpu_is_lockup = &evergreen_gpu_is_lockup, .asic_reset = &evergreen_asic_reset, .vga_set_state = &r600_vga_set_state, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &evergreen_mc_wait_for_idle, .gart = { .tlb_flush = &evergreen_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1136,8 +1139,6 @@ static struct radeon_asic evergreen_asic = { .sense = &evergreen_hpd_sense, .set_polarity = &evergreen_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &evergreen_pm_misc, .prepare = &evergreen_pm_prepare, @@ -1157,7 +1158,6 @@ static struct radeon_asic evergreen_asic = { .page_flip = &evergreen_page_flip, .post_page_flip = &evergreen_post_page_flip, }, - .mc_wait_for_idle = &evergreen_mc_wait_for_idle, };
static struct radeon_asic sumo_asic = { @@ -1168,6 +1168,9 @@ static struct radeon_asic sumo_asic = { .gpu_is_lockup = &evergreen_gpu_is_lockup, .asic_reset = &evergreen_asic_reset, .vga_set_state = &r600_vga_set_state, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &evergreen_mc_wait_for_idle, .gart = { .tlb_flush = &evergreen_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1209,8 +1212,6 @@ static struct radeon_asic sumo_asic = { .sense = &evergreen_hpd_sense, .set_polarity = &evergreen_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &evergreen_pm_misc, .prepare = &evergreen_pm_prepare, @@ -1230,7 +1231,6 @@ static struct radeon_asic sumo_asic = { .page_flip = &evergreen_page_flip, .post_page_flip = &evergreen_post_page_flip, }, - .mc_wait_for_idle = &evergreen_mc_wait_for_idle, };
static struct radeon_asic btc_asic = { @@ -1241,6 +1241,9 @@ static struct radeon_asic btc_asic = { .gpu_is_lockup = &evergreen_gpu_is_lockup, .asic_reset = &evergreen_asic_reset, .vga_set_state = &r600_vga_set_state, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &evergreen_mc_wait_for_idle, .gart = { .tlb_flush = &evergreen_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1282,8 +1285,6 @@ static struct radeon_asic btc_asic = { .sense = &evergreen_hpd_sense, .set_polarity = &evergreen_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &evergreen_pm_misc, .prepare = &evergreen_pm_prepare, @@ -1303,7 +1304,6 @@ static struct radeon_asic btc_asic = { .page_flip = &evergreen_page_flip, .post_page_flip = &evergreen_post_page_flip, }, - .mc_wait_for_idle = &evergreen_mc_wait_for_idle, };
static const struct radeon_vm_funcs cayman_vm_funcs = { @@ -1324,6 +1324,9 @@ static struct radeon_asic cayman_asic = { .gpu_is_lockup = &cayman_gpu_is_lockup, .asic_reset = &cayman_asic_reset, .vga_set_state = &r600_vga_set_state, + .ioctl_wait_idle = r600_ioctl_wait_idle, + .gui_idle = &r600_gui_idle, + .mc_wait_for_idle = &evergreen_mc_wait_for_idle, .gart = { .tlb_flush = &cayman_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1384,8 +1387,6 @@ static struct radeon_asic cayman_asic = { .sense = &evergreen_hpd_sense, .set_polarity = &evergreen_hpd_set_polarity, }, - .ioctl_wait_idle = r600_ioctl_wait_idle, - .gui_idle = &r600_gui_idle, .pm = { .misc = &evergreen_pm_misc, .prepare = &evergreen_pm_prepare, @@ -1405,7 +1406,6 @@ static struct radeon_asic cayman_asic = { .page_flip = &evergreen_page_flip, .post_page_flip = &evergreen_post_page_flip, }, - .mc_wait_for_idle = &evergreen_mc_wait_for_idle, };
int radeon_asic_init(struct radeon_device *rdev)