Am Donnerstag, den 31.05.2012, 19:00 -0400 schrieb alexdeucher@gmail.com:
From: Alex Deucher alexander.deucher@amd.com
Tiling group size is always 256bits on r6xx/r7xx/r8xx/9xx. Also fix and simplify render backend map. This now properly sets up the backend map on r6xx-9xx which should improve 3D performance.
It would be great if you could give some benchmark data confirming that should. Or tell users what tests to run to get some data.
Signed-off-by: Alex Deucher alexander.deucher@amd.com Signed-off-by: Jerome Glisse jglisse@redhat.com
drivers/gpu/drm/radeon/evergreen.c | 368 +++++------------------------------ drivers/gpu/drm/radeon/evergreend.h | 10 + drivers/gpu/drm/radeon/ni.c | 351 +++------------------------------ drivers/gpu/drm/radeon/nid.h | 11 + drivers/gpu/drm/radeon/r600.c | 199 +++++++------------ drivers/gpu/drm/radeon/r600d.h | 2 + drivers/gpu/drm/radeon/radeon.h | 5 + drivers/gpu/drm/radeon/rv770.c | 264 +++++-------------------- drivers/gpu/drm/radeon/rv770d.h | 3 + 9 files changed, 222 insertions(+), 991 deletions(-)
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Thanks,
Paul