https://bugzilla.kernel.org/show_bug.cgi?id=172421
--- Comment #15 from Roland Scheidegger rscheidegger@gmx.ch --- (In reply to Christian König from comment #14)
(In reply to Roland Scheidegger from comment #13)
Personally I've always thought the risk of damaging hardware with any kind of overclocking is just about exactly zero as long as you don't increase voltage levels
Unfortunately this is exactly what happens here. The clock is generated by a voltage controlled oscillator and for the desired resolution you need to over clock it by about 30-40%.
That in turn means you raise the voltage way over the nominal limit.
Oh interesting - didn't know voltage was directly tied to clock frequency here. Makes sense then to not allow it (at least if that circuitry isn't shared with DP, as the DP link runs at much higher clock (540Mhz actually), but I suppose it's really different there).