On all current cache coherent powerpc processors, it is not legit to map system memory non-cachable. This will cause aliases with the linear mapping which can be fatal.
The TTM should generally avoid it after Jerome placement patches but let's add a sanity check anyway to catch any possible remaining issue.
Signed-off-by: Benjamin Herrenschmidt benh@palm4.ozlabs.ibm.com --- drivers/gpu/drm/ttm/ttm_bo_util.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index ef2ac3c..48095be 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -37,6 +37,9 @@ #include <linux/slab.h> #include <linux/vmalloc.h> #include <linux/module.h> +#if defined(__powerpc__) +#include <asm/machdep.h> +#endif
void ttm_bo_free_old_node(struct ttm_buffer_object *bo) { @@ -498,6 +501,20 @@ pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp) tmp = pgprot_noncached(tmp);
#endif +#if defined(__powerpc__) && !defined(CONFIG_NOT_COHERENT_CACHE) + /* + * Using a non-cachable mapping of system memory on + * cache coherent powerpc's can be fatal, let's make + * sure this doesn't happen and warn if it does. The + * only exception is powermac with AGP which has to + * take the risk. + */ + if (!machine_is(powermac) && + ((caching_flags & TTM_PL_FLAG_SYSTEM) || + (caching_flags & TTM_PL_FLAG_TT))) { + pr_err_once("TTM: Attempt to use a non-cached" + " mapping on RAM unsupported !\n"); + return tmp; } #endif #if defined(__ia64__) || defined(__arm__) || defined(__powerpc__)